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https://github.com/MiSTer-devel/SuperCassetteVision_MiSTer.git
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60 lines
1.6 KiB
Systemverilog
60 lines
1.6 KiB
Systemverilog
// Download manager for ROM initialization
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//
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// Copyright (c) 2024 David Hunter
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//
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// This program is GPL licensed. See COPYING for the full license.
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module rominit
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(
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input CLK_SYS,
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input IOCTL_DOWNLOAD,
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input [15:0] IOCTL_INDEX,
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input IOCTL_WR,
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input [26:0] IOCTL_ADDR,
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input [7:0] IOCTL_DOUT,
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output IOCTL_WAIT,
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output ROMINIT_ACTIVE,
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output ROMINIT_SEL_BOOT,
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output ROMINIT_SEL_CHR,
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output ROMINIT_SEL_APU,
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output ROMINIT_SEL_CART,
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output [16:0] ROMINIT_ADDR,
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output [7:0] ROMINIT_DATA,
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output ROMINIT_VALID
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);
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reg [16:0] addr;
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wire [5:0] index_menusub = IOCTL_INDEX[5:0];
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wire [7:0] index_file_ext = IOCTL_INDEX[13:6];
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wire load_boot = (index_menusub == 0);
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wire load_cart = (index_menusub == 1);
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assign IOCTL_WAIT = 0;
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assign ROMINIT_ACTIVE = IOCTL_DOWNLOAD;
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assign ROMINIT_SEL_BOOT = ROMINIT_ACTIVE & load_boot & (IOCTL_ADDR < 24'h1000);
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assign ROMINIT_SEL_CHR = ROMINIT_ACTIVE & load_boot & (IOCTL_ADDR < 24'h1400) & ~ROMINIT_SEL_BOOT;
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assign ROMINIT_SEL_APU = ROMINIT_ACTIVE & load_boot & (IOCTL_ADDR < 24'h1800) & ~ROMINIT_SEL_CHR;
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assign ROMINIT_SEL_CART = ROMINIT_ACTIVE & load_cart;
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assign ROMINIT_DATA = IOCTL_DOUT;
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assign ROMINIT_VALID = IOCTL_DOWNLOAD & IOCTL_WR & ~IOCTL_WAIT;
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assign ROMINIT_ADDR = addr;
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always_comb begin
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addr = 0;
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if (ROMINIT_SEL_BOOT)
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addr[11:0] = IOCTL_ADDR[11:0]; // 4KB
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else if (ROMINIT_SEL_CHR)
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addr[9:0] = IOCTL_ADDR[9:0]; // 1KB
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else if (ROMINIT_SEL_APU)
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addr[9:0] = IOCTL_ADDR[9:0]; // 1KB
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else if (ROMINIT_SEL_CART)
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addr[16:0] = IOCTL_ADDR[16:0];
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end
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endmodule
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