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https://github.com/MiSTer-devel/SlugCross_MiSTer.git
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69 lines
2.8 KiB
Verilog
69 lines
2.8 KiB
Verilog
`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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// Company:
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// Engineer:
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//
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// Create Date: 11/28/2018 02:00:42 PM
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// Design Name:
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// Module Name: VertGap1
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// Project Name:
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// Target Devices:
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// Tool Versions:
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// Description:
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//
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// Dependencies:
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//
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// Revision:
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// Revision 0.01 - File Created
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// Additional Comments:
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//
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//////////////////////////////////////////////////////////////////////////////////
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module VertGap1(
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input [9:0] Hcount,
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input [9:0] Vcount,
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input btnC,
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input clk,
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input [6:4] sw,
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input frame,
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input sec,
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input btnUDLR,
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input reset,
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input [3:0] Green,
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input [3:0] RedIn,
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output [3:0] RedOut
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);
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wire [3:0] RedHoriz, RedVert;
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wire loadOut, resetOut, dir1Out, dir2Out, WallDetect, WallEdgeDetect, RedDetect, flash, flashOut, secEdge;
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wire [9:0] UpOut, DwOut, secOut;
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GapStateMachine GapStateMachine(.clk(clk), .btnUDLR(btnUDLR), .btnC(btnC), .GapWallDetect(WallEdgeDetect), .SlugRedDetect(RedDetect),
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.load(loadOut), .reset(resetOut), .dir1(dir1Out), .dir2(dir2Out), .flash(flash));
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GapWallDetect GapWallDetect (.DwStartingPosition(DwOut), .UpStartingPosition(UpOut), .Upper(10'b0000001000),
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.Lower(10'b0111010111), .GapWallDetect(WallDetect));
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EdgeDetector EdgeDetector (.btn(WallDetect), .clkin(clk), .out(WallEdgeDetect));
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SlugRedDetect SlugRedDetect (.Green(Green), .Red(RedOut), .Hcount(Hcount), .LowerRange(10'b0010011110), .UpperRange(10'b0010100101), .SlugRedDetect(RedDetect));
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EdgeDetector SecEdge (.btn(sec), .clkin(clk), .out(secEdge));
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countU10 secGenerator(.clk(clk), .Up(secEdge), .Q(secOut));
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FlashModule FlashModule (.flash(flash), .sec(secOut[0]), .flashOut(flashOut));
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GapHorizontalComponent GapHorizontalComponent (.Hcount(Hcount), .RedIn(RedIn), .RedOut(RedHoriz),
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.LeftStartingPosition(10'b0010011110),
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.RightStartingPosition(10'b0010100101));
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GapVerticalComponent GapVerticalComponent (.Vcount(Vcount), .RedIn(RedIn), .clk(clk), .sw({sw[6], sw[5], sw[4]}), .Up(dir1Out), .Dw(dir2Out), .frame(frame),
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.reset(resetOut), .load(loadOut), .UpStartingPosition(10'b0001001110), .RedOut(RedVert), .UpOut(UpOut), .DwOut(DwOut));
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assign RedOut[3] = (RedHoriz[3] | (RedVert[3] & ~flashOut));
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assign RedOut[2] = (RedHoriz[2] | (RedVert[2] & ~flashOut));
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assign RedOut[1] = (RedHoriz[1] | (RedVert[1] & ~flashOut));
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assign RedOut[0] = (RedHoriz[0] | (RedVert[0] & ~flashOut));
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endmodule
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