mirror of
https://github.com/MiSTer-devel/SNES_MiSTer.git
synced 2026-04-19 03:05:34 +00:00
0907b84276
* Allow UART access to ROM and WRAM for SNI * [SNI] SRAM and controller register support * keep file definitions in files.qip * fix SDRAM timing * further SDRAM optimization * add a protocol version number to SNI command handler * sdram: move raw_req_test off the critical path * sni: fix issue with WRAM writes to SA-1 games * Address review feedback
47 lines
1.8 KiB
Tcl
47 lines
1.8 KiB
Tcl
derive_pll_clocks
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create_generated_clock -name GSU_CACHE_CLK -source [get_pins -compatibility_mode {*|pll|pll_inst|altera_pll_i|*[2].*|divclk}] \
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-invert [get_pins {emu|main|GSUMap|GSU|CACHE|altsyncram_component|auto_generated|*|clk0}]
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create_generated_clock -name CX4_MEM_CLK -source [get_pins -compatibility_mode {*|pll|pll_inst|altera_pll_i|*[2].*|divclk}] \
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-invert [get_pins {emu|main|CX4Map|CX4|DATA_RAM|altsyncram_component|auto_generated|*|clk0 \
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emu|main|CX4Map|CX4|DATA_ROM|spram_sz|altsyncram_component|auto_generated|altsyncram1|*|clk0 }]
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derive_clock_uncertainty
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set_clock_groups -asynchronous -group [get_clocks { GSU_CACHE_CLK CX4_MEM_CLK }]
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set_max_delay 20 -from [get_registers { emu|hps_io|* \
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emu|main|* \
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emu|bsram|* \
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emu|rom_mask[*] \
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emu|rom_type[*] }] \
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-to [get_registers { emu|sdram|addr[*][*] \
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emu|sdram|din[*][*]* \
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emu|sdram|rfs* \
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emu|sdram|write[*] \
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emu|sdram|read[*] \
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emu|sdram|word[*] \
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emu|sdram|old_* \
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emu|sdram|is_sni[*] \
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emu|sdram|st_num[*]* \
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emu|sdram|state[1]* \
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emu|sdram|SDRAM_nCAS \
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emu|sdram|SDRAM_nRAS \
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emu|sdram|SDRAM_nWE \
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emu|sdram|SDRAM_DQ[*]* \
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emu|sdram|SDRAM_A[*] \
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emu|sdram|SDRAM_BA[*]}]
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set_max_delay 23 -from [get_registers { emu|sdram|*}] \
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-to [get_registers { emu|main|* \
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emu|bsram|* \
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emu|vram*|* }]
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set_false_path -from [get_registers { emu|sdram_download_* }] -to [get_registers { emu|main|* }]
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#set_false_path -to [get_registers { emu|sdram|word[*] }]
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set_false_path -from {emu|en216p}
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