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15 lines
368 B
VHDL
15 lines
368 B
VHDL
-------------------------------------------------------------------------------
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--
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-- $Id: clock_ctrl-c.vhd,v 1.2 2005/06/11 10:08:43 arniml Exp $
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--
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-- The clock control unit.
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--
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-------------------------------------------------------------------------------
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configuration t48_clock_ctrl_rtl_c0 of t48_clock_ctrl is
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for rtl
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end for;
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end t48_clock_ctrl_rtl_c0;
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