mister-devel/PCXT_MiSTer
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eaba318d41dfd80aff73f46a38dc6a35a2e1ecfd
PCXT_MiSTer/rtl/pll
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Aitor Gómez afd39c8dab changed chipset clock to 50 mhz and rework (by @kitune-san) 
* changed chipset clock to 50 mhz.
* Added false_path.
* Change peripheral_clock signal.
* Added F/F to the write process to the EMS memory to resolve timing co…
* Add 2-stage F/F between bus and video module.
* Changed 8253 timer_clock signal.
* Fixed F/F clocks.
2022-08-04 07:55:09 +02:00
..
pll_0002.qip
Beta 0.5
2022-06-03 16:11:01 +02:00
pll_0002.v
changed chipset clock to 50 mhz and rework (by @kitune-san)
2022-08-04 07:55:09 +02:00