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Files

Aitor Gómez García 8ff59fa11b XT timing: drive the chipset with exact clock enables

Replace the derived XT pseudo-clocks with a synchronous clock-enable scheduler on clk_chipset so the XT side runs from a single base clock without changing the mature 8088/BIU clocking model.

- generate exact CPU and peripheral enables from clk_chipset
- update the XT chipset and peripheral path to consume enables instead of reconstructed pseudo-clock edges
- keep the 8088 CLK pin as a local compatibility signal
- refresh SYSTEM.sdc so pll_system video clocks and clk_14_318 resolve cleanly in TimeQuest

2026-03-12 08:50:35 +01:00

DEMO

Beta 0.3

2022-05-23 14:32:32 +02:00

DOC/img

Beta 0.3

2022-05-23 14:32:32 +02:00

HDL

XT timing: drive the chipset with exact clock enables

2026-03-12 08:50:35 +01:00

TESTBENCH

Beta 0.3