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Delete unused wires in XT2IDE.
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@@ -988,7 +988,6 @@ module PERIPHERALS #(
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logic ide0_io_read_n;
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logic ide0_io_write_n;
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logic [2:0] ide0_address;
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logic ide0_data_bus_io;
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logic [15:0] ide0_data_bus_in;
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logic [15:0] ide0_data_bus_out;
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@@ -1012,7 +1011,6 @@ module PERIPHERALS #(
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.ide_io_write_n (ide0_io_write_n),
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.ide_address (ide0_address),
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.ide_data_bus_io (ide0_data_bus_io),
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.ide_data_bus_in (ide0_data_bus_in),
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.ide_data_bus_out (ide0_data_bus_out)
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);
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@@ -22,7 +22,6 @@ module XT2IDE
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output logic ide_io_write_n,
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output logic [2:0] ide_address,
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output logic ide_data_bus_io,
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input logic [15:0] ide_data_bus_in,
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output logic [15:0] ide_data_bus_out
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);
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@@ -43,14 +42,12 @@ module XT2IDE
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always_comb
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begin
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latch_high_read_byte = 1'b0;
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ide_data_bus_io = 1'b1;
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read_high_byte = 1'b0;
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latch_high_write_byte = 1'b0;
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if (~address[2] & ~address[1] & ~select_2 & ~chip_select_n) begin
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casez ({select_1, io_read_n, io_write_n})
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3'b001: latch_high_read_byte = 1'b1;
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3'b010: ide_data_bus_io = 1'b0;
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3'b101: read_high_byte = 1'b1;
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3'b110: latch_high_write_byte = 1'b1;
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endcase
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