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https://github.com/MiSTer-devel/PCFX_MiSTer.git
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101 lines
2.2 KiB
ArmAsm
101 lines
2.2 KiB
ArmAsm
;;; Trivial memory test
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;;;
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;;; Copyright (c) 2025 David Hunter
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;;;
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;;; This program is GPL licensed. See COPYING for the full license.
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;;; This program tests the entire 2MB RAM by writing and verifying a
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;;; decreasing value. 32-bit accesses are used. On test failure, the
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;;; program halts. On test success, it begins again.
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;;;
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;;; This program replaces the usual ROM BIOS.
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;;;
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; upper half of a 32 bit word:
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hiword function x,(x>>16)&65535
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; the same for the lower half:
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loword function x,x&65535
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;; Read/write size: 1=byte, 2=half, 4=word
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rwsize equ 4
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cpu 70732
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page 0
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org 0FFF00000h
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entry:
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;; Initialize and enable instruction cache (I$)
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mov #1, r1
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movhi #1, r1, r1
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ldsr r1, #24 ; Set CHCW.CEN=0, .CEC=256, .ICC=1
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mov #2, r1
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ldsr r1, #24 ; Set CHCW.ICE
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mov #-1, r16 ; r16 = initial test value
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mov r0, r8 ; r8 = RAM start
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movhi #20h, r0, r9 ; r9 = RAM end + 1
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;; r10 = data mask (because ld.b/h do sign extension)
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if rwsize == 1
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ori #000ffh, r0, r10
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elseif rwsize == 2
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ori #0ffffh, r0, r10
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endif
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;; Write RAAM
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mov r16, r1 ; r1 = current test value
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mov r8, r2 ; r2 = current address
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write_loop:
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if rwsize == 1
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st.b r1, 0[r2]
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elseif rwsize == 2
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st.h r1, 0[r2]
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else
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st.w r1, 0[r2]
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endif
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addi #rwsize, r2, r2
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addi #-1, r1, r1
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cmp r2, r9
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bne write_loop
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;; Read RAM and verify
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mov r16, r1 ; r1 = current test value
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mov r8, r2 ; r2 = current address
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verify_loop:
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if rwsize == 1
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ld.b 0[r2], r3
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mov r1, r4
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and r10, r3
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and r10, r4
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elseif rwsize == 2
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ld.h 0[r2], r3
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mov r1, r4
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and r10, r3
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and r10, r4
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else
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ld.w 0[r2], r3
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mov r1, r4
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endif
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addi #rwsize, r2, r2
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cmp r3, r4
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bne verify_fail
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addi #-1, r1, r1
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cmp r2, r9
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bne verify_loop
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br entry
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verify_fail:
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halt
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;;; Interrupt / exception vectora table
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org 0FFFFFFF0h
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movea #loword(entry), r0, r31
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movhi #hiword(entry), r31, r31
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jmp r31
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