mirror of
https://github.com/MiSTer-devel/NeoGeo_MiSTer.git
synced 2026-05-17 03:04:13 +00:00
Update sys.
This commit is contained in:
@@ -13,7 +13,7 @@ set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name LAST_QUARTUS_VERSION "17.1.0 Lite Edition"
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set_global_assignment -name LAST_QUARTUS_VERSION "17.0.2 Standard Edition"
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set_global_assignment -name GENERATE_RBF_FILE ON
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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296
sys/hps_io.v
296
sys/hps_io.v
@@ -52,8 +52,8 @@ module hps_io #(parameter STRLEN=0, PS2DIV=0, WIDE=0, VDNUM=1, PS2WE=0)
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output [1:0] buttons,
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output forced_scandoubler,
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output reg [31:0] status,
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input [31:0] status_in,
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output reg [63:0] status,
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input [63:0] status_in,
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input status_set,
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input [15:0] status_menumask,
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@@ -169,113 +169,24 @@ wire [15:0] sd_cmd =
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sd_rd[0]
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};
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///////////////// calc video parameters //////////////////
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/////////////////////////////////////////////////////////
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wire clk_100 = HPS_BUS[43];
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wire clk_vid = HPS_BUS[42];
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wire ce_pix = HPS_BUS[41];
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wire de = HPS_BUS[40];
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wire hs = HPS_BUS[39];
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wire vs = HPS_BUS[38];
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wire vs_hdmi = HPS_BUS[44];
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wire f1 = HPS_BUS[45];
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reg [31:0] vid_hcnt = 0;
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reg [31:0] vid_vcnt = 0;
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reg [7:0] vid_nres = 0;
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reg [1:0] vid_int = 0;
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integer hcnt;
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always @(posedge clk_vid) begin
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integer vcnt;
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reg old_vs= 0, old_de = 0, old_vmode = 0;
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reg [3:0] resto = 0;
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reg calch = 0;
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if(ce_pix) begin
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old_vs <= vs;
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old_de <= de;
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if(~vs & ~old_de & de) vcnt <= vcnt + 1;
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if(calch & de) hcnt <= hcnt + 1;
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if(old_de & ~de) calch <= 0;
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if(old_vs & ~vs) begin
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vid_int <= {vid_int[0],f1};
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if(~f1) begin
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if(hcnt && vcnt) begin
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old_vmode <= new_vmode;
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//report new resolution after timeout
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if(resto) resto <= resto + 1'd1;
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if(vid_hcnt != hcnt || vid_vcnt != vcnt || old_vmode != new_vmode) resto <= 1;
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if(&resto) vid_nres <= vid_nres + 1'd1;
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vid_hcnt <= hcnt;
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vid_vcnt <= vcnt;
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end
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vcnt <= 0;
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hcnt <= 0;
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calch <= 1;
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end
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end
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end
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end
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reg [31:0] vid_htime = 0;
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reg [31:0] vid_vtime = 0;
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reg [31:0] vid_pix = 0;
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always @(posedge clk_100) begin
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integer vtime, htime, hcnt;
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reg old_vs, old_hs, old_vs2, old_hs2, old_de, old_de2;
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reg calch = 0;
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old_vs <= vs;
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old_hs <= hs;
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old_vs2 <= old_vs;
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old_hs2 <= old_hs;
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vtime <= vtime + 1'd1;
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htime <= htime + 1'd1;
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if(~old_vs2 & old_vs) begin
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vid_pix <= hcnt;
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vid_vtime <= vtime;
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vtime <= 0;
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hcnt <= 0;
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end
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if(old_vs2 & ~old_vs) calch <= 1;
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if(~old_hs2 & old_hs) begin
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vid_htime <= htime;
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htime <= 0;
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end
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old_de <= de;
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old_de2 <= old_de;
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if(calch & old_de) hcnt <= hcnt + 1;
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if(old_de2 & ~old_de) calch <= 0;
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end
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reg [31:0] vid_vtime_hdmi;
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always @(posedge clk_100) begin
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integer vtime;
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reg old_vs, old_vs2;
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old_vs <= vs_hdmi;
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old_vs2 <= old_vs;
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vtime <= vtime + 1'd1;
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if(~old_vs2 & old_vs) begin
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vid_vtime_hdmi <= vtime;
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vtime <= 0;
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end
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end
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wire [15:0] vc_dout;
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video_calc video_calc
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(
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.clk_100(HPS_BUS[43]),
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.clk_vid(HPS_BUS[42]),
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.ce_pix(HPS_BUS[41]),
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.de(HPS_BUS[40]),
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.hs(HPS_BUS[39]),
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.vs(HPS_BUS[38]),
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.vs_hdmi(HPS_BUS[44]),
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.f1(HPS_BUS[45]),
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.new_vmode(new_vmode),
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.par_num(byte_cnt[3:0]),
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.dout(vc_dout)
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);
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/////////////////////////////////////////////////////////
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@@ -283,14 +194,15 @@ reg [31:0] ps2_key_raw = 0;
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wire pressed = (ps2_key_raw[15:8] != 8'hf0);
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wire extended = (~pressed ? (ps2_key_raw[23:16] == 8'he0) : (ps2_key_raw[15:8] == 8'he0));
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reg [9:0] byte_cnt;
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always@(posedge clk_sys) begin
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reg [15:0] cmd;
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reg [9:0] byte_cnt; // counts bytes
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reg [2:0] b_wr;
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reg [2:0] stick_idx;
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reg ps2skip = 0;
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reg [3:0] stflg = 0;
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reg [31:0] status_req;
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reg [63:0] status_req;
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reg old_status_set = 0;
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old_status_set <= status_set;
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@@ -436,9 +348,13 @@ always@(posedge clk_sys) begin
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// send image info
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'h1d: if(byte_cnt<5) img_size[{byte_cnt-1'b1, 4'b0000} +:16] <= io_din;
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// status, 32bit version
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'h1e: if(byte_cnt==1) status[15:0] <= io_din;
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else if(byte_cnt==2) status[31:16] <= io_din;
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// status, 64bit version
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'h1e: case(byte_cnt)
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1: status[15:00] <= io_din;
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2: status[31:16] <= io_din;
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3: status[47:32] <= io_din;
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4: status[63:48] <= io_din;
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endcase
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// reading keyboard LED status
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'h1f: io_dout <= {|PS2WE, 2'b01, ps2_kbd_led_status[2], ps2_kbd_led_use[2], ps2_kbd_led_status[1], ps2_kbd_led_use[1], ps2_kbd_led_status[0], ps2_kbd_led_use[0]};
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@@ -460,21 +376,7 @@ always@(posedge clk_sys) begin
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'h22: RTC[(byte_cnt-6'd1)<<4 +:16] <= io_din;
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//Video res.
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'h23: case(byte_cnt)
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1: io_dout <= {|vid_int, vid_nres};
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2: io_dout <= vid_hcnt[15:0];
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3: io_dout <= vid_hcnt[31:16];
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4: io_dout <= vid_vcnt[15:0];
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5: io_dout <= vid_vcnt[31:16];
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6: io_dout <= vid_htime[15:0];
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7: io_dout <= vid_htime[31:16];
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8: io_dout <= vid_vtime[15:0];
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9: io_dout <= vid_vtime[31:16];
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10: io_dout <= vid_pix[15:0];
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11: io_dout <= vid_pix[31:16];
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12: io_dout <= vid_vtime_hdmi[15:0];
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13: io_dout <= vid_vtime_hdmi[31:16];
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endcase
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'h23: if(!byte_cnt[9:4]) io_dout <= vc_dout;
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//RTC
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'h24: TIMESTAMP[(byte_cnt-6'd1)<<4 +:16] <= io_din;
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@@ -484,8 +386,10 @@ always@(posedge clk_sys) begin
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//status set
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'h29: case(byte_cnt)
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1: io_dout <= status_req[15:0];
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1: io_dout <= status_req[15:00];
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2: io_dout <= status_req[31:16];
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3: io_dout <= status_req[47:32];
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4: io_dout <= status_req[63:48];
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endcase
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//menu mask
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@@ -777,6 +681,142 @@ end
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endmodule
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///////////////// calc video parameters //////////////////
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module video_calc
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(
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input clk_100,
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input clk_vid,
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input ce_pix,
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input de,
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input hs,
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input vs,
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input vs_hdmi,
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input f1,
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input new_vmode,
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input [3:0] par_num,
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output reg [15:0] dout
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);
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always @(*) begin
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case(par_num)
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1: dout = {|vid_int, vid_nres};
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2: dout = vid_hcnt[15:0];
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3: dout = vid_hcnt[31:16];
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4: dout = vid_vcnt[15:0];
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5: dout = vid_vcnt[31:16];
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6: dout = vid_htime[15:0];
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7: dout = vid_htime[31:16];
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8: dout = vid_vtime[15:0];
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9: dout = vid_vtime[31:16];
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10: dout = vid_pix[15:0];
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11: dout = vid_pix[31:16];
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12: dout = vid_vtime_hdmi[15:0];
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13: dout = vid_vtime_hdmi[31:16];
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default dout = 0;
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endcase
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end
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reg [31:0] vid_hcnt = 0;
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reg [31:0] vid_vcnt = 0;
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reg [7:0] vid_nres = 0;
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reg [1:0] vid_int = 0;
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always @(posedge clk_vid) begin
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integer hcnt;
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integer vcnt;
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reg old_vs= 0, old_de = 0, old_vmode = 0;
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reg [3:0] resto = 0;
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reg calch = 0;
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if(ce_pix) begin
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old_vs <= vs;
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old_de <= de;
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if(~vs & ~old_de & de) vcnt <= vcnt + 1;
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if(calch & de) hcnt <= hcnt + 1;
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if(old_de & ~de) calch <= 0;
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if(old_vs & ~vs) begin
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vid_int <= {vid_int[0],f1};
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if(~f1) begin
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if(hcnt && vcnt) begin
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old_vmode <= new_vmode;
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//report new resolution after timeout
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if(resto) resto <= resto + 1'd1;
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if(vid_hcnt != hcnt || vid_vcnt != vcnt || old_vmode != new_vmode) resto <= 1;
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if(&resto) vid_nres <= vid_nres + 1'd1;
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vid_hcnt <= hcnt;
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vid_vcnt <= vcnt;
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end
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vcnt <= 0;
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hcnt <= 0;
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calch <= 1;
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end
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end
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end
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end
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reg [31:0] vid_htime = 0;
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reg [31:0] vid_vtime = 0;
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reg [31:0] vid_pix = 0;
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always @(posedge clk_100) begin
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integer vtime, htime, hcnt;
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reg old_vs, old_hs, old_vs2, old_hs2, old_de, old_de2;
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reg calch = 0;
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old_vs <= vs;
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old_hs <= hs;
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old_vs2 <= old_vs;
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old_hs2 <= old_hs;
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vtime <= vtime + 1'd1;
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htime <= htime + 1'd1;
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if(~old_vs2 & old_vs) begin
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vid_pix <= hcnt;
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vid_vtime <= vtime;
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vtime <= 0;
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hcnt <= 0;
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end
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if(old_vs2 & ~old_vs) calch <= 1;
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if(~old_hs2 & old_hs) begin
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vid_htime <= htime;
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htime <= 0;
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end
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old_de <= de;
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old_de2 <= old_de;
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if(calch & old_de) hcnt <= hcnt + 1;
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if(old_de2 & ~old_de) calch <= 0;
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end
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reg [31:0] vid_vtime_hdmi;
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always @(posedge clk_100) begin
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integer vtime;
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reg old_vs, old_vs2;
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old_vs <= vs_hdmi;
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old_vs2 <= old_vs;
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vtime <= vtime + 1'd1;
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if(~old_vs2 & old_vs) begin
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vid_vtime_hdmi <= vtime;
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vtime <= 0;
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end
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end
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endmodule
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//
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// Phase shift helper module for better 64MB/128MB modules support.
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//
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99
sys/osd.v
99
sys/osd.v
@@ -22,14 +22,12 @@ module osd
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);
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parameter OSD_COLOR = 3'd4;
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parameter OSD_X_OFFSET = 12'd0;
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parameter OSD_Y_OFFSET = 12'd0;
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localparam OSD_WIDTH = 12'd256;
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localparam OSD_HEIGHT = 12'd64;
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`ifdef OSD_HEADER
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localparam OSD_HDR = 12'd32;
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localparam OSD_HDR = 12'd24;
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`else
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localparam OSD_HDR = 12'd0;
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`endif
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@@ -42,7 +40,11 @@ reg [8:0] infoh;
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reg [8:0] infow;
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reg [11:0] infox;
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reg [21:0] infoy;
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reg [21:0] hrheight;
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reg [21:0] osd_h;
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reg [21:0] osd_t;
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reg [21:0] osd_w;
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reg [1:0] rot = 0;
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always@(posedge clk_sys) begin
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reg [12:0] bcnt;
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@@ -51,7 +53,9 @@ always@(posedge clk_sys) begin
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reg old_strobe;
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reg highres = 0;
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hrheight <= info ? infoh : ((OSD_HEIGHT<<highres)+OSD_HDR);
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osd_t <= rot[0] ? OSD_WIDTH : (OSD_HEIGHT<<1);
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osd_h <= rot[0] ? (info ? infow : OSD_WIDTH) : info ? infoh : (OSD_HEIGHT<<highres);
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osd_w <= rot[0] ? (info ? infoh : (OSD_HEIGHT<<highres)) : (info ? infow : OSD_WIDTH);
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old_strobe <= io_strobe;
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@@ -83,6 +87,7 @@ always@(posedge clk_sys) begin
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if(bcnt == 1) infoy <= io_din[11:0];
|
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if(bcnt == 2) infow <= {io_din[5:0], 3'b000};
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if(bcnt == 3) infoh <= {io_din[5:0], 3'b000};
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if(bcnt == 4) rot <= io_din[1:0];
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end
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// command 0x20: OSDCMDWRITE
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@@ -96,21 +101,21 @@ end
|
||||
|
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(* direct_enable *) reg ce_pix;
|
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always @(negedge clk_video) begin
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integer cnt = 0;
|
||||
integer pixsz, pixcnt;
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reg [21:0] cnt = 0;
|
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reg [21:0] pixsz, pixcnt;
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reg deD;
|
||||
|
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cnt <= cnt + 1;
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cnt <= cnt + 1'd1;
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deD <= de_in;
|
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pixcnt <= pixcnt + 1;
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pixcnt <= pixcnt + 1'd1;
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if(pixcnt == pixsz) pixcnt <= 0;
|
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ce_pix <= !pixcnt;
|
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if(~deD && de_in) cnt <= 0;
|
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|
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if(deD && ~de_in) begin
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pixsz <= (((cnt+1'b1) >> 9) > 1) ? (((cnt+1'b1) >> 9) - 1) : 0;
|
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pixsz <= (((cnt+1'b1) >> (9-rot[0])) > 1) ? (((cnt+1'b1) >> (9-rot[0])) - 1'd1) : 22'd0;
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pixcnt <= 0;
|
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end
|
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end
|
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@@ -119,19 +124,24 @@ reg [2:0] osd_de;
|
||||
reg osd_pixel;
|
||||
reg [21:0] v_cnt;
|
||||
|
||||
reg v_cnt_below320, v_cnt_below640, v_cnt_below960;
|
||||
reg v_cnt_half, v_cnt_single, v_cnt_double, v_cnt_triple;
|
||||
|
||||
reg [21:0] v_osd_start_320, v_osd_start_640, v_osd_start_960, v_osd_start_other;
|
||||
reg [21:0] v_osd_start_h, v_osd_start_s, v_osd_start_d, v_osd_start_t, v_osd_start_q;
|
||||
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||||
wire [21:0] osd_h_hdr = (info || rot) ? osd_h : (osd_h + OSD_HDR);
|
||||
|
||||
// pipeline the comparisons a bit
|
||||
always @(posedge clk_video) if(ce_pix) begin
|
||||
v_cnt_below320 <= v_cnt < 320;
|
||||
v_cnt_below640 <= v_cnt < 640;
|
||||
v_cnt_below960 <= v_cnt < 960;
|
||||
v_osd_start_320 <= ((v_cnt-hrheight)>>1) + OSD_Y_OFFSET;
|
||||
v_osd_start_640 <= ((v_cnt-(hrheight<<1))>>1) + OSD_Y_OFFSET;
|
||||
v_osd_start_960 <= ((v_cnt-(hrheight + (hrheight<<1)))>>1) + OSD_Y_OFFSET;
|
||||
v_osd_start_other <= ((v_cnt-(hrheight<<2))>>1) + OSD_Y_OFFSET;
|
||||
v_cnt_half <= v_cnt < osd_t;
|
||||
v_cnt_single <= v_cnt < 320;
|
||||
v_cnt_double <= v_cnt < 640;
|
||||
v_cnt_triple <= v_cnt < 960;
|
||||
|
||||
v_osd_start_h <= ((v_cnt-(osd_h_hdr>>1))>>1);
|
||||
v_osd_start_s <= ((v_cnt-osd_h_hdr)>>1);
|
||||
v_osd_start_d <= ((v_cnt-(osd_h_hdr<<1))>>1);
|
||||
v_osd_start_t <= ((v_cnt-(osd_h_hdr + (osd_h_hdr<<1)))>>1);
|
||||
v_osd_start_q <= ((v_cnt-(osd_h_hdr<<2))>>1);
|
||||
end
|
||||
|
||||
always @(posedge clk_video) begin
|
||||
@@ -145,22 +155,31 @@ always @(posedge clk_video) begin
|
||||
reg [21:0] h_osd_start;
|
||||
reg [21:0] v_osd_start;
|
||||
reg [21:0] osd_hcnt;
|
||||
reg [21:0] osd_hcnt2;
|
||||
reg osd_de1,osd_de2;
|
||||
reg [1:0] osd_en;
|
||||
reg f1;
|
||||
reg half;
|
||||
|
||||
if(ce_pix) begin
|
||||
|
||||
deD <= de_in;
|
||||
if(~&h_cnt) h_cnt <= h_cnt + 1'd1;
|
||||
|
||||
if(~&osd_hcnt) osd_hcnt <= osd_hcnt + 1'd1;
|
||||
if(~&osd_hcnt) osd_hcnt <= osd_hcnt + 1'd1;
|
||||
if(~&osd_hcnt2) osd_hcnt2 <= osd_hcnt2 + 1'd1;
|
||||
|
||||
if (h_cnt == h_osd_start) begin
|
||||
osd_de[0] <= osd_en[1] && hrheight && (info ? (osd_vcnt < hrheight) :
|
||||
(!osd_vcnt[11:7] || (osd_vcnt[11] && osd_vcnt[7] && (osd_vcnt[6:0] >= 4) && (osd_vcnt[6:0] < 19))));
|
||||
osd_de[0] <= osd_en[1] && osd_h && (
|
||||
osd_vcnt[11] ? (osd_vcnt[7] && (osd_vcnt[6:0] >= 4) && (osd_vcnt[6:0] < 19)) :
|
||||
(info && (rot == 3)) ? !osd_vcnt[21:8] :
|
||||
(osd_vcnt < osd_h)
|
||||
);
|
||||
osd_hcnt <= 0;
|
||||
osd_hcnt2 <= 0;
|
||||
if(info && rot == 1) osd_hcnt2 <= 22'd128-infoh;
|
||||
end
|
||||
if (osd_hcnt+1 == (info ? infow : OSD_WIDTH)) osd_de[0] <= 0;
|
||||
if (osd_hcnt+1 == osd_w) osd_de[0] <= 0;
|
||||
|
||||
// falling edge of de
|
||||
if(!de_in && deD) dsp_width <= h_cnt[21:0];
|
||||
@@ -169,7 +188,7 @@ always @(posedge clk_video) begin
|
||||
if(de_in && !deD) begin
|
||||
h_cnt <= 0;
|
||||
v_cnt <= v_cnt + 1'd1;
|
||||
h_osd_start <= info ? infox : (((dsp_width - OSD_WIDTH)>>1) + OSD_X_OFFSET - 2'd2);
|
||||
h_osd_start <= info ? (rot[0] ? infoy : infox) : (((dsp_width - osd_w)>>1) - 2'd2);
|
||||
|
||||
if(h_cnt > {dsp_width, 2'b00}) begin
|
||||
v_cnt <= 1;
|
||||
@@ -179,21 +198,27 @@ always @(posedge clk_video) begin
|
||||
osd_en <= (osd_en << 1) | osd_enable;
|
||||
if(~osd_enable) osd_en <= 0;
|
||||
|
||||
if(v_cnt_below320) begin
|
||||
half <= 0;
|
||||
if(v_cnt_half) begin
|
||||
multiscan <= 0;
|
||||
v_osd_start <= info ? infoy : v_osd_start_320;
|
||||
v_osd_start <= info ? (rot[0] ? infox : infoy) : v_osd_start_h;
|
||||
half <= 1;
|
||||
end
|
||||
else if(v_cnt_below640) begin
|
||||
else if(v_cnt_single | (rot[0] & v_cnt_double)) begin
|
||||
multiscan <= 0;
|
||||
v_osd_start <= info ? (rot[0] ? infox : infoy) : v_osd_start_s;
|
||||
end
|
||||
else if(rot[0] ? v_cnt_triple : v_cnt_double) begin
|
||||
multiscan <= 1;
|
||||
v_osd_start <= info ? (infoy<<1) : v_osd_start_640;
|
||||
v_osd_start <= info ? (rot[0] ? (infox<<1) : (infoy<<1)) : v_osd_start_d;
|
||||
end
|
||||
else if(v_cnt_below960) begin
|
||||
else if(v_cnt_triple | rot[0]) begin
|
||||
multiscan <= 2;
|
||||
v_osd_start <= info ? (infoy + (infoy << 1)) : v_osd_start_960;
|
||||
v_osd_start <= info ? (rot[0] ? (infox + (infox << 1)) : (infoy + (infoy << 1))) : v_osd_start_t;
|
||||
end
|
||||
else begin
|
||||
multiscan <= 3;
|
||||
v_osd_start <= info ? (infoy<<2) : v_osd_start_other;
|
||||
v_osd_start <= info ? (rot[0] ? (infox<<2) : (infoy<<2)) : v_osd_start_q;
|
||||
end
|
||||
end
|
||||
end
|
||||
@@ -201,14 +226,18 @@ always @(posedge clk_video) begin
|
||||
osd_div <= osd_div + 1'd1;
|
||||
if(osd_div == multiscan) begin
|
||||
osd_div <= 0;
|
||||
if(~osd_vcnt[10]) osd_vcnt <= osd_vcnt + 1'd1;
|
||||
if(~osd_vcnt[10]) osd_vcnt <= osd_vcnt + 1'd1 + half;
|
||||
if(osd_vcnt == 'b100010011111 && ~info) osd_vcnt <= 0;
|
||||
end
|
||||
if(v_osd_start == v_cnt) {osd_div, osd_vcnt} <= OSD_HDR ? {~info, 3'b000, ~info, 7'b0000000} : 22'd0;
|
||||
if(v_osd_start == v_cnt) begin
|
||||
{osd_div,osd_vcnt} <= 0;
|
||||
if(info && rot == 3) osd_vcnt <= 22'd256-infow;
|
||||
else if(OSD_HDR && !rot) osd_vcnt <= {~info, 3'b000, ~info, 7'b0000000};
|
||||
end
|
||||
end
|
||||
|
||||
osd_byte <= osd_buffer[{osd_vcnt[7:3], osd_hcnt[7:0]}];
|
||||
osd_pixel <= osd_byte[osd_vcnt[2:0]];
|
||||
osd_byte <= osd_buffer[rot[0] ? ({osd_hcnt2[6:3], osd_vcnt[7:0]} ^ { {4{~rot[1]}}, {8{rot[1]}} }) : {osd_vcnt[7:3], osd_hcnt[7:0]}];
|
||||
osd_pixel <= osd_byte[rot[0] ? ((osd_hcnt2[2:0]-1'd1) ^ {3{~rot[1]}}) : osd_vcnt[2:0]];
|
||||
osd_de[2:1] <= osd_de[1:0];
|
||||
end
|
||||
end
|
||||
|
||||
@@ -35,3 +35,14 @@ set_false_path -to [get_ports {AUDIO_R}]
|
||||
set_false_path -to {cfg[*]}
|
||||
set_false_path -from {cfg[*]}
|
||||
set_false_path -to {wcalc[*] hcalc[*]}
|
||||
|
||||
set_multicycle_path -to {*_osd|osd_vcnt*} -setup 2
|
||||
set_multicycle_path -to {*_osd|osd_vcnt*} -hold 2
|
||||
set_false_path -to {*_osd|v_cnt*}
|
||||
set_false_path -to {*_osd|v_osd_start*}
|
||||
set_false_path -to {*_osd|h_osd_start*}
|
||||
set_false_path -from {*_osd|v_osd_start*}
|
||||
set_false_path -from {*_osd|h_osd_start*}
|
||||
set_false_path -from {*_osd|rot*}
|
||||
set_false_path -from {*_osd|dsp_width*}
|
||||
set_false_path -to {*_osd|half}
|
||||
|
||||
Reference in New Issue
Block a user