diff --git a/Microcomputer6502Basic.vhd b/Microcomputer6502Basic.vhd index 6f67b72..9dd4859 100644 --- a/Microcomputer6502Basic.vhd +++ b/Microcomputer6502Basic.vhd @@ -60,7 +60,6 @@ entity Microcomputer6502Basic is sdMOSI : out std_logic; sdMISO : in std_logic; sdSCLK : out std_logic; - sd_ctrl_sel : in std_logic; driveLED : out std_logic :='1' ); end Microcomputer6502Basic; @@ -103,11 +102,6 @@ architecture struct of Microcomputer6502Basic is signal n_interface2CS : std_logic :='1'; signal n_sdCardCS : std_logic :='1'; - signal sdCardDataOut_sd : std_logic_vector(7 downto 0); - signal sdCardDataOut_img : std_logic_vector(7 downto 0); - signal driveLED_sd, driveLED_img : std_logic; - signal sdMISO_int : std_logic; -- Add this signal declaration - signal serialClkCount : unsigned(15 downto 0); signal cpuClkCount : std_logic_vector(5 downto 0); signal sdClkCount : std_logic_vector(5 downto 0); @@ -234,34 +228,18 @@ sd1 : entity work.sd_controller port map( sdCS => sdCS, sdMOSI => sdMOSI, - sdMISO => sdMISO_int, + sdMISO => sdMISO, sdSCLK => sdSCLK, n_wr => n_sdCardCS or cpuClock or n_WR, n_rd => n_sdCardCS or cpuClock or (not n_WR), n_reset => N_RESET, dataIn => cpuDataOut, - dataOut => sdCardDataOut_sd, + dataOut => sdCardDataOut, regAddr => cpuAddress(2 downto 0), - driveLED => driveLED_sd, + driveLED => driveLED, clk => sdClock -- twice the spi clk ); - -- Add signal assignment outside port map: - sdMISO_int <= sdMISO when sd_ctrl_sel = '0' else '1'; - - -- New image controller - img1 : entity work.image_controller - port map( - clk => clk, - n_reset => N_RESET, - n_rd => n_sdCardCS or n_ioRD, - n_wr => n_sdCardCS or n_ioWR, - dataIn => cpuDataOut, - dataOut => sdCardDataOut_img, - regAddr => cpuAddress(2 downto 0), - driveLED => driveLED_img - ); - -- ____________________________________________________________________________________ -- MEMORY READ/WRITE LOGIC GOES HERE @@ -279,13 +257,6 @@ n_internalRam1CS <= not n_basRomCS; -- Full Internal RAM - 64 K -- ____________________________________________________________________________________ -- BUS ISOLATION GOES HERE - -- Mux controller outputs based on selection - sdCardDataOut <= sdCardDataOut_img when sd_ctrl_sel = '1' else - sdCardDataOut_sd; - - driveLED <= driveLED_img when sd_ctrl_sel = '1' else - driveLED_sd; - cpuDataIn <= interface1DataOut when n_interface1CS = '0' else diff --git a/Microcomputer6809Basic.vhd b/Microcomputer6809Basic.vhd index 0778a86..7cc6635 100644 --- a/Microcomputer6809Basic.vhd +++ b/Microcomputer6809Basic.vhd @@ -60,7 +60,6 @@ entity Microcomputer6809Basic is sdMOSI : out std_logic; sdMISO : in std_logic; sdSCLK : out std_logic; - sd_ctrl_sel : in std_logic; driveLED : out std_logic :='1' ); end Microcomputer6809Basic; @@ -103,11 +102,6 @@ architecture struct of Microcomputer6809Basic is signal n_interface2CS : std_logic :='1'; signal n_sdCardCS : std_logic :='1'; - signal sdCardDataOut_sd : std_logic_vector(7 downto 0); - signal sdCardDataOut_img : std_logic_vector(7 downto 0); - signal driveLED_sd, driveLED_img : std_logic; - signal sdMISO_int : std_logic; -- Add this signal declaration - signal serialClkCount : unsigned(15 downto 0); signal cpuClkCount : std_logic_vector(5 downto 0); signal sdClkCount : std_logic_vector(5 downto 0); @@ -180,7 +174,7 @@ port map io1 : entity work.SBCTextDisplayRGB port map ( - n_reset => reset_n_internal, + n_reset => N_RESET, clk => clk, -- RGB video signals @@ -232,34 +226,18 @@ sd1 : entity work.sd_controller port map( sdCS => sdCS, sdMOSI => sdMOSI, - sdMISO => sdMISO_int, + sdMISO => sdMISO, sdSCLK => sdSCLK, n_wr => n_sdCardCS or cpuClock or n_WR, n_rd => n_sdCardCS or cpuClock or (not n_WR), - n_reset => reset_n_internal, + n_reset => N_RESET, dataIn => cpuDataOut, - dataOut => sdCardDataOut_sd, + dataOut => sdCardDataOut, regAddr => cpuAddress(2 downto 0), - driveLED => driveLED_sd, + driveLED => driveLED, clk => sdClock -- twice the spi clk ); - -- Add signal assignment outside port map: - sdMISO_int <= sdMISO when sd_ctrl_sel = '0' else '1'; - - -- New image controller - img1 : entity work.image_controller - port map( - clk => clk, - n_reset => reset_n_internal, - n_rd => n_sdCardCS or n_ioRD, - n_wr => n_sdCardCS or n_ioWR, - dataIn => cpuDataOut, - dataOut => sdCardDataOut_img, - regAddr => cpuAddress(2 downto 0), - driveLED => driveLED_img - ); - -- ____________________________________________________________________________________ -- MEMORY READ/WRITE LOGIC GOES HERE @@ -277,13 +255,6 @@ n_internalRam1CS <= not n_basRomCS; -- Full Internal RAM - 64 K -- ____________________________________________________________________________________ -- BUS ISOLATION GOES HERE - -- Mux controller outputs based on selection - sdCardDataOut <= sdCardDataOut_img when sd_ctrl_sel = '1' else - sdCardDataOut_sd; - - driveLED <= driveLED_img when sd_ctrl_sel = '1' else - driveLED_sd; - cpuDataIn <= interface1DataOut when n_interface1CS = '0' else diff --git a/MicrocomputerZ80Basic.vhd b/MicrocomputerZ80Basic.vhd index 712c05c..5a656ba 100644 --- a/MicrocomputerZ80Basic.vhd +++ b/MicrocomputerZ80Basic.vhd @@ -60,7 +60,6 @@ entity MicrocomputerZ80Basic is sdMOSI : out std_logic; sdMISO : in std_logic; sdSCLK : out std_logic; - sd_ctrl_sel : in std_logic; driveLED : out std_logic :='1' ); end MicrocomputerZ80Basic; @@ -103,12 +102,6 @@ architecture struct of MicrocomputerZ80Basic is signal n_interface2CS : std_logic :='1'; signal n_sdCardCS : std_logic :='1'; - signal sdCardDataOut_sd : std_logic_vector(7 downto 0); - signal sdCardDataOut_img : std_logic_vector(7 downto 0); - signal driveLED_sd, driveLED_img : std_logic; - signal sdMISO_int : std_logic; -- Add this signal declaration - - signal serialClkCount : unsigned(15 downto 0); signal cpuClkCount : std_logic_vector(5 downto 0); signal sdClkCount : std_logic_vector(5 downto 0); @@ -236,33 +229,18 @@ sd1 : entity work.sd_controller port map( sdCS => sdCS, sdMOSI => sdMOSI, - sdMISO => sdMISO_int, + sdMISO => sdMISO, sdSCLK => sdSCLK, n_wr => n_sdCardCS or n_ioWR, n_rd => n_sdCardCS or n_ioRD, n_reset => N_RESET, dataIn => cpuDataOut, - dataOut => sdCardDataOut_sd, + dataOut => sdCardDataOut, regAddr => cpuAddress(2 downto 0), - driveLED => driveLED_sd, + driveLED => driveLED, clk => sdClock -- twice the spi clk ); - -- Add signal assignment outside port map: - sdMISO_int <= sdMISO when sd_ctrl_sel = '0' else '1'; - - -- New image controller - img1 : entity work.image_controller - port map( - clk => clk, - n_reset => N_RESET, - n_rd => n_sdCardCS or n_ioRD, - n_wr => n_sdCardCS or n_ioWR, - dataIn => cpuDataOut, - dataOut => sdCardDataOut_img, - regAddr => cpuAddress(2 downto 0), - driveLED => driveLED_img - ); -- ____________________________________________________________________________________ @@ -286,14 +264,6 @@ n_internalRam1CS <= not n_basRomCS; -- Full Internal RAM - 64 K -- ____________________________________________________________________________________ -- BUS ISOLATION GOES HERE - -- Mux controller outputs based on selection - sdCardDataOut <= sdCardDataOut_img when sd_ctrl_sel = '1' else - sdCardDataOut_sd; - - driveLED <= driveLED_img when sd_ctrl_sel = '1' else - driveLED_sd; - - cpuDataIn <= interface1DataOut when n_interface1CS = '0' else interface2DataOut when n_interface2CS = '0' else diff --git a/MicrocomputerZ80CPM.vhd b/MicrocomputerZ80CPM.vhd index 5edfa6f..04fc392 100644 --- a/MicrocomputerZ80CPM.vhd +++ b/MicrocomputerZ80CPM.vhd @@ -60,7 +60,6 @@ entity MicrocomputerZ80CPM is sdMOSI : out std_logic; sdMISO : in std_logic; sdSCLK : out std_logic; - sd_ctrl_sel : in std_logic; driveLED : out std_logic :='1'; usbCS : out std_logic; @@ -116,10 +115,6 @@ architecture struct of MicrocomputerZ80CPM is signal cpuClock : std_logic; signal serialClock : std_logic; signal sdClock : std_logic; - signal sdCardDataOut_sd : std_logic_vector(7 downto 0); - signal sdCardDataOut_img : std_logic_vector(7 downto 0); - signal driveLED_sd, driveLED_img : std_logic; - signal sdMISO_int : std_logic; -- Add this signal declaration --CPM signal n_RomActive : std_logic := '0'; @@ -277,34 +272,18 @@ port map( port map( sdCS => sdCS, sdMOSI => sdMOSI, - sdMISO => sdMISO_int, -- Use the internal signal + sdMISO => sdMISO, sdSCLK => sdSCLK, n_wr => n_sdCardCS or n_ioWR, n_rd => n_sdCardCS or n_ioRD, n_reset => N_RESET, dataIn => cpuDataOut, - dataOut => sdCardDataOut_sd, + dataOut => sdCardDataOut, regAddr => cpuAddress(2 downto 0), - driveLED => driveLED_sd, + driveLED => driveLED, clk => clk ); - -- Add signal assignment outside port map: - sdMISO_int <= sdMISO when sd_ctrl_sel = '0' else '1'; - - -- New image controller - img1 : entity work.image_controller - port map( - clk => clk, - n_reset => N_RESET, - n_rd => n_sdCardCS or n_ioRD, - n_wr => n_sdCardCS or n_ioWR, - dataIn => cpuDataOut, - dataOut => sdCardDataOut_img, - regAddr => cpuAddress(2 downto 0), - driveLED => driveLED_img - ); - usb : ch376s_module port map ( sdcs => usbCS, @@ -345,13 +324,6 @@ n_internalRam1CS <= not n_basRomCS; -- Full Internal RAM - 64 K -- ____________________________________________________________________________________ -- BUS ISOLATION GOES HERE - -- Mux controller outputs based on selection - sdCardDataOut <= sdCardDataOut_img when sd_ctrl_sel = '1' else - sdCardDataOut_sd; - - driveLED <= driveLED_img when sd_ctrl_sel = '1' else - driveLED_sd; - -- CPU data input mux needs to be written like this: cpuDataIn <= interface1DataOut when (n_interface1CS = '0') else interface2DataOut when (n_interface2CS = '0') else diff --git a/MultiComp.qsf b/MultiComp.qsf index bcf3ec6..f32bced 100644 --- a/MultiComp.qsf +++ b/MultiComp.qsf @@ -329,4 +329,86 @@ set_global_assignment -name VHDL_FILE MicrocomputerZ80CPM.vhd set_global_assignment -name VHDL_FILE Microcomputer6502Basic.vhd set_global_assignment -name VHDL_FILE Microcomputer6809Basic.vhd set_global_assignment -name VHDL_FILE MicrocomputerZ80Basic.vhd +set_global_assignment -name ENABLE_SIGNALTAP ON +set_global_assignment -name USE_SIGNALTAP_FILE "output_files/status13-stp1.stp" +set_global_assignment -name SIGNALTAP_FILE "output_files/status13-stp1.stp" +set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "emu:emu|CLK_50M" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[8] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|n_reset" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|dataOut[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to "emu:emu|MicrocomputerZ80CPM:MicrocomputerZ80CPM|sd_controller:sd1|n_reset" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_BLOCK_TYPE=AUTO" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=9" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=9" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_BITS=9" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=805334528" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000000000000000000000000" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=48" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_INVERSION_MASK_LENGTH=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=128" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ATTRIBUTE_MEM_MODE=OFF" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_FLOW_USE_GENERATED=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_BITS=11" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_BUFFER_FULL_STOP=1" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_CURRENT_RESOURCE_WIDTH=1" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INCREMENTAL_ROUTING=1" -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[0] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[1] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[2] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[3] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[4] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[5] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[6] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[7] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[8] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[9] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[10] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[11] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[12] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[13] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[14] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[15] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[16] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[17] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[18] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[19] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[20] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[21] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[22] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[23] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[24] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[25] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[26] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[27] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[28] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[29] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[30] -to auto_signaltap_0|vcc -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[31] -to auto_signaltap_0|gnd -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=128" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_PIPELINE=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_PIPELINE=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_COUNTER_PIPELINE=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0 +set_global_assignment -name SLD_FILE "db/status13-stp1_auto_stripped.stp" set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/MultiComp.sv b/MultiComp.sv index a116830..65aec92 100644 --- a/MultiComp.sv +++ b/MultiComp.sv @@ -25,7 +25,6 @@ // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. //============================================================================ - module emu ( //Master input clock @@ -205,6 +204,8 @@ assign {DDRAM_CLK, DDRAM_BURSTCNT, DDRAM_ADDR, DDRAM_DIN, DDRAM_BE, DDRAM_RD, DD //assign UART_RTS = UART_CTS; assign UART_DTR = UART_DSR; +assign LED_USER = vsd_sel & sd_act; +assign LED_DISK = ~driveLED; assign LED_POWER = 0; assign BUTTONS = 0; @@ -308,41 +309,49 @@ wire reset = RESET | status[0] | buttons[1] | (status[15] && img_mounted); ///////////////// SDCARD //////////////////////// -// SD card interface signal declarations -// _sd suffix for SD controller signals -// _img suffix for image controller signals -// _mux suffix for multiplexed signals -wire sdclk_sd, sdmosi_sd, sdcs_sd; // SD controller outputs -wire sdclk_img, sdmosi_img, sdcs_img; // Image controller outputs -wire driveLED_sd, driveLED_img; // Drive activity indicators +wire sdclk; +wire sdmosi; +wire sdmiso = vsd_sel ? vsdmiso : SD_MISO; +wire sdss; -// Multiplexed signals that route to physical SD interface -wire sdclk_mux, sdmosi_mux, sdcs_mux; // Multiplexed control signals -wire sdmiso_mux; // Multiplexed data input -wire driveLED_mux; // Multiplexed activity indicator - -// Controller selection - determines which controller drives SD interface -//wire storage_ctrl_select = status[13]; // 0=SD controller, 1=image controller -wire storage_ctrl_select = status[13]; // 0=SD controller, 1=image controller - -// Multiplex between SD and image controller outputs -assign sdclk_mux = storage_ctrl_select ? sdclk_img : sdclk_sd; // Clock output -assign sdmosi_mux = storage_ctrl_select ? sdmosi_img : sdmosi_sd; // Data output to SD -assign sdcs_mux = storage_ctrl_select ? sdcs_img : sdcs_sd; // Chip select -assign driveLED_mux = storage_ctrl_select ? driveLED_img : driveLED_sd; // Activity LED - -// MISO input routing - selects between SD card and virtual SD based on vsd_sel -assign sdmiso_mux = vsd_sel ? vsdmiso : SD_MISO; - -// Virtual SD interface enable +wire vsdmiso; reg vsd_sel = 0; + always @(posedge clk_sys) if(img_mounted) vsd_sel <= |img_size; -// Map multiplexed signals to physical SD interface -// Keep physical SD enabled when using SD controller -assign SD_SCK = (vsd_sel || !storage_ctrl_select) ? sdclk_mux : 1'bZ; -assign SD_MOSI = (vsd_sel || !storage_ctrl_select) ? sdmosi_mux : 1'bZ; -assign SD_CS = (vsd_sel || !storage_ctrl_select) ? sdcs_mux : 1'bZ; +sd_card sd_card +( + .*, + + .clk_spi(clk_sys), + .sdhc(1), + .sck(sdclk), + .ss(sdss | ~vsd_sel), + .mosi(sdmosi), + .miso(vsdmiso) +); + +assign SD_CS = sdss | vsd_sel; +assign SD_SCK = sdclk & ~vsd_sel; +assign SD_MOSI = sdmosi & ~vsd_sel; + +reg sd_act; + +always @(posedge clk_sys) begin + reg old_mosi, old_miso; + integer timeout = 0; + + old_mosi <= sdmosi; + old_miso <= sdmiso; + + sd_act <= 0; + if(timeout < 1000000) begin + timeout <= timeout + 1; + sd_act <= 1; + end + + if((old_mosi ^ sdmosi) || (old_miso ^ sdmiso)) timeout <= 0; +end // Serial port selection wire serial_port_select = status[12]; // 0 = Console Port (UART), 1 = User IO Port @@ -401,40 +410,6 @@ assign user_tx = USER_OUT[1]; assign user_rts = USER_OUT[2]; assign user_cts_en = USER_OUT[3]; -// Virtual SD card implementation -sd_card sd_card -( - .*, - .clk_spi(clk_sys), - .sdhc(1), - .sck(sdclk_mux), - .ss(sdcs_mux | ~vsd_sel), - .mosi(sdmosi_mux), - .miso(vsdmiso) -); - -// Drive activity detection -reg sd_act; -always @(posedge clk_sys) begin - reg old_mosi, old_miso; - integer timeout = 0; - - old_mosi <= sdmosi_mux; - old_miso <= sdmiso_mux; - - sd_act <= 0; - if(timeout < 1000000) begin - timeout <= timeout + 1; - sd_act <= 1; - end - - if((old_mosi ^ sdmosi_mux) || (old_miso ^ sdmiso_mux)) timeout <= 0; -end - -// Map drive LED to system LED output -assign LED_USER = vsd_sel & sd_act; -assign LED_DISK = {2{~driveLED_mux}}; - /////////////////////////////////////////////////// assign CLK_VIDEO = clk_sys; @@ -448,19 +423,19 @@ wire [2:0] baud_rate = status[11:9]; wire hblank, vblank; wire hs, vs; wire [1:0] r,g,b; +wire driveLED; wire [3:0] _hblank, _vblank; wire [3:0] _hs, _vs; wire [1:0] _r[3:0], _g[3:0], _b[3:0]; +wire [3:0] _driveLED; wire [3:0] _CE_PIXEL; +wire [3:0] _SD_CS; +wire [3:0] _SD_MOSI; +wire [3:0] _SD_SCK; wire [3:0] _txd; wire [3:0] _rts; // RTS signals from CPUs -// Define signal arrays for each microcomputer's SD interface -wire [3:0] sdcs_ctrl; // SD chip select signals from controllers -wire [3:0] sdmosi_ctrl; // SD MOSI signals from controllers -wire [3:0] sdclk_ctrl; // SD clock signals from controllers -wire [3:0] driveLED_ctrl; // Drive LED signals from controllers // Add baud rate selection logic reg [15:0] baud_increment; @@ -486,36 +461,12 @@ begin g <= _g[cpu_type][1:0]; b <= _b[cpu_type][1:0]; CE_PIXEL <= _CE_PIXEL[cpu_type]; + sdss <= _SD_CS[cpu_type]; + sdmosi <= _SD_MOSI[cpu_type]; + sdclk <= _SD_SCK[cpu_type]; + driveLED <= _driveLED[cpu_type]; serial_tx <= _txd[cpu_type]; serial_rts <= _rts[cpu_type]; - - // Override based on selected CPU - case(cpu_type) - cpuZ80CPM: begin - sdcs_sd = sdcs_ctrl[cpuZ80CPM]; - sdmosi_sd = sdmosi_ctrl[cpuZ80CPM]; - sdclk_sd = sdclk_ctrl[cpuZ80CPM]; - driveLED_sd = driveLED_ctrl[cpuZ80CPM]; - end - cpuZ80Basic: begin - sdcs_sd = sdcs_ctrl[cpuZ80Basic]; - sdmosi_sd = sdmosi_ctrl[cpuZ80Basic]; - sdclk_sd = sdclk_ctrl[cpuZ80Basic]; - driveLED_sd = driveLED_ctrl[cpuZ80Basic]; - end - cpu6502Basic: begin - sdcs_sd = sdcs_ctrl[cpu6502Basic]; - sdmosi_sd = sdmosi_ctrl[cpu6502Basic]; - sdclk_sd = sdclk_ctrl[cpu6502Basic]; - driveLED_sd = driveLED_ctrl[cpu6502Basic]; - end - cpu6809Basic: begin - sdcs_sd = sdcs_ctrl[cpu6809Basic]; - sdmosi_sd = sdmosi_ctrl[cpu6809Basic]; - sdclk_sd = sdclk_ctrl[cpu6809Basic]; - driveLED_sd = driveLED_ctrl[cpu6809Basic]; - end - endcase end MicrocomputerZ80CPM MicrocomputerZ80CPM @@ -533,12 +484,11 @@ MicrocomputerZ80CPM MicrocomputerZ80CPM .cepix(_CE_PIXEL[cpuZ80CPM]), .ps2Clk(PS2_CLK), .ps2Data(PS2_DAT), - .sdCS(sdcs_ctrl[cpuZ80CPM]), - .sdMOSI(sdmosi_ctrl[cpuZ80CPM]), - .sdMISO(sdmiso_mux), - .sdSCLK(sdclk_ctrl[cpuZ80CPM]), - .driveLED(driveLED_ctrl[cpuZ80CPM]), - .sd_ctrl_sel(storage_ctrl_select), + .sdCS (_SD_CS[cpuZ80CPM]), + .sdMOSI (_SD_MOSI[cpuZ80CPM]), + .sdMISO (sdmiso), + .sdSCLK (_SD_SCK[cpuZ80CPM]), + .driveLED(_driveLED[cpuZ80CPM]), .rxd1(serial_rx), .txd1(_txd[cpuZ80CPM]), .rts1(_rts[cpuZ80CPM]), @@ -560,12 +510,11 @@ MicrocomputerZ80Basic MicrocomputerZ80Basic .cepix(_CE_PIXEL[cpuZ80Basic]), .ps2Clk(PS2_CLK), .ps2Data(PS2_DAT), - .sdCS(sdcs_ctrl[cpuZ80Basic]), - .sdMOSI(sdmosi_ctrl[cpuZ80Basic]), - .sdMISO(sdmiso_mux), - .sdSCLK(sdclk_ctrl[cpuZ80Basic]), - .driveLED(driveLED_ctrl[cpuZ80Basic]), - .sd_ctrl_sel(storage_ctrl_select), + .sdCS(_SD_CS[cpuZ80Basic]), + .sdMOSI(_SD_MOSI[cpuZ80Basic]), + .sdMISO(sdmiso), + .sdSCLK(_SD_SCK[cpuZ80Basic]), + .driveLED(_driveLED[cpuZ80Basic]), .rxd1(serial_rx), .txd1(_txd[cpuZ80Basic]), .rts1(_rts[cpuZ80Basic]), @@ -587,12 +536,11 @@ Microcomputer6502Basic Microcomputer6502Basic .cepix(_CE_PIXEL[cpu6502Basic]), .ps2Clk(PS2_CLK), .ps2Data(PS2_DAT), - .sdCS(sdcs_ctrl[cpu6502Basic]), - .sdMOSI(sdmosi_ctrl[cpu6502Basic]), - .sdMISO(sdmiso_mux), - .sdSCLK(sdclk_ctrl[cpu6502Basic]), - .driveLED(driveLED_ctrl[cpu6502Basic]), - .sd_ctrl_sel(storage_ctrl_select), + .sdCS(_SD_CS[cpu6502Basic]), + .sdMOSI(_SD_MOSI[cpu6502Basic]), + .sdMISO(sdmiso), + .sdSCLK(_SD_SCK[cpu6502Basic]), + .driveLED(_driveLED[cpu6502Basic]), .rxd1(serial_rx), .txd1(_txd[cpu6502Basic]), .rts1(_rts[cpu6502Basic]), @@ -615,12 +563,11 @@ Microcomputer6809Basic Microcomputer6809Basic .cepix(_CE_PIXEL[cpu6809Basic]), .ps2Clk(PS2_CLK), .ps2Data(PS2_DAT), - .sdCS(sdcs_ctrl[cpu6809Basic]), - .sdMOSI(sdmosi_ctrl[cpu6809Basic]), - .sdMISO(sdmiso_mux), - .sdSCLK(sdclk_ctrl[cpu6809Basic]), - .driveLED(driveLED_ctrl[cpu6809Basic]), - .sd_ctrl_sel(storage_ctrl_select), + .sdCS(_SD_CS[cpu6809Basic]), + .sdMOSI(_SD_MOSI[cpu6809Basic]), + .sdMISO(sdmiso), + .sdSCLK(_SD_SCK[cpu6809Basic]), + .driveLED(_driveLED[cpu6809Basic]), .rxd1(serial_rx), .txd1(_txd[cpu6809Basic]), .rts1(_rts[cpu6809Basic]), diff --git a/build_id.v b/build_id.v index c884a2a..9c585b9 100644 --- a/build_id.v +++ b/build_id.v @@ -1 +1 @@ -`define BUILD_DATE "241208" \ No newline at end of file +`define BUILD_DATE "241209" \ No newline at end of file diff --git a/releases/MultiComp_20241210.rbf b/releases/MultiComp_20241210.rbf new file mode 100644 index 0000000..da29ae6 Binary files /dev/null and b/releases/MultiComp_20241210.rbf differ