From 4da3af2febf89142adea2b82e33b59f243552585 Mon Sep 17 00:00:00 2001 From: Mario Smit Date: Sat, 21 Nov 2020 21:28:30 +0100 Subject: [PATCH] fixed serial via uart --- Microcomputer6502Basic.vhd | 6 +-- Microcomputer6809Basic.vhd | 6 +-- MicrocomputerZ80Basic.vhd | 6 +-- MicrocomputerZ80CPM.vhd | 6 +-- MultiComp.qws | Bin 0 -> 619 bytes MultiComp.sv | 104 +++++++++++++++++++++++++++++++------ build_id.v | 2 +- 7 files changed, 100 insertions(+), 30 deletions(-) create mode 100644 MultiComp.qws diff --git a/Microcomputer6502Basic.vhd b/Microcomputer6502Basic.vhd index c3164cf..47d77ee 100644 --- a/Microcomputer6502Basic.vhd +++ b/Microcomputer6502Basic.vhd @@ -187,9 +187,9 @@ port map ( io2 : entity work.bufferedUART port map( clk => clk, - n_wr => n_interface1CS or cpuClock or n_WR, - n_rd => n_interface1CS or cpuClock or (not n_WR), - n_int => n_int1, + n_wr => n_interface2CS or cpuClock or n_WR, + n_rd => n_interface2CS or cpuClock or (not n_WR), + n_int => n_int2, regSel => cpuAddress(0), dataIn => cpuDataOut, dataOut => interface2DataOut, diff --git a/Microcomputer6809Basic.vhd b/Microcomputer6809Basic.vhd index 43bf4a5..68403e2 100644 --- a/Microcomputer6809Basic.vhd +++ b/Microcomputer6809Basic.vhd @@ -185,9 +185,9 @@ port map ( io2 : entity work.bufferedUART port map( clk => clk, - n_wr => n_interface1CS or cpuClock or n_WR, - n_rd => n_interface1CS or cpuClock or (not n_WR), - n_int => n_int1, + n_wr => n_interface2CS or cpuClock or n_WR, + n_rd => n_interface2CS or cpuClock or (not n_WR), + n_int => n_int2, regSel => cpuAddress(0), dataIn => cpuDataOut, dataOut => interface2DataOut, diff --git a/MicrocomputerZ80Basic.vhd b/MicrocomputerZ80Basic.vhd index c8b165b..4fc6cfa 100644 --- a/MicrocomputerZ80Basic.vhd +++ b/MicrocomputerZ80Basic.vhd @@ -188,9 +188,9 @@ port map ( io2 : entity work.bufferedUART port map( clk => clk, - n_wr => n_interface1CS or cpuClock or n_WR, - n_rd => n_interface1CS or cpuClock or (not n_WR), - n_int => n_int1, + n_wr => n_interface2CS or n_ioWR, + n_rd => n_interface2CS or n_ioRD, + n_int => n_int2, regSel => cpuAddress(0), dataIn => cpuDataOut, dataOut => interface2DataOut, diff --git a/MicrocomputerZ80CPM.vhd b/MicrocomputerZ80CPM.vhd index a9be4a2..e694b62 100644 --- a/MicrocomputerZ80CPM.vhd +++ b/MicrocomputerZ80CPM.vhd @@ -203,9 +203,9 @@ port map ( io2 : entity work.bufferedUART port map( clk => clk, - n_wr => n_interface1CS or cpuClock or n_WR, - n_rd => n_interface1CS or cpuClock or (not n_WR), - n_int => n_int1, + n_wr => n_interface2CS or n_ioWR, + n_rd => n_interface2CS or n_ioRD, + n_int => n_int2, regSel => cpuAddress(0), dataIn => cpuDataOut, dataOut => interface2DataOut, diff --git a/MultiComp.qws b/MultiComp.qws new file mode 100644 index 0000000000000000000000000000000000000000..7c92db1b6abde3dea07d2fd4896ae54c4bd8874d GIT binary patch literal 619 zcmbV}Pc8&e5Ql%=EN1Bd78W8MNz2R_iI|O8SXqg^jP4#fjc%jGLL9&y+`%;@Hnz@U z3}00q8zP}P^{VQ<`t!Zl+lfA9QKuT|Qmqbkty&XRL=AhHijWjx_jIFN8ycWybB&d1 zow!e4svcjCrc`#d>0TGFkB-P4vkv%roZY@7);oG&aqrC{+d>|tcsPymqF0s#rUteP z2wMm?`_tim*=Oie`RwNm*|$eEIiQ6)KByQP@!oH literal 0 HcmV?d00001 diff --git a/MultiComp.sv b/MultiComp.sv index 4e14f8f..25e40cf 100644 --- a/MultiComp.sv +++ b/MultiComp.sv @@ -107,7 +107,7 @@ module emu //ADC inout [3:0] ADC_BUS, - //SD-SPI + //SD-SPI SECONDARY SDCARD output SD_SCK, output SD_MOSI, input SD_MISO, @@ -160,12 +160,14 @@ module emu assign ADC_BUS = 'Z; assign USER_OUT = '1; -assign {UART_RTS, UART_TXD, UART_DTR} = 0; assign {SD_SCK, SD_MOSI, SD_CS} = 'Z; assign {SDRAM_DQ, SDRAM_A, SDRAM_BA, SDRAM_CLK, SDRAM_CKE, SDRAM_DQML, SDRAM_DQMH, SDRAM_nWE, SDRAM_nCAS, SDRAM_nRAS, SDRAM_nCS} = 'Z; assign {DDRAM_CLK, DDRAM_BURSTCNT, DDRAM_ADDR, DDRAM_DIN, DDRAM_BE, DDRAM_RD, DDRAM_WE} = 0; -assign LED_USER = 0; +assign UART_RTS = UART_CTS; +assign UART_DTR = UART_DSR; + +assign LED_USER = vsd_sel & sd_act; assign LED_DISK = ~driveLED; assign LED_POWER = 0; assign BUTTONS = 0; @@ -232,13 +234,25 @@ hps_io #( .ps2_kbd_clk_out(PS2_CLK), .ps2_kbd_data_out(PS2_DAT), + .sd_lba(sd_lba), + .sd_rd(sd_rd), + .sd_wr(sd_wr), + .sd_ack(sd_ack), + .sd_ack_conf(sd_ack_conf), + .sd_buff_addr(sd_buff_addr), + .sd_buff_dout(sd_buff_dout), + .sd_buff_din(sd_buff_din), + .sd_buff_wr(sd_buff_wr), + .img_mounted(img_mounted), .img_readonly(img_readonly), - .img_size(img_size) + .img_size(img_size), + + .uart_mode(16'b000_11111_000_11111) ); /////////////////////// CLOCKS /////////////////////////////// -wire clk_sys, clk_ram, locked; +wire clk_sys, locked; pll pll ( @@ -252,6 +266,52 @@ pll pll wire reset = RESET | status[0] | buttons[1] | status[10] | (status[14] && img_mounted); +///////////////// SDCARD //////////////////////// + +wire sdclk; +wire sdmosi; +wire sdmiso = vsd_sel ? vsdmiso : SD_MISO; +wire sdss; + +wire vsdmiso; +reg vsd_sel = 0; + +always @(posedge clk_sys) if(img_mounted) vsd_sel <= |img_size; + +sd_card sd_card +( + .*, + + .clk_spi(clk_sys), + .sdhc(1), + .sck(sdclk), + .ss(sdss | ~vsd_sel), + .mosi(sdmosi), + .miso(vsdmiso) +); + +assign SD_CS = sdss | vsd_sel; +assign SD_SCK = sdclk & ~vsd_sel; +assign SD_MOSI = sdmosi & ~vsd_sel; + +reg sd_act; + +always @(posedge clk_sys) begin + reg old_mosi, old_miso; + integer timeout = 0; + + old_mosi <= sdmosi; + old_miso <= sdmiso; + + sd_act <= 0; + if(timeout < 1000000) begin + timeout <= timeout + 1; + sd_act <= 1; + end + + if((old_mosi ^ sdmosi) || (old_miso ^ sdmiso)) timeout <= 0; +end + /////////////////////////////////////////////////// assign CLK_VIDEO = clk_sys; @@ -267,11 +327,12 @@ wire driveLED; wire [3:0] _hblank, _vblank; wire [3:0] _hs, _vs; wire [1:0] _r[3:0], _g[3:0], _b[3:0]; +wire [3:0] _driveLED; wire [3:0] _CE_PIXEL; wire [3:0] _SD_CS; wire [3:0] _SD_MOSI; wire [3:0] _SD_SCK; -wire [3:0] _driveLED; +wire [3:0] _txd[3:0]; always_comb begin @@ -283,10 +344,11 @@ begin g <= _g[cpu_type][1:0]; b <= _b[cpu_type][1:0]; CE_PIXEL <= _CE_PIXEL[cpu_type]; - SD_CS <= _SD_CS[cpu_type]; - SD_MOSI <= _SD_MOSI[cpu_type]; - SD_SCK <= _SD_SCK[cpu_type]; + sdss <= _SD_CS[cpu_type]; + sdmosi <= _SD_MOSI[cpu_type]; + sdclk <= _SD_SCK[cpu_type]; driveLED <= _driveLED[cpu_type]; + UART_TXD <= _txd[cpu_type]; end MicrocomputerZ80CPM MicrocomputerZ80CPM @@ -305,9 +367,11 @@ MicrocomputerZ80CPM MicrocomputerZ80CPM .ps2Data(PS2_DAT), .sdCS(_SD_CS[0]), .sdMOSI(_SD_MOSI[0]), - .sdMISO(SD_MISO), + .sdMISO(sdmiso), .sdSCLK(_SD_SCK[0]), - .driveLED(_driveLED[0]) + .driveLED(_driveLED[0]), + .rxd1 (UART_RXD), + .txd1 (_txd[0]) ); MicrocomputerZ80Basic MicrocomputerZ80Basic @@ -326,9 +390,11 @@ MicrocomputerZ80Basic MicrocomputerZ80Basic .ps2Data(PS2_DAT), .sdCS(_SD_CS[1]), .sdMOSI(_SD_MOSI[1]), - .sdMISO(SD_MISO), + .sdMISO(sdmiso), .sdSCLK(_SD_SCK[1]), - .driveLED(_driveLED[1]) + .driveLED(_driveLED[1]), + .rxd1 (UART_RXD), + .txd1 (_txd[1]) ); Microcomputer6502Basic Microcomputer6502Basic @@ -347,9 +413,11 @@ Microcomputer6502Basic Microcomputer6502Basic .ps2Data(PS2_DAT), .sdCS(_SD_CS[2]), .sdMOSI(_SD_MOSI[2]), - .sdMISO(SD_MISO), + .sdMISO(sdmiso), .sdSCLK(_SD_SCK[2]), - .driveLED(_driveLED[2]) + .driveLED(_driveLED[2]), + .rxd1 (UART_RXD), + .txd1 (_txd[2]) ); //Reset is not working (even on the original Grant's 6809) @@ -369,9 +437,11 @@ Microcomputer6809Basic Microcomputer6809Basic .ps2Data(PS2_DAT), .sdCS(_SD_CS[3]), .sdMOSI(_SD_MOSI[3]), - .sdMISO(SD_MISO), + .sdMISO(sdmiso), .sdSCLK(_SD_SCK[3]), - .driveLED(_driveLED[3]) + .driveLED(_driveLED[3]), + .rxd1 (UART_RXD), + .txd1 (_txd[3]) ); video_cleaner video_cleaner diff --git a/build_id.v b/build_id.v index 45f5cd7..eb65496 100644 --- a/build_id.v +++ b/build_id.v @@ -1 +1 @@ -`define BUILD_DATE "201116" \ No newline at end of file +`define BUILD_DATE "201121" \ No newline at end of file