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https://github.com/MiSTer-devel/MegaDrive_MiSTer.git
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107 lines
3.5 KiB
Systemverilog
107 lines
3.5 KiB
Systemverilog
// Cheat Code handling by Kitrinx
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// Apr 21, 2019
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// Code layout:
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// {clock bit, code flags, 32'b address, 32'b compare, 32'b replace}
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// 128 127:96 95:64 63:32 31:0
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// Integer values are in BIG endian byte order, so it up to the loader
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// or generator of the code to re-arrange them correctly.
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module CODES(
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input clk, // Best to not make it too high speed for timing reasons
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input reset, // This should only be triggered when a new rom is loaded or before new codes load, not warm reset
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input enable,
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output available,
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input [128:0] code,
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input [ADDR_WIDTH - 1:0] addr_in,
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input [DATA_WIDTH - 1:0] data_in,
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output [DATA_WIDTH - 1:0] data_out
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);
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parameter ADDR_WIDTH = 16; // Not more than 32
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parameter DATA_WIDTH = 8; // Not more than 32
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parameter MAX_CODES = 32;
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parameter BIG_ENDIAN = 0;
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localparam INDEX_SIZE = $clog2(MAX_CODES-1); // Number of bits for index, must accomodate MAX_CODES
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localparam DATA_S = DATA_WIDTH - 1;
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localparam COMP_S = DATA_S + DATA_WIDTH;
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localparam ADDR_S = COMP_S + ADDR_WIDTH;
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localparam COMP_F_S = ADDR_S + 1;
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localparam CODE_WIDTH = COMP_F_S + 1;
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localparam ENA_F_S = CODE_WIDTH + 1;
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localparam NO_ADDR_LSB = (DATA_WIDTH == 16) ? 1 : 0;
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reg [ENA_F_S:0] codes[MAX_CODES];
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wire [ADDR_WIDTH-1: 0] code_addr = code[64+:ADDR_WIDTH] ^ BIG_ENDIAN[0];
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wire [DATA_WIDTH-1: 0] code_compare = code[32+:DATA_WIDTH];
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wire [DATA_WIDTH-1: 0] code_data = code[0+:DATA_WIDTH];
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wire code_comp_f = code[96];
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wire code_width = code[97] && (DATA_WIDTH == 16);
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// If MAX_INDEX is changes, these need to be made larger
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wire [INDEX_SIZE-1:0] index, dup_index;
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reg [INDEX_SIZE:0] next_index;
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wire found_dup;
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assign index = found_dup ? dup_index : next_index[INDEX_SIZE-1:0];
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// See if the code exists already, so it can be disabled if loaded again
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always_comb begin
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int x;
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dup_index = 0;
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found_dup = 0;
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for (x = 0; x < MAX_CODES; x = x + 1) begin
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if (codes[x][ADDR_S-:ADDR_WIDTH] == code_addr) begin
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dup_index = x[INDEX_SIZE-1:0];
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found_dup = 1;
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end
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end
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end
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assign available = |next_index;
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reg code_change;
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always_ff @(posedge clk) begin
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int x;
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if (reset) begin
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next_index <= 0;
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code_change <= 0;
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for (x = 0; x < MAX_CODES; x = x + 1) codes[x] <= '0;
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end else begin
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code_change <= code[128];
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if (code[128] && ~code_change && (found_dup || next_index < MAX_CODES)) begin // detect posedge
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// replace it if the same address, otherwise, add a new code
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codes[index] <= {1'b1, code_width, code_comp_f, code_addr, code_compare, code_data};
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if (~found_dup) next_index <= next_index + 1'b1;
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end
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end
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end
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always_comb begin
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int x;
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data_out = data_in;
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if (enable) begin
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for (x = 0; x < MAX_CODES; x = x + 1) begin
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if (codes[x][ENA_F_S] && codes[x][ADDR_S-:(ADDR_WIDTH-NO_ADDR_LSB)] == addr_in[ADDR_WIDTH-1:NO_ADDR_LSB]) begin
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if (!codes[x][COMP_F_S] || (
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(DATA_WIDTH == 8 || !codes[x][CODE_WIDTH]) ? (data_in == codes[x][COMP_S-:DATA_WIDTH]) :
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(codes[x][ADDR_S-ADDR_WIDTH+1]) ? (data_in[15:8] == codes[x][(COMP_S-DATA_WIDTH+1) +:8]) :
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(data_in[7:0] == codes[x][(COMP_S-DATA_WIDTH+1) +:8]) ))
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begin
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if(DATA_WIDTH == 8 || !codes[x][CODE_WIDTH]) data_out = codes[x][DATA_S-:DATA_WIDTH];
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else if (codes[x][ADDR_S-ADDR_WIDTH+1]) data_out[15:8] = codes[x][(DATA_S-DATA_WIDTH+1) +:8];
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else data_out[7:0] = codes[x][(DATA_S-DATA_WIDTH+1) +:8];
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end
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end
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end
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end
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end
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endmodule
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