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59 lines
1.9 KiB
Verilog
59 lines
1.9 KiB
Verilog
`timescale 1ps / 1ps
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/*============================================================================
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Aznable (custom 8-bit computer system) - Casval (character map)
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Author: Jim Gregory - https://github.com/JimmyStones/
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Version: 1.0
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Date: 2021-10-20
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This program is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3 of the License, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program. If not, see <http://www.gnu.org/licenses/>.
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===========================================================================*/
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module charmap (
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input clk,
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input reset,
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input [8:0] hcnt,
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input [8:0] vcnt,
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input [7:0] chrom_data_out,
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input [7:0] fgcolram_data_out,
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input [7:0] bgcolram_data_out,
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input [7:0] chmap_data_out,
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output [11:0] chram_addr,
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output [11:0] chrom_addr,
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output [7:0] r,
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output [7:0] g,
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output [7:0] b,
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output a
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);
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// Character map
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wire [3:0] chpos_x = 4'd7 - hcnt[2:0];
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wire [2:0] chpos_y = vcnt[2:0];
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wire [5:0] chram_x = hcnt[8:3];
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wire [5:0] chram_y = vcnt[8:3];
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assign chram_addr = {chram_y, chram_x};
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assign chrom_addr = {1'b0, chmap_data_out[7:0], chpos_y};
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wire char_a = chrom_data_out[chpos_x[2:0]];
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wire [2:0] r_temp = char_a ? fgcolram_data_out[2:0] : bgcolram_data_out[2:0];
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wire [2:0] g_temp = char_a ? fgcolram_data_out[5:3] : bgcolram_data_out[5:3];
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wire [1:0] b_temp = char_a ? fgcolram_data_out[7:6] : bgcolram_data_out[7:6];
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assign a = char_a ? char_a : (bgcolram_data_out != 8'b11000111);
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assign r = {{2{r_temp}},2'b0};
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assign g = {{2{g_temp}},2'b0};
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assign b = {{3{b_temp}},2'b0};
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endmodule |