diff --git a/InputTest.sv b/InputTest.sv
index 6d9ca24..8a2f351 100644
--- a/InputTest.sv
+++ b/InputTest.sv
@@ -32,7 +32,6 @@ module emu
output [7:0] VGA_B,
output VGA_HS,
output VGA_VS,
- output VGA_DE, // = ~(VBlank | HBlank)
output VGA_F1,
output [1:0] VGA_SL,
output VGA_SCALER, // Force VGA scaler
@@ -246,8 +245,7 @@ soc soc(
.VGA_VS(VGA_VS),
.VGA_R(VGA_R),
.VGA_G(VGA_G),
- .VGA_B(VGA_B),
- .VGA_DE(VGA_DE)
+ .VGA_B(VGA_B)
);
diff --git a/README.MD b/README.MD
new file mode 100644
index 0000000..6b35f4c
--- /dev/null
+++ b/README.MD
@@ -0,0 +1,14 @@
+
+
+# Memory Map
+
+Start|End|Length|Name
+---|---|---|---
+0x0000|0x3FFF|0x4000|Program ROM
+0x4000|0x43FF|0x0400|Char ROM
+
+0x6000|0x6000|0x0001|System inputs (video timings etc)
+0x6001|0x6001|0x0001|Control inputs
+
+0x8000|0xBFFF|0x4000|Work RAM
+0xC000|0xC3FF|0xDFFF|Char RAM
diff --git a/files.qip b/files.qip
index ccf77b9..c2b82b7 100644
--- a/files.qip
+++ b/files.qip
@@ -4,5 +4,7 @@ set_global_assignment -name QIP_FILE rtl/tv80/TV80.qip
set_global_assignment -name CDF_FILE jtag.cdf
set_global_assignment -name QIP_FILE sys/sys.qip
set_global_assignment -name VERILOG_FILE rtl/video.v
+set_global_assignment -name VERILOG_FILE rtl/JTFRAME/jtframe_vtimer.v
set_global_assignment -name VERILOG_FILE rtl/soc.v
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/dpram.v
\ No newline at end of file
+set_global_assignment -name VERILOG_FILE rtl/dpram.v
+set_global_assignment -name VERILOG_FILE rtl/spram.v
\ No newline at end of file
diff --git a/rtl/JTFRAME/jtframe_vtimer.v b/rtl/JTFRAME/jtframe_vtimer.v
new file mode 100644
index 0000000..04842eb
--- /dev/null
+++ b/rtl/JTFRAME/jtframe_vtimer.v
@@ -0,0 +1,172 @@
+/* This file is part of JTFRAME.
+ JTFRAME program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ JTFRAME program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with JTFRAME. If not, see .
+
+ Author: Jose Tejada Gomez. Twitter: @topapate
+ Version: 1.0
+ Date: 2-5-2020 */
+
+
+// Generic video timing generator
+// By default vertical blanking and sync toggle with horizontal blanking and sync
+// but some games make these signals toggle in the middle of the vertical ones
+// See Side Arms for an example
+// By default, H/V counters end with the blanking signal, for some games it
+// may be useful to define the end count differently
+// Depending on how the graphic hardware is designed, H/V count start and end values
+// can be important, as well as when signals toggle (like in a 8-multiple of H)
+// but these limitations can be trade off for different ones if the design is changed
+// A default VS pulse of three lines and HS pulse of 4.5us will fit the TV standard
+// but some games use different values
+// See the parameter definition below to alter the needed parameters when
+// instantiating the module
+
+module jtframe_vtimer(
+ input clk,
+ input pxl_cen,
+ output reg [8:0] vdump,
+ output reg [8:0] vrender,
+ output reg [8:0] vrender1,
+ output reg [8:0] H,
+ output reg Hinit,
+ output reg Vinit,
+ output reg LHBL,
+ output reg LVBL,
+ output reg HS,
+ output reg VS
+);
+
+reg LVBL2, LVBL1;
+
+`ifdef SIMULATION
+initial begin
+ Hinit = 0;
+ Vinit = 0;
+ LHBL = 0;
+ LVBL = 1;
+ LVBL1 = 1;
+ LVBL2 = 1;
+ HS = 0;
+ VS = 0;
+ H = 0;
+ vrender1 = 0;
+ vrender = 0;
+ vdump = 0;
+end
+`endif
+
+// Default values suit Contra arcade
+parameter [8:0] V_START = 9'd0,
+ VB_START = 9'd239,
+ VB_END = 9'd255,
+ VCNT_END = VB_END,
+ VS_START = 9'd244,
+ VS_END = (VS_START+9'd3),
+ HB_END = 9'd395,
+ HB_START = HB_END-9'd116,
+ HCNT_END = HB_END,
+ HS_START = 9'd330,
+ HS_END = HS_START+9'd27, // Default 4.5us for a 6MHz clock
+ H_VB = HB_START,
+ H_VS = HS_START,
+ H_VNEXT = HS_START,
+ HINIT = H_VNEXT,
+ HCNT_START=9'd0;
+
+// H counter
+always @(posedge clk) if(pxl_cen) begin
+ Hinit <= H == HINIT;
+ H <= H == HCNT_END ? HCNT_START : (H+9'd1);
+end
+
+always @(posedge clk) if(pxl_cen) begin
+ if( H == H_VNEXT ) begin
+ Vinit <= vdump==VB_END;
+ vrender1 <= vrender1==VCNT_END ? V_START : vrender1 + 9'd1;
+ vrender <= vrender1;
+ vdump <= vrender;
+ end
+
+ if( H == HB_START ) begin
+ LHBL <= 0;
+ end else if( H == HB_END ) LHBL <= 1;
+ if( H == H_VB ) begin
+ { LVBL, LVBL1 } <= { LVBL1, LVBL2 };
+ case( vrender1 )
+ VB_START: LVBL2 <= 0;
+ VB_END: LVBL2 <= 1;
+ default:;
+ endcase // vdump
+ end
+
+ if (H==HS_START) begin
+ HS <= 1;
+ end
+ if( H==H_VS ) begin
+ if (vdump==VS_START) VS <= 1;
+ if (vdump==VS_END ) VS <= 0;
+ end
+
+ if (H==HS_END) HS <= 0;
+end
+
+`ifdef SIMULATION_VTIMER
+reg LVBL_Last, LHBL_last, VS_last, HS_last;
+
+wire new_line = LHBL_last && !LHBL;
+wire new_frame = LVBL_Last && !LVBL;
+wire new_HS = HS && !HS_last;
+wire new_VS = VS && !VS_last;
+
+integer vbcnt=0, vcnt=0, hcnt=0, hbcnt=0, vs0, vs1, hs0, hs1;
+integer framecnt=0;
+
+`ifdef SIMULATION_VTIMER_FCLK
+real fclk = `SIMULATION_VTIMER_FCLK;
+`else
+real fclk = 6e6;
+`endif
+
+always @(posedge clk) if(pxl_cen) begin
+ LHBL_last <= LHBL;
+ HS_last <= HS;
+ VS_last <= VS;
+ if( new_HS ) hs1 <= hbcnt;
+ if( new_VS ) vs1 <= vbcnt;
+ if( new_line ) begin
+ LVBL_Last <= LVBL;
+ if( new_frame ) begin
+ if( framecnt>0 ) begin
+ $display("VB count = %3d (sync at %2d)", vbcnt, vs1 );
+ $display("vdump total = %3d (%.2f Hz)", vcnt, fclk/(hcnt*vcnt) );
+ $display("HB count = %3d (sync at %2d)", hbcnt, hs1 );
+ $display("H total = %3d (%.2f Hz)", hcnt, fclk/hcnt );
+ $display("-------------" );
+ end
+ vbcnt <= 1;
+ vcnt <= 1;
+ framecnt <= framecnt+1;
+ end else begin
+ vcnt <= vcnt+1;
+ if( !LVBL ) vbcnt <= vbcnt+1;
+ end
+ hbcnt <= 1;
+ hcnt <= 1;
+ end else begin
+ hcnt <= hcnt+1;
+ if( !LHBL ) hbcnt <= hbcnt+1;
+ end
+end
+`endif
+
+endmodule
\ No newline at end of file
diff --git a/rtl/dpram.v b/rtl/dpram.v
index aa257ba..c281730 100644
--- a/rtl/dpram.v
+++ b/rtl/dpram.v
@@ -1,5 +1,3 @@
-`timescale 1ns / 1ps
-
module dpram #(
parameter address_width = 10,
parameter data_width = 8
@@ -31,7 +29,6 @@ reg [data_width-1:0] mem [ramLength-1:0];
end
`endif
-// Port A
always @(posedge clock_a) begin
q_a <= mem[address_a];
if(wren_a) begin
@@ -39,8 +36,7 @@ always @(posedge clock_a) begin
mem[address_a] <= data_a;
end
end
-
-// Port B
+
always @(posedge clock_b) begin
q_b <= mem[address_b];
if(wren_b) begin
diff --git a/rtl/soc.v b/rtl/soc.v
index 3c88983..5e4d412 100644
--- a/rtl/soc.v
+++ b/rtl/soc.v
@@ -2,9 +2,11 @@
module soc (
input clk_sys,
input clk_pix,
+ input reset,
input [13:0] dn_addr,
input dn_wr,
input [7:0] dn_data,
+ input [7:0] dn_index,
input [7:0] inputs,
output VGA_HS,
output VGA_VS,
@@ -12,33 +14,39 @@ module soc (
output [7:0] VGA_G,
output [7:0] VGA_B,
output VGA_HB,
- output VGA_VB,
- output VGA_DE
+ output VGA_VB
);
-// Video subsystem
-video video (
- .pclk ( clk_pix ),
- .cpu_clk ( clk_sys ),
- .cpu_wr ( !cpu_wr_n && !cpu_addr[15] ),
- .cpu_addr ( cpu_addr[15:0] ),
- .cpu_data ( cpu_dout ),
- .hs (VGA_HS),
- .vs (VGA_VS),
- .r (VGA_R),
- .g (VGA_G),
- .b (VGA_B),
- .hb (VGA_HB),
- .vb (VGA_VB),
- .de (VGA_DE)
+wire _hblank;
+wire _vblank;
+assign VGA_HB = ~_hblank;
+assign VGA_VB = ~_vblank;
+
+wire [8:0] hcnt;
+wire [8:0] vcnt;
+
+// Display timing module from JTFRAME
+jtframe_vtimer #(
+ .HB_START(9'd320)
+) vtimer
+(
+ .clk(clk_sys),
+ .pxl_cen(clk_pix),
+ .vdump(vcnt),
+ .vrender(),
+ .vrender1(),
+ .H(hcnt),
+ .Hinit(),
+ .Vinit(),
+ .LHBL(_hblank),
+ .LVBL(_vblank),
+ .HS(VGA_HS),
+ .VS(VGA_VS)
);
-// The CPU is kept in reset for 256 cycles after power on
-reg [7:0] cpu_reset_cnt = 8'h00;
-wire cpu_reset = (cpu_reset_cnt != 255);
-always @(posedge clk_sys)
- if(cpu_reset_cnt != 255)
- cpu_reset_cnt <= cpu_reset_cnt + 8'd1;
+// DEBUG OUTPUT
+assign VGA_R = hcnt[7:0];
+assign VGA_B = vcnt[7:0];
// CPU control signals
wire [15:0] cpu_addr;
@@ -50,18 +58,18 @@ wire cpu_mreq_n;
// include Z80 CPU
tv80s T80x (
- .reset_n ( !cpu_reset ),
- .clk ( clk_sys ),
- .wait_n ( 1'b1 ),
- .int_n ( 1'b1 ),
- .nmi_n ( 1'b1 ),
- .busrq_n ( 1'b1 ),
- .mreq_n ( cpu_mreq_n ),
- .rd_n ( cpu_rd_n ),
- .wr_n ( cpu_wr_n ),
- .A ( cpu_addr ),
- .di ( cpu_din ),
- .dout ( cpu_dout ),
+ .reset_n ( !reset ),
+ .clk ( clk_sys ),
+ .wait_n ( 1'b1 ),
+ .int_n ( 1'b1 ),
+ .nmi_n ( 1'b1 ),
+ .busrq_n ( 1'b1 ),
+ .mreq_n ( cpu_mreq_n ),
+ .rd_n ( cpu_rd_n ),
+ .wr_n ( cpu_wr_n ),
+ .A ( cpu_addr ),
+ .di ( cpu_din ),
+ .dout ( cpu_dout ),
.m1_n (),
.iorq_n (),
.rfsh_n (),
@@ -69,56 +77,96 @@ tv80s T80x (
.busak_n ()
);
+// RAM bank data outs
+wire [7:0] pgrom_data_out;
+wire [7:0] chrom_data_out;
+wire [7:0] wkram_data_out;
+wire [7:0] chram_data_out;
-wire [7:0] ram_data_out;
-wire [7:0] rom_data_out;
+// RAM bank data outs
+wire [10:0] chrom_addr;
-wire rom_cs = cpu_addr[15:14] == 2'b00;
-wire ram_cs = cpu_addr[15] == 1'b1;
+// CPU address decodes
+wire pgrom_cs = cpu_addr[15:14] == 2'b00;
+wire chrom_cs = cpu_addr[15:14] == 2'b00;
+wire wkram_cs = cpu_addr[15] == 1'b1;
+wire chram_cs = cpu_addr[15] == 1'b1;
wire in0_cs = cpu_addr == 16'h4000;
wire in1_cs = cpu_addr == 16'h4001;
-assign cpu_din = ram_cs ? ram_data_out :
- rom_cs ? rom_data_out :
+// CPU data mux
+assign cpu_din = pgrom_cs ? pgrom_data_out :
+ wkram_cs ? wkram_data_out :
+ wkram_cs ? wkram_data_out :
in0_cs ? {VGA_HS, VGA_VS, 6'b101000} :
in1_cs ? inputs :
8'b00000000;
-always @(posedge clk_sys)
-begin
- //$display("%b %x %d", cpu_addr, cpu_addr, cpu_addr);
- //$display("%x = %x", cpu_addr, cpu_din);
- // $display("rom_cs %b ram_cs %b in1_cs %b", rom_cs, ram_cs, in1_cs);
-end
+// Rom upload write enables
+wire pgrom_wr = dn_wr && dn_index == 8'b0;
+wire chrom_wr = dn_wr && dn_index == 8'b1;
-dpram #(12,8) rom
+
+// MEMORY
+// ------
+
+// Program ROM - 0x0000 - 0x3FFF (0x4000 / 16384 bytes)
+dpram #(14,8) pgrom
(
.clock_a(clk_sys),
- .address_a(cpu_addr[11:0]),
+ .address_a(cpu_addr[13:0]),
.wren_a(1'b0),
.data_a(),
- .q_a(rom_data_out),
+ .q_a(pgrom_data_out),
.clock_b(clk_sys),
- .address_b(dn_addr[11:0]),
- .wren_b(dn_wr),
+ .address_b(dn_addr[13:0]),
+ .wren_b(pgrom_wr),
.data_b(dn_data),
.q_b()
);
-dpram #(12,8) ram
+// Char ROM - 0x4000 - 0x43FF (0x0400 / 1024 bytes)
+dpram #(11,8) chrom
(
.clock_a(clk_sys),
- .address_a(cpu_addr[11:0]),
- .wren_a(!cpu_wr_n && ram_cs),
- .data_a(cpu_dout),
- .q_a(ram_data_out),
+ .address_a(chrom_addr),
+ .wren_a(1'b0),
+ .data_a(),
+ .q_a(chrom_data_out),
.clock_b(clk_sys),
- .address_b(cpu_addr[11:0]),
+ .address_b(dn_addr[10:0]),
+ .wren_b(chrom_wr),
+ .data_b(dn_data),
+ .q_b()
+);
+
+// Work RAM - 0x8000 - 0xBFFF (0x4000 / 16384 bytes)
+spram #(14,8) wkram
+(
+ .clock(clk_sys),
+ .address(cpu_addr[13:0]),
+ .wren(!cpu_wr_n && wkram_cs),
+ .data(cpu_dout),
+ .q(wkram_data_out)
+);
+
+// Char RAM - 0xC000 - 0xDFFF (0x2000 / 8192 bytes)
+dpram #(13,8) chram
+(
+ .clock_a(clk_sys),
+ .address_a(cpu_addr[12:0]),
+ .wren_a(!cpu_wr_n && chram_cs),
+ .data_a(cpu_dout),
+ .q_a(chram_data_out),
+
+ .clock_b(clk_sys),
+ .address_b(),
.wren_b(1'b0),
.data_b(),
.q_b()
);
+
endmodule
diff --git a/rtl/spram.v b/rtl/spram.v
new file mode 100644
index 0000000..ddfd523
--- /dev/null
+++ b/rtl/spram.v
@@ -0,0 +1,34 @@
+module spram #(
+ parameter address_width = 10,
+ parameter data_width = 8
+) (
+ input wire clock,
+ input wire wren,
+ input wire [address_width-1:0] address,
+ input wire [data_width-1:0] data,
+ output reg [data_width-1:0] q
+);
+
+localparam ramLength = (2**address_width);
+reg [data_width-1:0] mem [ramLength-1:0];
+
+`ifdef SIMULATION
+ integer j;
+ initial
+ begin
+ for (j = 0; j < ramLength; j = j + 1)
+ begin
+ mem[j] = 0;
+ end
+ end
+`endif
+
+always @(posedge clock) begin
+ q <= mem[address];
+ if(wren) begin
+ q <= data;
+ mem[address] <= data;
+ end
+end
+
+endmodule
\ No newline at end of file
diff --git a/rtl/video.v b/rtl/video.v
deleted file mode 100644
index 00b0aff..0000000
--- a/rtl/video.v
+++ /dev/null
@@ -1,120 +0,0 @@
-`timescale 1ns / 1ps
-
-module video (
- input pclk, // pixel clock
- input cpu_clk, //
- input cpu_wr,
- input [15:0] cpu_addr,
- input [7:0] cpu_data,
-
- // VGA output
- output reg hs,
- output reg vs,
- output [7:0] r,
- output [7:0] g,
- output [7:0] b,
- output reg hb,
- output reg vb,
- output reg de
-);
-
-// 640x400 70HZ VESA according to http://tinyvga.com/vga-timing/640x400@70Hz
-parameter H = 640; // width of visible area
-parameter HFP = 16; // unused time before hsync
-parameter HS = 96; // width of hsync
-parameter HBP = 48; // unused time after hsync
-
-parameter V = 400; // height of visible area
-parameter VFP = 12; // unused time before vsync
-parameter VS = 2; // width of vsync
-parameter VBP = 35; // unused time after vsync
-
-parameter VGA_WIDTH = 320; // width of backbuffer
-parameter VGA_HEIGHT = 200; // height of backbuffer
-
-reg[9:0] h_cnt; // horizontal pixel counter
-reg[9:0] v_cnt; // vertical pixel counter
-
-reg [15:0] video_counter;
-reg [7:0] pixel;
-
-// 16000 bytes of internal video memory for 160x100 pixel at 8 Bit (RGB 332)
-reg [7:0] vmem [(VGA_WIDTH*VGA_HEIGHT)-1:0];
-
-// horizontal pixel counter
-always@(posedge pclk)
-begin
- if(h_cnt==H+HFP+HS+HBP-1) h_cnt <= 0;
- else h_cnt <= h_cnt + 1;
- // generate negative hsync signal
- if(h_cnt == H+HFP) hs <= 1'b0;
- if(h_cnt == H+HFP+HS) hs <= 1'b1;
-end
-
-// veritical pixel counter
-always@(posedge pclk)
-begin
- // the vertical counter is processed at the begin of each hsync
- if(h_cnt == H+HFP)
- begin
- if(v_cnt==VS+VBP+V+VFP-1) v_cnt <= 0;
- else v_cnt <= v_cnt + 1;
-
- // generate positive vsync signal
- if(v_cnt == V+VFP) vs <= 1'b1;
- if(v_cnt == V+VFP+VS) vs <= 1'b0;
- end
-end
-
-// write VRAM via CPU interface
-always @(posedge cpu_clk)
-begin
- if(cpu_wr)
- vmem[cpu_addr] <= cpu_data;
-end
-
-always@(posedge pclk)
-begin
- // The video counter is being reset at the begin of each vsync.
- // Otherwise it's increased every fourth pixel in the visible area.
- // At the end of the first three of four lines the counter is
- // decreased by the total line length to display the same contents
- // for four lines so 100 different lines are displayed on the 400
- // VGA lines.
-
- // visible area?
- if(v_cnt < V)
- vb<=0;
- else
- vb<=1;
- if(h_cnt < H)
- hb<=0;
- else
- hb<=1;
-
- if((v_cnt < V) && (h_cnt < H)) begin
- if(h_cnt[0] == 1'b1)
- video_counter <= video_counter + 16'd1;
-
- //pixel <= (v_cnt[4] ^ h_cnt[4])?8'h00:8'hff; // checkboard
- //pixel <= video_counter[7:0]; // color pattern
- pixel <= vmem[video_counter]; // read VRAM
- de<=1;
- end else begin
- if(h_cnt == H+HFP) begin
- if(v_cnt == V+VFP)
- video_counter <= 16'd0;
- else if((v_cnt < V) && (v_cnt[0] != 1'b1))
- video_counter <= video_counter - VGA_WIDTH;
- de<=0;
- end
- pixel <= 8'hF0; // black
- end
-end
-
-// seperate 8 bits into three colors (332)
-assign r = { pixel[7:5], pixel[7:5] , pixel[7:6]};
-assign g = { pixel[4:2], pixel[4:2] , pixel[4:3]};
-assign b = { pixel[1:0], pixel[1:0] , pixel[1:0], pixel[1:0] };
-
-endmodule
diff --git a/src/boot_rom.asm b/src/boot_rom.asm
index 06fae3e..a17389e 100644
--- a/src/boot_rom.asm
+++ b/src/boot_rom.asm
@@ -13,10 +13,11 @@
.globl _cls
.globl _put_pixel
.globl _abs
+ .globl _puts
+ .globl _color
.globl _cur_y
.globl _cur_x
.globl _y
- .globl _color
.globl _input1_cache
.globl _input0_cache
.globl _vsync_last
@@ -35,8 +36,8 @@
; ram data
;--------------------------------------------------------
.area _DATA
-_input0 = 0x4000
-_input1 = 0x4001
+_input0 = 0x6000
+_input1 = 0x6001
_hsync::
.ds 1
_hsync_last::
@@ -49,8 +50,6 @@ _input0_cache::
.ds 1
_input1_cache::
.ds 1
-_color::
- .ds 1
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
@@ -58,9 +57,11 @@ _color::
_y::
.ds 1
_cur_x::
- .ds 2
+ .ds 1
_cur_y::
- .ds 2
+ .ds 1
+_color::
+ .ds 1
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
@@ -81,7 +82,7 @@ _cur_y::
; code
;--------------------------------------------------------
.area _CODE
-;boot_rom.c:26: int putchar(int c) {
+;boot_rom.c:25: int putchar(int c) {
; ---------------------------------
; Function putchar
; ---------------------------------
@@ -89,31 +90,37 @@ _putchar::
push ix
ld ix,#0
add ix,sp
- ld hl, #-11
+ ld hl, #-7
add hl, sp
ld sp, hl
-;boot_rom.c:28: unsigned int *dptr = (unsigned int*)(VGA_WIDTH*(8*cur_y) + 8*cur_x);
- ld hl, (_cur_y)
- add hl, hl
- add hl, hl
- add hl, hl
- ld bc, (_VGA_WIDTH)
- push hl
- push bc
- call __mulint
- pop af
- pop af
- ld c, l
- ld b, h
- ld hl, (_cur_x)
- add hl, hl
+;boot_rom.c:27: unsigned char *dptr = (unsigned char*)(160*(8*cur_y) + 8*cur_x);
+ ld hl,#_cur_y + 0
+ ld c, (hl)
+ ld b, #0x00
+ ld l, c
+ ld h, b
add hl, hl
add hl, hl
add hl, bc
- inc sp
- inc sp
- push hl
-;boot_rom.c:31: if(c < 32) {
+ add hl, hl
+ add hl, hl
+ add hl, hl
+ add hl, hl
+ add hl, hl
+ add hl, hl
+ add hl, hl
+ add hl, hl
+ ex de, hl
+ ld iy, #_cur_x
+ ld l, 0 (iy)
+ ld h, #0x00
+ add hl, hl
+ add hl, hl
+ add hl, hl
+ add hl, de
+ ld -5 (ix), l
+ ld -4 (ix), h
+;boot_rom.c:30: if(c < 32) {
ld a, 4 (ix)
sub a, #0x20
ld a, 5 (ix)
@@ -122,43 +129,39 @@ _putchar::
rra
sbc a, #0x80
jr NC,00108$
-;boot_rom.c:32: if(c == '\r') { cur_x=0; }
+;boot_rom.c:31: if(c == '\r')
ld a, 4 (ix)
sub a, #0x0d
or a, 5 (ix)
jr NZ,00102$
- ld hl, #0x0000
- ld (_cur_x), hl
+;boot_rom.c:32: cur_x=0;
+ ld 0 (iy), #0x00
00102$:
-;boot_rom.c:33: if(c == '\n') {
+;boot_rom.c:34: if(c == '\n') {
ld a, 4 (ix)
sub a, #0x0a
or a, 5 (ix)
jp NZ,00122$
-;boot_rom.c:34: cur_y++;
+;boot_rom.c:35: cur_y++;
ld iy, #_cur_y
inc 0 (iy)
- jr NZ,00192$
- inc 1 (iy)
-00192$:
-;boot_rom.c:35: cur_x=0;
- ld hl, #0x0000
- ld (_cur_x), hl
-;boot_rom.c:36: if(cur_y >= 12) { cur_y = 0; }
+;boot_rom.c:36: cur_x=0;
+ ld iy, #_cur_x
+ ld 0 (iy), #0x00
+;boot_rom.c:38: if(cur_y >= 12)
+ ld iy, #_cur_y
ld a, 0 (iy)
sub a, #0x0c
- ld a, 1 (iy)
- sbc a, #0x00
jp C,00122$
- ld l, #0x00
- ld (_cur_y), hl
-;boot_rom.c:38: return;
+;boot_rom.c:39: cur_y = 0;
+ ld 0 (iy), #0x00
+;boot_rom.c:41: return;
jp 00122$
00108$:
-;boot_rom.c:41: if(c < 0) return;
+;boot_rom.c:44: if(c < 0) return;
bit 7, 5 (ix)
jp NZ,00122$
-;boot_rom.c:43: p = font+8*(unsigned char)(c-32);
+;boot_rom.c:46: p = font+8*(unsigned char)(c-32);
ld bc, #_font+0
ld a, 4 (ix)
add a, #0xe0
@@ -168,133 +171,89 @@ _putchar::
add hl, hl
add hl, hl
add hl, bc
- ld -9 (ix), l
- ld -8 (ix), h
-;boot_rom.c:44: for(i=0;i<8;i++) {
- ld bc, #0x0000
+ ld c, l
+ ld b, h
+;boot_rom.c:47: for(i=0;i<8;i++) {
+ ld -2 (ix), #0x00
00120$:
-;boot_rom.c:45: unsigned char l = *p++;
- ld l, -9 (ix)
- ld h, -8 (ix)
- ld a, (hl)
- ld -3 (ix), a
- ld a, -9 (ix)
- add a, #0x02
- ld -9 (ix), a
- jr NC,00193$
- inc -8 (ix)
-00193$:
-;boot_rom.c:46: for(j=0;j<8;j++) {
- ld -2 (ix), #0x08
- ld -1 (ix), #0x00
- pop de
- push de
+;boot_rom.c:48: unsigned char l = *p++;
+ ld a, (bc)
+ ld -1 (ix), a
+ inc bc
+;boot_rom.c:49: for(j=0;j<8;j++) {
+ ld -3 (ix), #0x08
+ ld e, -5 (ix)
+ ld d, -4 (ix)
00119$:
-;boot_rom.c:47: *dptr++ = (l & 0x80) ? color : 0x00;
- ld -5 (ix), e
- ld -4 (ix), d
+;boot_rom.c:50: *dptr++ = (l & 0x80)?color:0x00;
+ inc sp
+ inc sp
+ push de
inc de
- inc de
- bit 7, -3 (ix)
+ bit 7, -1 (ix)
jr Z,00124$
- ld a,(#_color + 0)
- ld -7 (ix), a
- ld -6 (ix), #0x00
+ ld iy, #_color
+ ld l, 0 (iy)
jr 00125$
00124$:
- ld -7 (ix), #0x00
- ld -6 (ix), #0x00
+ ld hl, #0x0000
00125$:
- ld l, -5 (ix)
- ld h, -4 (ix)
- ld a, -7 (ix)
- ld (hl), a
- inc hl
- ld a, -6 (ix)
- ld (hl), a
-;boot_rom.c:48: l <<= 1;
- ld a, -3 (ix)
- add a, a
- ld -3 (ix), a
- ld l, -2 (ix)
- ld h, -1 (ix)
- dec hl
- ld -2 (ix), l
- ld -1 (ix), h
-;boot_rom.c:46: for(j=0;j<8;j++) {
- ld a, h
- or a, l
- jr NZ,00119$
-;boot_rom.c:50: dptr += (VGA_WIDTH-8);
- ld hl, (_VGA_WIDTH)
ld a, l
- add a, #0xf8
- ld l, a
- ld a, h
- adc a, #0xff
- ld h, a
- add hl, hl
- add hl, de
- inc sp
- inc sp
+ pop hl
push hl
-;boot_rom.c:44: for(i=0;i<8;i++) {
- inc bc
- ld a, c
+ ld (hl), a
+;boot_rom.c:51: l <<= 1;
+ ld a, -1 (ix)
+ add a, a
+ ld -1 (ix), a
+ dec -3 (ix)
+ ld a, -3 (ix)
+;boot_rom.c:49: for(j=0;j<8;j++) {
+ or a, a
+ jr NZ,00119$
+;boot_rom.c:53: dptr += (160-8);
+ ld hl, #0x0098
+ add hl, de
+ ld -5 (ix), l
+ ld -4 (ix), h
+;boot_rom.c:47: for(i=0;i<8;i++) {
+ inc -2 (ix)
+ ld a, -2 (ix)
sub a, #0x08
- ld a, b
- rla
- ccf
- rra
- sbc a, #0x80
- jp C, 00120$
-;boot_rom.c:53: cur_x++;
+ jr C,00120$
+;boot_rom.c:56: cur_x++;
ld iy, #_cur_x
inc 0 (iy)
- jr NZ,00195$
- inc 1 (iy)
-00195$:
-;boot_rom.c:54: if(cur_x >= 20) {
+;boot_rom.c:57: if(cur_x >= 20) {
ld a, 0 (iy)
sub a, #0x14
- ld a, 1 (iy)
- sbc a, #0x00
- jr C,00116$
-;boot_rom.c:55: cur_x = 0;
- ld hl, #0x0000
- ld (_cur_x), hl
-;boot_rom.c:56: cur_y++;
+ jr C,00122$
+;boot_rom.c:58: cur_x = 0;
+ ld 0 (iy), #0x00
+;boot_rom.c:59: cur_y++;
ld iy, #_cur_y
inc 0 (iy)
- jr NZ,00196$
- inc 1 (iy)
-00196$:
-;boot_rom.c:58: if(cur_y >= 12)
+;boot_rom.c:61: if(cur_y >= 12)
ld a, 0 (iy)
sub a, #0x0c
- ld a, 1 (iy)
- sbc a, #0x00
- jr C,00116$
-;boot_rom.c:59: cur_y = 0;
- ld l, #0x00
- ld (_cur_y), hl
-00116$:
-;boot_rom.c:61: return;
+ jr C,00122$
+;boot_rom.c:62: cur_y = 0;
+ ld 0 (iy), #0x00
00122$:
-;boot_rom.c:62: }
+;boot_rom.c:64: }
ld sp, ix
pop ix
ret
_VGA_WIDTH:
- .dw #0x0140
+ .dw #0x00a0
_VGA_HEIGHT:
- .dw #0x00c8
-;boot_rom.c:65: void put_pixel(unsigned int x, unsigned int y, unsigned char color) {
+ .dw #0x0064
+;boot_rom.c:67: void put_pixel(unsigned int x, unsigned int y, unsigned char color) {
; ---------------------------------
; Function put_pixel
; ---------------------------------
_put_pixel::
-;boot_rom.c:66: *((unsigned int*)(VGA_WIDTH*y+x)) = color;
+;boot_rom.c:68: *((unsigned int*)(VGA_WIDTH*y+x)) = color;
ld hl, (_VGA_WIDTH)
ld iy, #4
add iy, sp
@@ -324,9 +283,9 @@ _put_pixel::
ld (hl), c
inc hl
ld (hl), b
-;boot_rom.c:67: }
+;boot_rom.c:69: }
ret
-;boot_rom.c:69: void cls(unsigned char color) {
+;boot_rom.c:71: void cls(unsigned char color) {
; ---------------------------------
; Function cls
; ---------------------------------
@@ -335,63 +294,46 @@ _cls::
ld ix,#0
add ix,sp
dec sp
-;boot_rom.c:73: for(i=0;i= longest-shortest) {
+;boot_rom.c:104: if(numerator >= longest-shortest) {
ld a, e
sub a, -14 (ix)
ld a, d
sbc a, -13 (ix)
jr C,00105$
-;boot_rom.c:110: numerator += shortest ;
-;boot_rom.c:111: numerator -= longest ;
+;boot_rom.c:105: numerator += shortest ;
+;boot_rom.c:106: numerator -= longest ;
ld a, -16 (ix)
ld d, -15 (ix)
- sub a, -2 (ix)
+ sub a, -10 (ix)
ld e, a
ld a, d
- sbc a, -1 (ix)
+ sbc a, -9 (ix)
ld d, a
-;boot_rom.c:112: x += dx1;
- ld a, -12 (ix)
+;boot_rom.c:107: x += dx1;
+ ld a, -6 (ix)
ld -18 (ix), a
- ld a, -11 (ix)
+ ld a, -5 (ix)
ld -17 (ix), a
ld a, 4 (ix)
add a, -18 (ix)
@@ -554,33 +496,7 @@ _draw_line::
ld a, 5 (ix)
adc a, -17 (ix)
ld 5 (ix), a
-;boot_rom.c:113: y += dy1;
- ld a, -10 (ix)
- ld -18 (ix), a
- ld a, -9 (ix)
- ld -17 (ix), a
- ld a, 6 (ix)
- add a, -18 (ix)
- ld 6 (ix), a
- ld a, 7 (ix)
- adc a, -17 (ix)
- ld 7 (ix), a
- jr 00109$
-00105$:
-;boot_rom.c:115: numerator += shortest ;
- ld e, -16 (ix)
- ld d, -15 (ix)
-;boot_rom.c:116: x += dx2;
- inc sp
- inc sp
- push bc
- ld a, 4 (ix)
- add a, -18 (ix)
- ld 4 (ix), a
- ld a, 5 (ix)
- adc a, -17 (ix)
- ld 5 (ix), a
-;boot_rom.c:117: y += dy2;
+;boot_rom.c:108: y += dy1;
ld a, -8 (ix)
ld -18 (ix), a
ld a, -7 (ix)
@@ -591,80 +507,134 @@ _draw_line::
ld a, 7 (ix)
adc a, -17 (ix)
ld 7 (ix), a
+ jr 00109$
+00105$:
+;boot_rom.c:110: numerator += shortest ;
+ ld e, -16 (ix)
+ ld d, -15 (ix)
+;boot_rom.c:111: x += dx2;
+ inc sp
+ inc sp
+ push bc
+ ld a, 4 (ix)
+ add a, -18 (ix)
+ ld 4 (ix), a
+ ld a, 5 (ix)
+ adc a, -17 (ix)
+ ld 5 (ix), a
+;boot_rom.c:112: y += dy2;
+ ld a, -12 (ix)
+ ld -18 (ix), a
+ ld a, -11 (ix)
+ ld -17 (ix), a
+ ld a, 6 (ix)
+ add a, -18 (ix)
+ ld 6 (ix), a
+ ld a, 7 (ix)
+ adc a, -17 (ix)
+ ld 7 (ix), a
00109$:
-;boot_rom.c:107: for(i=0;i<=longest;i++) {
- inc -6 (ix)
+;boot_rom.c:102: for(i=0;i<=longest;i++) {
+ inc -4 (ix)
jr NZ,00142$
- inc -5 (ix)
+ inc -3 (ix)
00142$:
- ld a, -2 (ix)
- sub a, -6 (ix)
- ld a, -1 (ix)
- sbc a, -5 (ix)
+ ld a, -10 (ix)
+ sub a, -4 (ix)
+ ld a, -9 (ix)
+ sbc a, -3 (ix)
jp NC, 00108$
-;boot_rom.c:120: }
+;boot_rom.c:115: }
ld sp, ix
pop ix
ret
-;boot_rom.c:123: void main() {
+;boot_rom.c:119: void main() {
; ---------------------------------
; Function main
; ---------------------------------
_main::
-;boot_rom.c:124: while(1) {
+;boot_rom.c:120: while(1) {
00108$:
-;boot_rom.c:127: input0_cache = input0;
+;boot_rom.c:123: input0_cache = input0;
ld a,(#_input0 + 0)
ld iy, #_input0_cache
ld 0 (iy), a
-;boot_rom.c:128: hsync = input0_cache & 0x80;
+;boot_rom.c:124: hsync = input0_cache & 0x80;
ld c, 0 (iy)
ld a, c
and a, #0x80
ld (#_hsync + 0),a
-;boot_rom.c:129: vsync = input0_cache & 0x40;
+;boot_rom.c:125: vsync = input0_cache & 0x40;
ld a, c
and a, #0x40
ld (#_vsync + 0),a
-;boot_rom.c:131: if(hsync && !hsync_last){
+;boot_rom.c:127: if(hsync && !hsync_last){
ld a,(#_hsync + 0)
or a, a
jr Z,00102$
ld a,(#_hsync_last + 0)
or a, a
jr NZ,00102$
-;boot_rom.c:132: y++;
+;boot_rom.c:128: y++;
ld hl, #_y+0
inc (hl)
00102$:
-;boot_rom.c:134: if(vsync && !vsync_last){
+;boot_rom.c:130: if(vsync && !vsync_last){
ld a,(#_vsync + 0)
or a, a
jr Z,00105$
ld a,(#_vsync_last + 0)
or a, a
jr NZ,00105$
-;boot_rom.c:135: y=0;
+;boot_rom.c:131: y=0;
ld hl,#_y + 0
ld (hl), #0x00
-;boot_rom.c:138: input1_cache = input1;
+;boot_rom.c:133: cur_x = 0;
+ ld hl,#_cur_x + 0
+ ld (hl), #0x00
+;boot_rom.c:134: cur_y = 0;
+ ld hl,#_cur_y + 0
+ ld (hl), #0x00
+;boot_rom.c:135: color++;
+ ld iy, #_color
+ inc 0 (iy)
+;boot_rom.c:136: cls(~color);
+ ld a, 0 (iy)
+ cpl
+ ld b, a
+ push bc
+ inc sp
+ call _cls
+ inc sp
+;boot_rom.c:137: puts(" << Z80 SoC >>\n");
+ ld hl, #___str_0
+ push hl
+ call _puts
+ pop af
+;boot_rom.c:140: input1_cache = input1;
ld a,(#_input1 + 0)
ld (#_input1_cache + 0),a
00105$:
-;boot_rom.c:141: hsync_last = hsync;
+;boot_rom.c:143: hsync_last = hsync;
ld a,(#_hsync + 0)
ld (#_hsync_last + 0),a
-;boot_rom.c:142: vsync_last = vsync;
+;boot_rom.c:144: vsync_last = vsync;
ld a,(#_vsync + 0)
ld (#_vsync_last + 0),a
-;boot_rom.c:144: }
+;boot_rom.c:146: }
jr 00108$
+___str_0:
+ .ascii " << Z80 SoC >>"
+ .db 0x0a
+ .db 0x00
.area _CODE
.area _INITIALIZER
__xinit__y:
.db #0x00 ; 0
__xinit__cur_x:
- .dw #0x0000
+ .db #0x00 ; 0
__xinit__cur_y:
- .dw #0x0000
+ .db #0x00 ; 0
+__xinit__color:
+ .db #0x66 ; 102 'f'
.area _CABS (ABS)
diff --git a/src/boot_rom.bin b/src/boot_rom.bin
index 4252adc..245cde0 100644
Binary files a/src/boot_rom.bin and b/src/boot_rom.bin differ
diff --git a/src/boot_rom.c b/src/boot_rom.c
index 287bd2b..aa2ebf2 100644
--- a/src/boot_rom.c
+++ b/src/boot_rom.c
@@ -5,11 +5,11 @@
extern unsigned char font[];
-const unsigned int VGA_WIDTH = 320;
-const unsigned int VGA_HEIGHT = 200;
+const unsigned int VGA_WIDTH = 160;
+const unsigned int VGA_HEIGHT = 100;
-unsigned char __at (0x4000) input0;
-unsigned char __at (0x4001) input1;
+unsigned char __at (0x6000) input0;
+unsigned char __at (0x6001) input1;
unsigned char y = 0;
unsigned char hsync;
@@ -19,21 +19,24 @@ unsigned char vsync_last;
unsigned char input0_cache;
unsigned char input1_cache;
-unsigned int cur_x=0;
-unsigned int cur_y=0;
unsigned char color;
+unsigned char cur_x=0, cur_y=0;
int putchar(int c) {
- unsigned int *p;
- unsigned int *dptr = (unsigned int*)(VGA_WIDTH*(8*cur_y) + 8*cur_x);
- int i, j;
+ unsigned char *p;
+ unsigned char *dptr = (unsigned char*)(160*(8*cur_y) + 8*cur_x);
+ char i, j;
if(c < 32) {
- if(c == '\r') { cur_x=0; }
+ if(c == '\r')
+ cur_x=0;
+
if(c == '\n') {
cur_y++;
cur_x=0;
- if(cur_y >= 12) { cur_y = 0; }
+
+ if(cur_y >= 12)
+ cur_y = 0;
}
return;
}
@@ -44,10 +47,10 @@ int putchar(int c) {
for(i=0;i<8;i++) {
unsigned char l = *p++;
for(j=0;j<8;j++) {
- *dptr++ = (l & 0x80) ? color : 0x00;
+ *dptr++ = (l & 0x80)?color:0x00;
l <<= 1;
}
- dptr += (VGA_WIDTH-8);
+ dptr += (160-8);
}
cur_x++;
@@ -58,7 +61,6 @@ int putchar(int c) {
if(cur_y >= 12)
cur_y = 0;
}
- return;
}
// draw a pixel
@@ -67,19 +69,12 @@ void put_pixel(unsigned int x, unsigned int y, unsigned char color) {
}
void cls(unsigned char color) {
- unsigned int i;
+ unsigned char i;
unsigned int *p = (unsigned int*)0;
-
for(i=0;i>\n");
+
// process inputs
input1_cache = input1;
diff --git a/src/boot_rom.lst b/src/boot_rom.lst
index 1ba5ce9..52ccf4f 100644
--- a/src/boot_rom.lst
+++ b/src/boot_rom.lst
@@ -13,658 +13,630 @@
13 .globl _cls
14 .globl _put_pixel
15 .globl _abs
- 16 .globl _cur_y
- 17 .globl _cur_x
- 18 .globl _y
- 19 .globl _color
- 20 .globl _input1_cache
- 21 .globl _input0_cache
- 22 .globl _vsync_last
- 23 .globl _vsync
- 24 .globl _hsync_last
- 25 .globl _hsync
- 26 .globl _input1
- 27 .globl _input0
- 28 .globl _VGA_HEIGHT
- 29 .globl _VGA_WIDTH
- 30 .globl _putchar
- 31 ;--------------------------------------------------------
- 32 ; special function registers
- 33 ;--------------------------------------------------------
+ 16 .globl _puts
+ 17 .globl _color
+ 18 .globl _cur_y
+ 19 .globl _cur_x
+ 20 .globl _y
+ 21 .globl _input1_cache
+ 22 .globl _input0_cache
+ 23 .globl _vsync_last
+ 24 .globl _vsync
+ 25 .globl _hsync_last
+ 26 .globl _hsync
+ 27 .globl _input1
+ 28 .globl _input0
+ 29 .globl _VGA_HEIGHT
+ 30 .globl _VGA_WIDTH
+ 31 .globl _putchar
+ 32 ;--------------------------------------------------------
+ 33 ; special function registers
34 ;--------------------------------------------------------
- 35 ; ram data
- 36 ;--------------------------------------------------------
- 37 .area _DATA
- 4000 38 _input0 = 0x4000
- 4001 39 _input1 = 0x4001
- 0000 40 _hsync::
- 0000 41 .ds 1
- 0001 42 _hsync_last::
- 0001 43 .ds 1
- 0002 44 _vsync::
- 0002 45 .ds 1
- 0003 46 _vsync_last::
- 0003 47 .ds 1
- 0004 48 _input0_cache::
- 0004 49 .ds 1
- 0005 50 _input1_cache::
- 0005 51 .ds 1
- 0006 52 _color::
- 0006 53 .ds 1
- 54 ;--------------------------------------------------------
- 55 ; ram data
- 56 ;--------------------------------------------------------
- 57 .area _INITIALIZED
- 0000 58 _y::
- 0000 59 .ds 1
- 0001 60 _cur_x::
- 0001 61 .ds 2
- 0003 62 _cur_y::
- 0003 63 .ds 2
- 64 ;--------------------------------------------------------
- 65 ; absolute external ram data
- 66 ;--------------------------------------------------------
- 67 .area _DABS (ABS)
- 68 ;--------------------------------------------------------
- 69 ; global & static initialisations
- 70 ;--------------------------------------------------------
- 71 .area _HOME
- 72 .area _GSINIT
- 73 .area _GSFINAL
- 74 .area _GSINIT
- 75 ;--------------------------------------------------------
- 76 ; Home
- 77 ;--------------------------------------------------------
- 78 .area _HOME
+ 35 ;--------------------------------------------------------
+ 36 ; ram data
+ 37 ;--------------------------------------------------------
+ 38 .area _DATA
+ 6000 39 _input0 = 0x6000
+ 6001 40 _input1 = 0x6001
+ 0000 41 _hsync::
+ 0000 42 .ds 1
+ 0001 43 _hsync_last::
+ 0001 44 .ds 1
+ 0002 45 _vsync::
+ 0002 46 .ds 1
+ 0003 47 _vsync_last::
+ 0003 48 .ds 1
+ 0004 49 _input0_cache::
+ 0004 50 .ds 1
+ 0005 51 _input1_cache::
+ 0005 52 .ds 1
+ 53 ;--------------------------------------------------------
+ 54 ; ram data
+ 55 ;--------------------------------------------------------
+ 56 .area _INITIALIZED
+ 0000 57 _y::
+ 0000 58 .ds 1
+ 0001 59 _cur_x::
+ 0001 60 .ds 1
+ 0002 61 _cur_y::
+ 0002 62 .ds 1
+ 0003 63 _color::
+ 0003 64 .ds 1
+ 65 ;--------------------------------------------------------
+ 66 ; absolute external ram data
+ 67 ;--------------------------------------------------------
+ 68 .area _DABS (ABS)
+ 69 ;--------------------------------------------------------
+ 70 ; global & static initialisations
+ 71 ;--------------------------------------------------------
+ 72 .area _HOME
+ 73 .area _GSINIT
+ 74 .area _GSFINAL
+ 75 .area _GSINIT
+ 76 ;--------------------------------------------------------
+ 77 ; Home
+ 78 ;--------------------------------------------------------
79 .area _HOME
- 80 ;--------------------------------------------------------
- 81 ; code
- 82 ;--------------------------------------------------------
- 83 .area _CODE
- 84 ;boot_rom.c:26: int putchar(int c) {
- 85 ; ---------------------------------
- 86 ; Function putchar
- 87 ; ---------------------------------
- 0000 88 _putchar::
- 0000 DD E5 [15] 89 push ix
- 0002 DD 21 00 00 [14] 90 ld ix,#0
- 0006 DD 39 [15] 91 add ix,sp
- 0008 21 F5 FF [10] 92 ld hl, #-11
- 000B 39 [11] 93 add hl, sp
- 000C F9 [ 6] 94 ld sp, hl
- 95 ;boot_rom.c:28: unsigned int *dptr = (unsigned int*)(VGA_WIDTH*(8*cur_y) + 8*cur_x);
- 000D 2Ar03r00 [16] 96 ld hl, (_cur_y)
- 0010 29 [11] 97 add hl, hl
- 0011 29 [11] 98 add hl, hl
- 0012 29 [11] 99 add hl, hl
- 0013 ED 4Br61r01 [20] 100 ld bc, (_VGA_WIDTH)
- 0017 E5 [11] 101 push hl
- 0018 C5 [11] 102 push bc
- 0019 CDr00r00 [17] 103 call __mulint
- 001C F1 [10] 104 pop af
- 001D F1 [10] 105 pop af
- 001E 4D [ 4] 106 ld c, l
- 001F 44 [ 4] 107 ld b, h
- 0020 2Ar01r00 [16] 108 ld hl, (_cur_x)
- 0023 29 [11] 109 add hl, hl
- 0024 29 [11] 110 add hl, hl
- 0025 29 [11] 111 add hl, hl
- 0026 09 [11] 112 add hl, bc
- 0027 33 [ 6] 113 inc sp
- 0028 33 [ 6] 114 inc sp
- 0029 E5 [11] 115 push hl
- 116 ;boot_rom.c:31: if(c < 32) {
- 002A DD 7E 04 [19] 117 ld a, 4 (ix)
- 002D D6 20 [ 7] 118 sub a, #0x20
- 002F DD 7E 05 [19] 119 ld a, 5 (ix)
- 0032 17 [ 4] 120 rla
- 0033 3F [ 4] 121 ccf
- 0034 1F [ 4] 122 rra
- 0035 DE 80 [ 7] 123 sbc a, #0x80
- 0037 30 42 [12] 124 jr NC,00108$
- 125 ;boot_rom.c:32: if(c == '\r') { cur_x=0; }
- 0039 DD 7E 04 [19] 126 ld a, 4 (ix)
- 003C D6 0D [ 7] 127 sub a, #0x0d
- 003E DD B6 05 [19] 128 or a, 5 (ix)
- 0041 20 06 [12] 129 jr NZ,00102$
- 0043 21 00 00 [10] 130 ld hl, #0x0000
- 0046 22r01r00 [16] 131 ld (_cur_x), hl
- 0049 132 00102$:
- 133 ;boot_rom.c:33: if(c == '\n') {
- 0049 DD 7E 04 [19] 134 ld a, 4 (ix)
- 004C D6 0A [ 7] 135 sub a, #0x0a
- 004E DD B6 05 [19] 136 or a, 5 (ix)
- 0051 C2r5Cr01 [10] 137 jp NZ,00122$
- 138 ;boot_rom.c:34: cur_y++;
- 0054 FD 21r03r00 [14] 139 ld iy, #_cur_y
- 0058 FD 34 00 [23] 140 inc 0 (iy)
- 005B 20 03 [12] 141 jr NZ,00192$
- 005D FD 34 01 [23] 142 inc 1 (iy)
- 0060 143 00192$:
- 144 ;boot_rom.c:35: cur_x=0;
- 0060 21 00 00 [10] 145 ld hl, #0x0000
- 0063 22r01r00 [16] 146 ld (_cur_x), hl
- 147 ;boot_rom.c:36: if(cur_y >= 12) { cur_y = 0; }
- 0066 FD 7E 00 [19] 148 ld a, 0 (iy)
- 0069 D6 0C [ 7] 149 sub a, #0x0c
- 006B FD 7E 01 [19] 150 ld a, 1 (iy)
- 006E DE 00 [ 7] 151 sbc a, #0x00
- 0070 DAr5Cr01 [10] 152 jp C,00122$
- 0073 2E 00 [ 7] 153 ld l, #0x00
- 0075 22r03r00 [16] 154 ld (_cur_y), hl
- 155 ;boot_rom.c:38: return;
- 0078 C3r5Cr01 [10] 156 jp 00122$
- 007B 157 00108$:
- 158 ;boot_rom.c:41: if(c < 0) return;
- 007B DD CB 05 7E [20] 159 bit 7, 5 (ix)
- 007F C2r5Cr01 [10] 160 jp NZ,00122$
- 161 ;boot_rom.c:43: p = font+8*(unsigned char)(c-32);
- 0082 01r00r00 [10] 162 ld bc, #_font+0
- 0085 DD 7E 04 [19] 163 ld a, 4 (ix)
- 0088 C6 E0 [ 7] 164 add a, #0xe0
- 008A 6F [ 4] 165 ld l, a
- 008B 26 00 [ 7] 166 ld h, #0x00
- 008D 29 [11] 167 add hl, hl
- 008E 29 [11] 168 add hl, hl
- 008F 29 [11] 169 add hl, hl
- 0090 09 [11] 170 add hl, bc
- 0091 DD 75 F7 [19] 171 ld -9 (ix), l
- 0094 DD 74 F8 [19] 172 ld -8 (ix), h
- 173 ;boot_rom.c:44: for(i=0;i<8;i++) {
- 0097 01 00 00 [10] 174 ld bc, #0x0000
- 009A 175 00120$:
- 176 ;boot_rom.c:45: unsigned char l = *p++;
- 009A DD 6E F7 [19] 177 ld l, -9 (ix)
- 009D DD 66 F8 [19] 178 ld h, -8 (ix)
- 00A0 7E [ 7] 179 ld a, (hl)
- 00A1 DD 77 FD [19] 180 ld -3 (ix), a
- 00A4 DD 7E F7 [19] 181 ld a, -9 (ix)
- 00A7 C6 02 [ 7] 182 add a, #0x02
- 00A9 DD 77 F7 [19] 183 ld -9 (ix), a
- 00AC 30 03 [12] 184 jr NC,00193$
- 00AE DD 34 F8 [23] 185 inc -8 (ix)
- 00B1 186 00193$:
- 187 ;boot_rom.c:46: for(j=0;j<8;j++) {
- 00B1 DD 36 FE 08 [19] 188 ld -2 (ix), #0x08
- 00B5 DD 36 FF 00 [19] 189 ld -1 (ix), #0x00
- 00B9 D1 [10] 190 pop de
- 00BA D5 [11] 191 push de
- 00BB 192 00119$:
- 193 ;boot_rom.c:47: *dptr++ = (l & 0x80) ? color : 0x00;
- 00BB DD 73 FB [19] 194 ld -5 (ix), e
- 00BE DD 72 FC [19] 195 ld -4 (ix), d
- 00C1 13 [ 6] 196 inc de
- 00C2 13 [ 6] 197 inc de
- 00C3 DD CB FD 7E [20] 198 bit 7, -3 (ix)
- 00C7 28 0C [12] 199 jr Z,00124$
- 00C9 3Ar06r00 [13] 200 ld a,(#_color + 0)
- 00CC DD 77 F9 [19] 201 ld -7 (ix), a
- 00CF DD 36 FA 00 [19] 202 ld -6 (ix), #0x00
- 00D3 18 08 [12] 203 jr 00125$
- 00D5 204 00124$:
- 00D5 DD 36 F9 00 [19] 205 ld -7 (ix), #0x00
- 00D9 DD 36 FA 00 [19] 206 ld -6 (ix), #0x00
- 00DD 207 00125$:
- 00DD DD 6E FB [19] 208 ld l, -5 (ix)
- 00E0 DD 66 FC [19] 209 ld h, -4 (ix)
- 00E3 DD 7E F9 [19] 210 ld a, -7 (ix)
- 00E6 77 [ 7] 211 ld (hl), a
- 00E7 23 [ 6] 212 inc hl
- 00E8 DD 7E FA [19] 213 ld a, -6 (ix)
- 00EB 77 [ 7] 214 ld (hl), a
- 215 ;boot_rom.c:48: l <<= 1;
- 00EC DD 7E FD [19] 216 ld a, -3 (ix)
- 00EF 87 [ 4] 217 add a, a
- 00F0 DD 77 FD [19] 218 ld -3 (ix), a
- 00F3 DD 6E FE [19] 219 ld l, -2 (ix)
- 00F6 DD 66 FF [19] 220 ld h, -1 (ix)
- 00F9 2B [ 6] 221 dec hl
- 00FA DD 75 FE [19] 222 ld -2 (ix), l
- 00FD DD 74 FF [19] 223 ld -1 (ix), h
- 224 ;boot_rom.c:46: for(j=0;j<8;j++) {
- 0100 7C [ 4] 225 ld a, h
- 0101 B5 [ 4] 226 or a, l
- 0102 20 B7 [12] 227 jr NZ,00119$
- 228 ;boot_rom.c:50: dptr += (VGA_WIDTH-8);
- 0104 2Ar61r01 [16] 229 ld hl, (_VGA_WIDTH)
- 0107 7D [ 4] 230 ld a, l
- 0108 C6 F8 [ 7] 231 add a, #0xf8
- 010A 6F [ 4] 232 ld l, a
- 010B 7C [ 4] 233 ld a, h
- 010C CE FF [ 7] 234 adc a, #0xff
- 010E 67 [ 4] 235 ld h, a
- 010F 29 [11] 236 add hl, hl
- 0110 19 [11] 237 add hl, de
- 0111 33 [ 6] 238 inc sp
- 0112 33 [ 6] 239 inc sp
- 0113 E5 [11] 240 push hl
- 241 ;boot_rom.c:44: for(i=0;i<8;i++) {
- 0114 03 [ 6] 242 inc bc
- 0115 79 [ 4] 243 ld a, c
- 0116 D6 08 [ 7] 244 sub a, #0x08
- 0118 78 [ 4] 245 ld a, b
- 0119 17 [ 4] 246 rla
- 011A 3F [ 4] 247 ccf
- 011B 1F [ 4] 248 rra
- 011C DE 80 [ 7] 249 sbc a, #0x80
- 011E DAr9Ar00 [10] 250 jp C, 00120$
- 251 ;boot_rom.c:53: cur_x++;
- 0121 FD 21r01r00 [14] 252 ld iy, #_cur_x
- 0125 FD 34 00 [23] 253 inc 0 (iy)
- 0128 20 03 [12] 254 jr NZ,00195$
- 012A FD 34 01 [23] 255 inc 1 (iy)
- 012D 256 00195$:
- 257 ;boot_rom.c:54: if(cur_x >= 20) {
- 012D FD 7E 00 [19] 258 ld a, 0 (iy)
- 0130 D6 14 [ 7] 259 sub a, #0x14
- 0132 FD 7E 01 [19] 260 ld a, 1 (iy)
- 0135 DE 00 [ 7] 261 sbc a, #0x00
- 0137 38 23 [12] 262 jr C,00116$
- 263 ;boot_rom.c:55: cur_x = 0;
- 0139 21 00 00 [10] 264 ld hl, #0x0000
- 013C 22r01r00 [16] 265 ld (_cur_x), hl
- 266 ;boot_rom.c:56: cur_y++;
- 013F FD 21r03r00 [14] 267 ld iy, #_cur_y
- 0143 FD 34 00 [23] 268 inc 0 (iy)
- 0146 20 03 [12] 269 jr NZ,00196$
- 0148 FD 34 01 [23] 270 inc 1 (iy)
- 014B 271 00196$:
- 272 ;boot_rom.c:58: if(cur_y >= 12)
- 014B FD 7E 00 [19] 273 ld a, 0 (iy)
- 014E D6 0C [ 7] 274 sub a, #0x0c
- 0150 FD 7E 01 [19] 275 ld a, 1 (iy)
- 0153 DE 00 [ 7] 276 sbc a, #0x00
- 0155 38 05 [12] 277 jr C,00116$
- 278 ;boot_rom.c:59: cur_y = 0;
- 0157 2E 00 [ 7] 279 ld l, #0x00
- 0159 22r03r00 [16] 280 ld (_cur_y), hl
- 015C 281 00116$:
- 282 ;boot_rom.c:61: return;
- 015C 283 00122$:
- 284 ;boot_rom.c:62: }
- 015C DD F9 [10] 285 ld sp, ix
- 015E DD E1 [14] 286 pop ix
- 0160 C9 [10] 287 ret
- 0161 288 _VGA_WIDTH:
- 0161 40 01 289 .dw #0x0140
- 0163 290 _VGA_HEIGHT:
- 0163 C8 00 291 .dw #0x00c8
- 292 ;boot_rom.c:65: void put_pixel(unsigned int x, unsigned int y, unsigned char color) {
- 293 ; ---------------------------------
- 294 ; Function put_pixel
- 295 ; ---------------------------------
- 0165 296 _put_pixel::
- 297 ;boot_rom.c:66: *((unsigned int*)(VGA_WIDTH*y+x)) = color;
- 0165 2Ar61r01 [16] 298 ld hl, (_VGA_WIDTH)
- 0168 FD 21 04 00 [14] 299 ld iy, #4
- 016C FD 39 [15] 300 add iy, sp
- 016E FD 4E 00 [19] 301 ld c, 0 (iy)
- 0171 FD 46 01 [19] 302 ld b, 1 (iy)
- 0174 C5 [11] 303 push bc
- 0175 E5 [11] 304 push hl
- 0176 CDr00r00 [17] 305 call __mulint
- 0179 F1 [10] 306 pop af
- 017A F1 [10] 307 pop af
- 017B 4D [ 4] 308 ld c, l
- 017C 44 [ 4] 309 ld b, h
- 017D 79 [ 4] 310 ld a, c
- 017E 21 02 00 [10] 311 ld hl, #2
- 0181 39 [11] 312 add hl, sp
- 0182 86 [ 7] 313 add a, (hl)
- 0183 4F [ 4] 314 ld c, a
- 0184 78 [ 4] 315 ld a, b
- 0185 23 [ 6] 316 inc hl
- 0186 8E [ 7] 317 adc a, (hl)
- 0187 69 [ 4] 318 ld l, c
- 0188 67 [ 4] 319 ld h, a
- 0189 FD 21 06 00 [14] 320 ld iy, #6
- 018D FD 39 [15] 321 add iy, sp
- 018F FD 4E 00 [19] 322 ld c, 0 (iy)
- 0192 06 00 [ 7] 323 ld b, #0x00
- 0194 71 [ 7] 324 ld (hl), c
- 0195 23 [ 6] 325 inc hl
- 0196 70 [ 7] 326 ld (hl), b
- 327 ;boot_rom.c:67: }
- 0197 C9 [10] 328 ret
- 329 ;boot_rom.c:69: void cls(unsigned char color) {
- 330 ; ---------------------------------
- 331 ; Function cls
- 332 ; ---------------------------------
- 0198 333 _cls::
- 0198 DD E5 [15] 334 push ix
- 019A DD 21 00 00 [14] 335 ld ix,#0
- 019E DD 39 [15] 336 add ix,sp
- 01A0 3B [ 6] 337 dec sp
- 338 ;boot_rom.c:73: for(i=0;i= longest-shortest) {
- 02F9 7B [ 4] 532 ld a, e
- 02FA DD 96 F2 [19] 533 sub a, -14 (ix)
- 02FD 7A [ 4] 534 ld a, d
- 02FE DD 9E F3 [19] 535 sbc a, -13 (ix)
- 0301 38 4D [12] 536 jr C,00105$
- 537 ;boot_rom.c:110: numerator += shortest ;
- 538 ;boot_rom.c:111: numerator -= longest ;
- 0303 DD 7E F0 [19] 539 ld a, -16 (ix)
- 0306 DD 56 F1 [19] 540 ld d, -15 (ix)
- 0309 DD 96 FE [19] 541 sub a, -2 (ix)
- 030C 5F [ 4] 542 ld e, a
- 030D 7A [ 4] 543 ld a, d
- 030E DD 9E FF [19] 544 sbc a, -1 (ix)
- 0311 57 [ 4] 545 ld d, a
- 546 ;boot_rom.c:112: x += dx1;
- 0312 DD 7E F4 [19] 547 ld a, -12 (ix)
- 0315 DD 77 EE [19] 548 ld -18 (ix), a
- 0318 DD 7E F5 [19] 549 ld a, -11 (ix)
- 031B DD 77 EF [19] 550 ld -17 (ix), a
- 031E DD 7E 04 [19] 551 ld a, 4 (ix)
- 0321 DD 86 EE [19] 552 add a, -18 (ix)
- 0324 DD 77 04 [19] 553 ld 4 (ix), a
- 0327 DD 7E 05 [19] 554 ld a, 5 (ix)
- 032A DD 8E EF [19] 555 adc a, -17 (ix)
- 032D DD 77 05 [19] 556 ld 5 (ix), a
- 557 ;boot_rom.c:113: y += dy1;
- 0330 DD 7E F6 [19] 558 ld a, -10 (ix)
- 0333 DD 77 EE [19] 559 ld -18 (ix), a
- 0336 DD 7E F7 [19] 560 ld a, -9 (ix)
- 0339 DD 77 EF [19] 561 ld -17 (ix), a
- 033C DD 7E 06 [19] 562 ld a, 6 (ix)
- 033F DD 86 EE [19] 563 add a, -18 (ix)
- 0342 DD 77 06 [19] 564 ld 6 (ix), a
- 0345 DD 7E 07 [19] 565 ld a, 7 (ix)
- 0348 DD 8E EF [19] 566 adc a, -17 (ix)
- 034B DD 77 07 [19] 567 ld 7 (ix), a
- 034E 18 39 [12] 568 jr 00109$
- 0350 569 00105$:
- 570 ;boot_rom.c:115: numerator += shortest ;
- 0350 DD 5E F0 [19] 571 ld e, -16 (ix)
- 0353 DD 56 F1 [19] 572 ld d, -15 (ix)
- 573 ;boot_rom.c:116: x += dx2;
- 0356 33 [ 6] 574 inc sp
- 0357 33 [ 6] 575 inc sp
- 0358 C5 [11] 576 push bc
- 0359 DD 7E 04 [19] 577 ld a, 4 (ix)
- 035C DD 86 EE [19] 578 add a, -18 (ix)
- 035F DD 77 04 [19] 579 ld 4 (ix), a
- 0362 DD 7E 05 [19] 580 ld a, 5 (ix)
- 0365 DD 8E EF [19] 581 adc a, -17 (ix)
- 0368 DD 77 05 [19] 582 ld 5 (ix), a
- 583 ;boot_rom.c:117: y += dy2;
- 036B DD 7E F8 [19] 584 ld a, -8 (ix)
- 036E DD 77 EE [19] 585 ld -18 (ix), a
- 0371 DD 7E F9 [19] 586 ld a, -7 (ix)
- 0374 DD 77 EF [19] 587 ld -17 (ix), a
- 0377 DD 7E 06 [19] 588 ld a, 6 (ix)
- 037A DD 86 EE [19] 589 add a, -18 (ix)
- 037D DD 77 06 [19] 590 ld 6 (ix), a
- 0380 DD 7E 07 [19] 591 ld a, 7 (ix)
- 0383 DD 8E EF [19] 592 adc a, -17 (ix)
- 0386 DD 77 07 [19] 593 ld 7 (ix), a
- 0389 594 00109$:
- 595 ;boot_rom.c:107: for(i=0;i<=longest;i++) {
- 0389 DD 34 FA [23] 596 inc -6 (ix)
- 038C 20 03 [12] 597 jr NZ,00142$
- 038E DD 34 FB [23] 598 inc -5 (ix)
- 0391 599 00142$:
- 0391 DD 7E FE [19] 600 ld a, -2 (ix)
- 0394 DD 96 FA [19] 601 sub a, -6 (ix)
- 0397 DD 7E FF [19] 602 ld a, -1 (ix)
- 039A DD 9E FB [19] 603 sbc a, -5 (ix)
- 039D D2rCEr02 [10] 604 jp NC, 00108$
- 605 ;boot_rom.c:120: }
- 03A0 DD F9 [10] 606 ld sp, ix
- 03A2 DD E1 [14] 607 pop ix
- 03A4 C9 [10] 608 ret
- 609 ;boot_rom.c:123: void main() {
- 610 ; ---------------------------------
- 611 ; Function main
- 612 ; ---------------------------------
- 03A5 613 _main::
- 614 ;boot_rom.c:124: while(1) {
- 03A5 615 00108$:
- 616 ;boot_rom.c:127: input0_cache = input0;
- 03A5 3A 00 40 [13] 617 ld a,(#_input0 + 0)
- 03A8 FD 21r04r00 [14] 618 ld iy, #_input0_cache
- 03AC FD 77 00 [19] 619 ld 0 (iy), a
- 620 ;boot_rom.c:128: hsync = input0_cache & 0x80;
- 03AF FD 4E 00 [19] 621 ld c, 0 (iy)
- 03B2 79 [ 4] 622 ld a, c
- 03B3 E6 80 [ 7] 623 and a, #0x80
- 03B5 32r00r00 [13] 624 ld (#_hsync + 0),a
- 625 ;boot_rom.c:129: vsync = input0_cache & 0x40;
- 03B8 79 [ 4] 626 ld a, c
- 03B9 E6 40 [ 7] 627 and a, #0x40
- 03BB 32r02r00 [13] 628 ld (#_vsync + 0),a
- 629 ;boot_rom.c:131: if(hsync && !hsync_last){
- 03BE 3Ar00r00 [13] 630 ld a,(#_hsync + 0)
- 03C1 B7 [ 4] 631 or a, a
- 03C2 28 0A [12] 632 jr Z,00102$
- 03C4 3Ar01r00 [13] 633 ld a,(#_hsync_last + 0)
- 03C7 B7 [ 4] 634 or a, a
- 03C8 20 04 [12] 635 jr NZ,00102$
- 636 ;boot_rom.c:132: y++;
- 03CA 21r00r00 [10] 637 ld hl, #_y+0
- 03CD 34 [11] 638 inc (hl)
- 03CE 639 00102$:
- 640 ;boot_rom.c:134: if(vsync && !vsync_last){
- 03CE 3Ar02r00 [13] 641 ld a,(#_vsync + 0)
- 03D1 B7 [ 4] 642 or a, a
- 03D2 28 11 [12] 643 jr Z,00105$
- 03D4 3Ar03r00 [13] 644 ld a,(#_vsync_last + 0)
- 03D7 B7 [ 4] 645 or a, a
- 03D8 20 0B [12] 646 jr NZ,00105$
- 647 ;boot_rom.c:135: y=0;
- 03DA 21r00r00 [10] 648 ld hl,#_y + 0
- 03DD 36 00 [10] 649 ld (hl), #0x00
- 650 ;boot_rom.c:138: input1_cache = input1;
- 03DF 3A 01 40 [13] 651 ld a,(#_input1 + 0)
- 03E2 32r05r00 [13] 652 ld (#_input1_cache + 0),a
- 03E5 653 00105$:
- 654 ;boot_rom.c:141: hsync_last = hsync;
- 03E5 3Ar00r00 [13] 655 ld a,(#_hsync + 0)
- 03E8 32r01r00 [13] 656 ld (#_hsync_last + 0),a
- 657 ;boot_rom.c:142: vsync_last = vsync;
- 03EB 3Ar02r00 [13] 658 ld a,(#_vsync + 0)
- 03EE 32r03r00 [13] 659 ld (#_vsync_last + 0),a
- 660 ;boot_rom.c:144: }
- 03F1 18 B2 [12] 661 jr 00108$
- 662 .area _CODE
- 663 .area _INITIALIZER
- 0000 664 __xinit__y:
- 0000 00 665 .db #0x00 ; 0
- 0001 666 __xinit__cur_x:
- 0001 00 00 667 .dw #0x0000
- 0003 668 __xinit__cur_y:
- 0003 00 00 669 .dw #0x0000
- 670 .area _CABS (ABS)
+ 80 .area _HOME
+ 81 ;--------------------------------------------------------
+ 82 ; code
+ 83 ;--------------------------------------------------------
+ 84 .area _CODE
+ 85 ;boot_rom.c:25: int putchar(int c) {
+ 86 ; ---------------------------------
+ 87 ; Function putchar
+ 88 ; ---------------------------------
+ 0000 89 _putchar::
+ 0000 DD E5 [15] 90 push ix
+ 0002 DD 21 00 00 [14] 91 ld ix,#0
+ 0006 DD 39 [15] 92 add ix,sp
+ 0008 21 F9 FF [10] 93 ld hl, #-7
+ 000B 39 [11] 94 add hl, sp
+ 000C F9 [ 6] 95 ld sp, hl
+ 96 ;boot_rom.c:27: unsigned char *dptr = (unsigned char*)(160*(8*cur_y) + 8*cur_x);
+ 000D 21r02r00 [10] 97 ld hl,#_cur_y + 0
+ 0010 4E [ 7] 98 ld c, (hl)
+ 0011 06 00 [ 7] 99 ld b, #0x00
+ 0013 69 [ 4] 100 ld l, c
+ 0014 60 [ 4] 101 ld h, b
+ 0015 29 [11] 102 add hl, hl
+ 0016 29 [11] 103 add hl, hl
+ 0017 09 [11] 104 add hl, bc
+ 0018 29 [11] 105 add hl, hl
+ 0019 29 [11] 106 add hl, hl
+ 001A 29 [11] 107 add hl, hl
+ 001B 29 [11] 108 add hl, hl
+ 001C 29 [11] 109 add hl, hl
+ 001D 29 [11] 110 add hl, hl
+ 001E 29 [11] 111 add hl, hl
+ 001F 29 [11] 112 add hl, hl
+ 0020 EB [ 4] 113 ex de, hl
+ 0021 FD 21r01r00 [14] 114 ld iy, #_cur_x
+ 0025 FD 6E 00 [19] 115 ld l, 0 (iy)
+ 0028 26 00 [ 7] 116 ld h, #0x00
+ 002A 29 [11] 117 add hl, hl
+ 002B 29 [11] 118 add hl, hl
+ 002C 29 [11] 119 add hl, hl
+ 002D 19 [11] 120 add hl, de
+ 002E DD 75 FB [19] 121 ld -5 (ix), l
+ 0031 DD 74 FC [19] 122 ld -4 (ix), h
+ 123 ;boot_rom.c:30: if(c < 32) {
+ 0034 DD 7E 04 [19] 124 ld a, 4 (ix)
+ 0037 D6 20 [ 7] 125 sub a, #0x20
+ 0039 DD 7E 05 [19] 126 ld a, 5 (ix)
+ 003C 17 [ 4] 127 rla
+ 003D 3F [ 4] 128 ccf
+ 003E 1F [ 4] 129 rra
+ 003F DE 80 [ 7] 130 sbc a, #0x80
+ 0041 30 3B [12] 131 jr NC,00108$
+ 132 ;boot_rom.c:31: if(c == '\r')
+ 0043 DD 7E 04 [19] 133 ld a, 4 (ix)
+ 0046 D6 0D [ 7] 134 sub a, #0x0d
+ 0048 DD B6 05 [19] 135 or a, 5 (ix)
+ 004B 20 04 [12] 136 jr NZ,00102$
+ 137 ;boot_rom.c:32: cur_x=0;
+ 004D FD 36 00 00 [19] 138 ld 0 (iy), #0x00
+ 0051 139 00102$:
+ 140 ;boot_rom.c:34: if(c == '\n') {
+ 0051 DD 7E 04 [19] 141 ld a, 4 (ix)
+ 0054 D6 0A [ 7] 142 sub a, #0x0a
+ 0056 DD B6 05 [19] 143 or a, 5 (ix)
+ 0059 C2r0Br01 [10] 144 jp NZ,00122$
+ 145 ;boot_rom.c:35: cur_y++;
+ 005C FD 21r02r00 [14] 146 ld iy, #_cur_y
+ 0060 FD 34 00 [23] 147 inc 0 (iy)
+ 148 ;boot_rom.c:36: cur_x=0;
+ 0063 FD 21r01r00 [14] 149 ld iy, #_cur_x
+ 0067 FD 36 00 00 [19] 150 ld 0 (iy), #0x00
+ 151 ;boot_rom.c:38: if(cur_y >= 12)
+ 006B FD 21r02r00 [14] 152 ld iy, #_cur_y
+ 006F FD 7E 00 [19] 153 ld a, 0 (iy)
+ 0072 D6 0C [ 7] 154 sub a, #0x0c
+ 0074 DAr0Br01 [10] 155 jp C,00122$
+ 156 ;boot_rom.c:39: cur_y = 0;
+ 0077 FD 36 00 00 [19] 157 ld 0 (iy), #0x00
+ 158 ;boot_rom.c:41: return;
+ 007B C3r0Br01 [10] 159 jp 00122$
+ 007E 160 00108$:
+ 161 ;boot_rom.c:44: if(c < 0) return;
+ 007E DD CB 05 7E [20] 162 bit 7, 5 (ix)
+ 0082 C2r0Br01 [10] 163 jp NZ,00122$
+ 164 ;boot_rom.c:46: p = font+8*(unsigned char)(c-32);
+ 0085 01r00r00 [10] 165 ld bc, #_font+0
+ 0088 DD 7E 04 [19] 166 ld a, 4 (ix)
+ 008B C6 E0 [ 7] 167 add a, #0xe0
+ 008D 6F [ 4] 168 ld l, a
+ 008E 26 00 [ 7] 169 ld h, #0x00
+ 0090 29 [11] 170 add hl, hl
+ 0091 29 [11] 171 add hl, hl
+ 0092 29 [11] 172 add hl, hl
+ 0093 09 [11] 173 add hl, bc
+ 0094 4D [ 4] 174 ld c, l
+ 0095 44 [ 4] 175 ld b, h
+ 176 ;boot_rom.c:47: for(i=0;i<8;i++) {
+ 0096 DD 36 FE 00 [19] 177 ld -2 (ix), #0x00
+ 009A 178 00120$:
+ 179 ;boot_rom.c:48: unsigned char l = *p++;
+ 009A 0A [ 7] 180 ld a, (bc)
+ 009B DD 77 FF [19] 181 ld -1 (ix), a
+ 009E 03 [ 6] 182 inc bc
+ 183 ;boot_rom.c:49: for(j=0;j<8;j++) {
+ 009F DD 36 FD 08 [19] 184 ld -3 (ix), #0x08
+ 00A3 DD 5E FB [19] 185 ld e, -5 (ix)
+ 00A6 DD 56 FC [19] 186 ld d, -4 (ix)
+ 00A9 187 00119$:
+ 188 ;boot_rom.c:50: *dptr++ = (l & 0x80)?color:0x00;
+ 00A9 33 [ 6] 189 inc sp
+ 00AA 33 [ 6] 190 inc sp
+ 00AB D5 [11] 191 push de
+ 00AC 13 [ 6] 192 inc de
+ 00AD DD CB FF 7E [20] 193 bit 7, -1 (ix)
+ 00B1 28 09 [12] 194 jr Z,00124$
+ 00B3 FD 21r03r00 [14] 195 ld iy, #_color
+ 00B7 FD 6E 00 [19] 196 ld l, 0 (iy)
+ 00BA 18 03 [12] 197 jr 00125$
+ 00BC 198 00124$:
+ 00BC 21 00 00 [10] 199 ld hl, #0x0000
+ 00BF 200 00125$:
+ 00BF 7D [ 4] 201 ld a, l
+ 00C0 E1 [10] 202 pop hl
+ 00C1 E5 [11] 203 push hl
+ 00C2 77 [ 7] 204 ld (hl), a
+ 205 ;boot_rom.c:51: l <<= 1;
+ 00C3 DD 7E FF [19] 206 ld a, -1 (ix)
+ 00C6 87 [ 4] 207 add a, a
+ 00C7 DD 77 FF [19] 208 ld -1 (ix), a
+ 00CA DD 35 FD [23] 209 dec -3 (ix)
+ 00CD DD 7E FD [19] 210 ld a, -3 (ix)
+ 211 ;boot_rom.c:49: for(j=0;j<8;j++) {
+ 00D0 B7 [ 4] 212 or a, a
+ 00D1 20 D6 [12] 213 jr NZ,00119$
+ 214 ;boot_rom.c:53: dptr += (160-8);
+ 00D3 21 98 00 [10] 215 ld hl, #0x0098
+ 00D6 19 [11] 216 add hl, de
+ 00D7 DD 75 FB [19] 217 ld -5 (ix), l
+ 00DA DD 74 FC [19] 218 ld -4 (ix), h
+ 219 ;boot_rom.c:47: for(i=0;i<8;i++) {
+ 00DD DD 34 FE [23] 220 inc -2 (ix)
+ 00E0 DD 7E FE [19] 221 ld a, -2 (ix)
+ 00E3 D6 08 [ 7] 222 sub a, #0x08
+ 00E5 38 B3 [12] 223 jr C,00120$
+ 224 ;boot_rom.c:56: cur_x++;
+ 00E7 FD 21r01r00 [14] 225 ld iy, #_cur_x
+ 00EB FD 34 00 [23] 226 inc 0 (iy)
+ 227 ;boot_rom.c:57: if(cur_x >= 20) {
+ 00EE FD 7E 00 [19] 228 ld a, 0 (iy)
+ 00F1 D6 14 [ 7] 229 sub a, #0x14
+ 00F3 38 16 [12] 230 jr C,00122$
+ 231 ;boot_rom.c:58: cur_x = 0;
+ 00F5 FD 36 00 00 [19] 232 ld 0 (iy), #0x00
+ 233 ;boot_rom.c:59: cur_y++;
+ 00F9 FD 21r02r00 [14] 234 ld iy, #_cur_y
+ 00FD FD 34 00 [23] 235 inc 0 (iy)
+ 236 ;boot_rom.c:61: if(cur_y >= 12)
+ 0100 FD 7E 00 [19] 237 ld a, 0 (iy)
+ 0103 D6 0C [ 7] 238 sub a, #0x0c
+ 0105 38 04 [12] 239 jr C,00122$
+ 240 ;boot_rom.c:62: cur_y = 0;
+ 0107 FD 36 00 00 [19] 241 ld 0 (iy), #0x00
+ 010B 242 00122$:
+ 243 ;boot_rom.c:64: }
+ 010B DD F9 [10] 244 ld sp, ix
+ 010D DD E1 [14] 245 pop ix
+ 010F C9 [10] 246 ret
+ 0110 247 _VGA_WIDTH:
+ 0110 A0 00 248 .dw #0x00a0
+ 0112 249 _VGA_HEIGHT:
+ 0112 64 00 250 .dw #0x0064
+ 251 ;boot_rom.c:67: void put_pixel(unsigned int x, unsigned int y, unsigned char color) {
+ 252 ; ---------------------------------
+ 253 ; Function put_pixel
+ 254 ; ---------------------------------
+ 0114 255 _put_pixel::
+ 256 ;boot_rom.c:68: *((unsigned int*)(VGA_WIDTH*y+x)) = color;
+ 0114 2Ar10r01 [16] 257 ld hl, (_VGA_WIDTH)
+ 0117 FD 21 04 00 [14] 258 ld iy, #4
+ 011B FD 39 [15] 259 add iy, sp
+ 011D FD 4E 00 [19] 260 ld c, 0 (iy)
+ 0120 FD 46 01 [19] 261 ld b, 1 (iy)
+ 0123 C5 [11] 262 push bc
+ 0124 E5 [11] 263 push hl
+ 0125 CDr00r00 [17] 264 call __mulint
+ 0128 F1 [10] 265 pop af
+ 0129 F1 [10] 266 pop af
+ 012A 4D [ 4] 267 ld c, l
+ 012B 44 [ 4] 268 ld b, h
+ 012C 79 [ 4] 269 ld a, c
+ 012D 21 02 00 [10] 270 ld hl, #2
+ 0130 39 [11] 271 add hl, sp
+ 0131 86 [ 7] 272 add a, (hl)
+ 0132 4F [ 4] 273 ld c, a
+ 0133 78 [ 4] 274 ld a, b
+ 0134 23 [ 6] 275 inc hl
+ 0135 8E [ 7] 276 adc a, (hl)
+ 0136 69 [ 4] 277 ld l, c
+ 0137 67 [ 4] 278 ld h, a
+ 0138 FD 21 06 00 [14] 279 ld iy, #6
+ 013C FD 39 [15] 280 add iy, sp
+ 013E FD 4E 00 [19] 281 ld c, 0 (iy)
+ 0141 06 00 [ 7] 282 ld b, #0x00
+ 0143 71 [ 7] 283 ld (hl), c
+ 0144 23 [ 6] 284 inc hl
+ 0145 70 [ 7] 285 ld (hl), b
+ 286 ;boot_rom.c:69: }
+ 0146 C9 [10] 287 ret
+ 288 ;boot_rom.c:71: void cls(unsigned char color) {
+ 289 ; ---------------------------------
+ 290 ; Function cls
+ 291 ; ---------------------------------
+ 0147 292 _cls::
+ 0147 DD E5 [15] 293 push ix
+ 0149 DD 21 00 00 [14] 294 ld ix,#0
+ 014D DD 39 [15] 295 add ix,sp
+ 014F 3B [ 6] 296 dec sp
+ 297 ;boot_rom.c:73: unsigned int *p = (unsigned int*)0;
+ 0150 11 00 00 [10] 298 ld de, #0x0000
+ 299 ;boot_rom.c:74: for(i=0;i= longest-shortest) {
+ 0298 7B [ 4] 474 ld a, e
+ 0299 DD 96 F2 [19] 475 sub a, -14 (ix)
+ 029C 7A [ 4] 476 ld a, d
+ 029D DD 9E F3 [19] 477 sbc a, -13 (ix)
+ 02A0 38 4D [12] 478 jr C,00105$
+ 479 ;boot_rom.c:105: numerator += shortest ;
+ 480 ;boot_rom.c:106: numerator -= longest ;
+ 02A2 DD 7E F0 [19] 481 ld a, -16 (ix)
+ 02A5 DD 56 F1 [19] 482 ld d, -15 (ix)
+ 02A8 DD 96 F6 [19] 483 sub a, -10 (ix)
+ 02AB 5F [ 4] 484 ld e, a
+ 02AC 7A [ 4] 485 ld a, d
+ 02AD DD 9E F7 [19] 486 sbc a, -9 (ix)
+ 02B0 57 [ 4] 487 ld d, a
+ 488 ;boot_rom.c:107: x += dx1;
+ 02B1 DD 7E FA [19] 489 ld a, -6 (ix)
+ 02B4 DD 77 EE [19] 490 ld -18 (ix), a
+ 02B7 DD 7E FB [19] 491 ld a, -5 (ix)
+ 02BA DD 77 EF [19] 492 ld -17 (ix), a
+ 02BD DD 7E 04 [19] 493 ld a, 4 (ix)
+ 02C0 DD 86 EE [19] 494 add a, -18 (ix)
+ 02C3 DD 77 04 [19] 495 ld 4 (ix), a
+ 02C6 DD 7E 05 [19] 496 ld a, 5 (ix)
+ 02C9 DD 8E EF [19] 497 adc a, -17 (ix)
+ 02CC DD 77 05 [19] 498 ld 5 (ix), a
+ 499 ;boot_rom.c:108: y += dy1;
+ 02CF DD 7E F8 [19] 500 ld a, -8 (ix)
+ 02D2 DD 77 EE [19] 501 ld -18 (ix), a
+ 02D5 DD 7E F9 [19] 502 ld a, -7 (ix)
+ 02D8 DD 77 EF [19] 503 ld -17 (ix), a
+ 02DB DD 7E 06 [19] 504 ld a, 6 (ix)
+ 02DE DD 86 EE [19] 505 add a, -18 (ix)
+ 02E1 DD 77 06 [19] 506 ld 6 (ix), a
+ 02E4 DD 7E 07 [19] 507 ld a, 7 (ix)
+ 02E7 DD 8E EF [19] 508 adc a, -17 (ix)
+ 02EA DD 77 07 [19] 509 ld 7 (ix), a
+ 02ED 18 39 [12] 510 jr 00109$
+ 02EF 511 00105$:
+ 512 ;boot_rom.c:110: numerator += shortest ;
+ 02EF DD 5E F0 [19] 513 ld e, -16 (ix)
+ 02F2 DD 56 F1 [19] 514 ld d, -15 (ix)
+ 515 ;boot_rom.c:111: x += dx2;
+ 02F5 33 [ 6] 516 inc sp
+ 02F6 33 [ 6] 517 inc sp
+ 02F7 C5 [11] 518 push bc
+ 02F8 DD 7E 04 [19] 519 ld a, 4 (ix)
+ 02FB DD 86 EE [19] 520 add a, -18 (ix)
+ 02FE DD 77 04 [19] 521 ld 4 (ix), a
+ 0301 DD 7E 05 [19] 522 ld a, 5 (ix)
+ 0304 DD 8E EF [19] 523 adc a, -17 (ix)
+ 0307 DD 77 05 [19] 524 ld 5 (ix), a
+ 525 ;boot_rom.c:112: y += dy2;
+ 030A DD 7E F4 [19] 526 ld a, -12 (ix)
+ 030D DD 77 EE [19] 527 ld -18 (ix), a
+ 0310 DD 7E F5 [19] 528 ld a, -11 (ix)
+ 0313 DD 77 EF [19] 529 ld -17 (ix), a
+ 0316 DD 7E 06 [19] 530 ld a, 6 (ix)
+ 0319 DD 86 EE [19] 531 add a, -18 (ix)
+ 031C DD 77 06 [19] 532 ld 6 (ix), a
+ 031F DD 7E 07 [19] 533 ld a, 7 (ix)
+ 0322 DD 8E EF [19] 534 adc a, -17 (ix)
+ 0325 DD 77 07 [19] 535 ld 7 (ix), a
+ 0328 536 00109$:
+ 537 ;boot_rom.c:102: for(i=0;i<=longest;i++) {
+ 0328 DD 34 FC [23] 538 inc -4 (ix)
+ 032B 20 03 [12] 539 jr NZ,00142$
+ 032D DD 34 FD [23] 540 inc -3 (ix)
+ 0330 541 00142$:
+ 0330 DD 7E F6 [19] 542 ld a, -10 (ix)
+ 0333 DD 96 FC [19] 543 sub a, -4 (ix)
+ 0336 DD 7E F7 [19] 544 ld a, -9 (ix)
+ 0339 DD 9E FD [19] 545 sbc a, -3 (ix)
+ 033C D2r6Dr02 [10] 546 jp NC, 00108$
+ 547 ;boot_rom.c:115: }
+ 033F DD F9 [10] 548 ld sp, ix
+ 0341 DD E1 [14] 549 pop ix
+ 0343 C9 [10] 550 ret
+ 551 ;boot_rom.c:119: void main() {
+ 552 ; ---------------------------------
+ 553 ; Function main
+ 554 ; ---------------------------------
+ 0344 555 _main::
+ 556 ;boot_rom.c:120: while(1) {
+ 0344 557 00108$:
+ 558 ;boot_rom.c:123: input0_cache = input0;
+ 0344 3A 00 60 [13] 559 ld a,(#_input0 + 0)
+ 0347 FD 21r04r00 [14] 560 ld iy, #_input0_cache
+ 034B FD 77 00 [19] 561 ld 0 (iy), a
+ 562 ;boot_rom.c:124: hsync = input0_cache & 0x80;
+ 034E FD 4E 00 [19] 563 ld c, 0 (iy)
+ 0351 79 [ 4] 564 ld a, c
+ 0352 E6 80 [ 7] 565 and a, #0x80
+ 0354 32r00r00 [13] 566 ld (#_hsync + 0),a
+ 567 ;boot_rom.c:125: vsync = input0_cache & 0x40;
+ 0357 79 [ 4] 568 ld a, c
+ 0358 E6 40 [ 7] 569 and a, #0x40
+ 035A 32r02r00 [13] 570 ld (#_vsync + 0),a
+ 571 ;boot_rom.c:127: if(hsync && !hsync_last){
+ 035D 3Ar00r00 [13] 572 ld a,(#_hsync + 0)
+ 0360 B7 [ 4] 573 or a, a
+ 0361 28 0A [12] 574 jr Z,00102$
+ 0363 3Ar01r00 [13] 575 ld a,(#_hsync_last + 0)
+ 0366 B7 [ 4] 576 or a, a
+ 0367 20 04 [12] 577 jr NZ,00102$
+ 578 ;boot_rom.c:128: y++;
+ 0369 21r00r00 [10] 579 ld hl, #_y+0
+ 036C 34 [11] 580 inc (hl)
+ 036D 581 00102$:
+ 582 ;boot_rom.c:130: if(vsync && !vsync_last){
+ 036D 3Ar02r00 [13] 583 ld a,(#_vsync + 0)
+ 0370 B7 [ 4] 584 or a, a
+ 0371 28 35 [12] 585 jr Z,00105$
+ 0373 3Ar03r00 [13] 586 ld a,(#_vsync_last + 0)
+ 0376 B7 [ 4] 587 or a, a
+ 0377 20 2F [12] 588 jr NZ,00105$
+ 589 ;boot_rom.c:131: y=0;
+ 0379 21r00r00 [10] 590 ld hl,#_y + 0
+ 037C 36 00 [10] 591 ld (hl), #0x00
+ 592 ;boot_rom.c:133: cur_x = 0;
+ 037E 21r01r00 [10] 593 ld hl,#_cur_x + 0
+ 0381 36 00 [10] 594 ld (hl), #0x00
+ 595 ;boot_rom.c:134: cur_y = 0;
+ 0383 21r02r00 [10] 596 ld hl,#_cur_y + 0
+ 0386 36 00 [10] 597 ld (hl), #0x00
+ 598 ;boot_rom.c:135: color++;
+ 0388 FD 21r03r00 [14] 599 ld iy, #_color
+ 038C FD 34 00 [23] 600 inc 0 (iy)
+ 601 ;boot_rom.c:136: cls(~color);
+ 038F FD 7E 00 [19] 602 ld a, 0 (iy)
+ 0392 2F [ 4] 603 cpl
+ 0393 47 [ 4] 604 ld b, a
+ 0394 C5 [11] 605 push bc
+ 0395 33 [ 6] 606 inc sp
+ 0396 CDr47r01 [17] 607 call _cls
+ 0399 33 [ 6] 608 inc sp
+ 609 ;boot_rom.c:137: puts(" << Z80 SoC >>\n");
+ 039A 21rB6r03 [10] 610 ld hl, #___str_0
+ 039D E5 [11] 611 push hl
+ 039E CDr00r00 [17] 612 call _puts
+ 03A1 F1 [10] 613 pop af
+ 614 ;boot_rom.c:140: input1_cache = input1;
+ 03A2 3A 01 60 [13] 615 ld a,(#_input1 + 0)
+ 03A5 32r05r00 [13] 616 ld (#_input1_cache + 0),a
+ 03A8 617 00105$:
+ 618 ;boot_rom.c:143: hsync_last = hsync;
+ 03A8 3Ar00r00 [13] 619 ld a,(#_hsync + 0)
+ 03AB 32r01r00 [13] 620 ld (#_hsync_last + 0),a
+ 621 ;boot_rom.c:144: vsync_last = vsync;
+ 03AE 3Ar02r00 [13] 622 ld a,(#_vsync + 0)
+ 03B1 32r03r00 [13] 623 ld (#_vsync_last + 0),a
+ 624 ;boot_rom.c:146: }
+ 03B4 18 8E [12] 625 jr 00108$
+ 03B6 626 ___str_0:
+ 03B6 20 3C 3C 20 5A 38 627 .ascii " << Z80 SoC >>"
+ 30 20 53 6F 43 20
+ 3E 3E
+ 03C4 0A 628 .db 0x0a
+ 03C5 00 629 .db 0x00
+ 630 .area _CODE
+ 631 .area _INITIALIZER
+ 0000 632 __xinit__y:
+ 0000 00 633 .db #0x00 ; 0
+ 0001 634 __xinit__cur_x:
+ 0001 00 635 .db #0x00 ; 0
+ 0002 636 __xinit__cur_y:
+ 0002 00 637 .db #0x00 ; 0
+ 0003 638 __xinit__color:
+ 0003 66 639 .db #0x66 ; 102 'f'
+ 640 .area _CABS (ABS)
diff --git a/src/boot_rom.map b/src/boot_rom.map
index cc80473..cb147f1 100644
--- a/src/boot_rom.map
+++ b/src/boot_rom.map
@@ -7,7 +7,7 @@ Area Addr Size Decimal Bytes (A
Value Global Global Defined In Module
----- -------------------------------- ------------------------
- 00000000 .__.ABS.
+ 00000000 .__.ABS. puts
00000000 l__BSEG
00000000 l__BSS
00000000 l__CABS
@@ -36,46 +36,49 @@ Area Addr Size Decimal Bytes (A
00000003 l__HEADER6
00000003 l__HEADER7
00000004 l__HEADER1
- 00000007 l__DATA
+ 00000006 l__DATA
0000000C l__HEADER8
0000000F l__GSINIT
00000200 s__CODE
- 00000305 l__INITIALIZED
- 00000305 l__INITIALIZER
- 00000423 l__CODE
- 00000623 s__HOME
- 00000623 s__INITIALIZER
- 00000928 s__GSINIT
- 00000937 s__GSFINAL
- 00004000 _input0 boot_rom
- 00004001 _input1 boot_rom
+ 00000304 l__INITIALIZED
+ 00000304 l__INITIALIZER
+ 00000447 l__CODE
+ 00000647 s__HOME
+ 00000647 s__INITIALIZER
+ 0000094B s__GSINIT
+ 0000095A s__GSFINAL
+ 00006000 _input0 boot_rom
+ 00006001 _input1 boot_rom
00008000 s__DATA
- 00008007 s__INITIALIZED
- 0000830C s__BSEG
- 0000830C s__BSS
- 0000830C s__HEAP
+ 00008006 s__INITIALIZED
+ 0000830A s__BSEG
+ 0000830A s__BSS
+ 0000830A s__HEAP
ASxxxx Linker V03.00 + NoICE + sdld, page 2.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
-_CODE 00000200 00000423 = 1059. bytes (REL,CON)
+_CODE 00000200 00000447 = 1095. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
00000200 __clock crt0
00000204 _exit crt0
0000020A _putchar boot_rom
- 0000036B _VGA_WIDTH boot_rom
- 0000036D _VGA_HEIGHT boot_rom
- 0000036F _put_pixel boot_rom
- 000003A2 _cls boot_rom
- 000003F8 _draw_line boot_rom
- 000005AF _main boot_rom
- 000005FD _abs
- 00000609 __mulint
- 0000060F __mul16
+ 0000031A _VGA_WIDTH boot_rom
+ 0000031C _VGA_HEIGHT boot_rom
+ 0000031E _put_pixel boot_rom
+ 00000351 _cls boot_rom
+ 00000397 _draw_line boot_rom
+ 0000054E _main boot_rom
+ 000005D0 _abs
+ 000005DC __mulint
+ 000005E2 __mul16
+ 000005F6 _memset _memset
+ 00000621 _puts puts
+
ASxxxx Linker V03.00 + NoICE + sdld, page 3.
Hexadecimal [32-Bits]
@@ -162,7 +165,7 @@ Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
-_INITIALIZER 00000623 00000305 = 773. bytes (REL,CON)
+_INITIALIZER 00000647 00000304 = 772. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
@@ -171,18 +174,18 @@ Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
-_GSINIT 00000928 0000000F = 15. bytes (REL,CON)
+_GSINIT 0000094B 0000000F = 15. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
- 00000928 gsinit crt0
+ 0000094B gsinit crt0
ASxxxx Linker V03.00 + NoICE + sdld, page 14.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
-_GSFINAL 00000937 00000001 = 1. bytes (REL,CON)
+_GSFINAL 0000095A 00000001 = 1. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
@@ -191,7 +194,7 @@ Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
-_DATA 00008000 00000007 = 7. bytes (REL,CON)
+_DATA 00008000 00000006 = 6. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
@@ -201,21 +204,20 @@ _DATA 00008000 00000007 = 7. bytes (R
00008003 _vsync_last boot_rom
00008004 _input0_cache boot_rom
00008005 _input1_cache boot_rom
- 00008006 _color boot_rom
-
ASxxxx Linker V03.00 + NoICE + sdld, page 16.
Hexadecimal [32-Bits]
Area Addr Size Decimal Bytes (Attributes)
-------------------------------- ---- ---- ------- ----- ------------
-_INITIALIZED 00008007 00000305 = 773. bytes (REL,CON)
+_INITIALIZED 00008006 00000304 = 772. bytes (REL,CON)
Value Global Global Defined In Module
----- -------------------------------- ------------------------
- 00008007 _y boot_rom
- 00008008 _cur_x boot_rom
- 0000800A _cur_y boot_rom
- 0000800C _font font
+ 00008006 _y boot_rom
+ 00008007 _cur_x boot_rom
+ 00008008 _cur_y boot_rom
+ 00008009 _color boot_rom
+ 0000800A _font font
ASxxxx Linker V03.00 + NoICE + sdld, page 17.
@@ -230,6 +232,8 @@ Libraries Linked [ object file ]
/usr/bin/../share/sdcc/lib/z80/z80.lib [ abs.rel ]
/usr/bin/../share/sdcc/lib/z80/z80.lib [ mul.rel ]
+/usr/bin/../share/sdcc/lib/z80/z80.lib [ _memset.rel ]
+/usr/bin/../share/sdcc/lib/z80/z80.lib [ puts.rel ]
ASxxxx Linker V03.00 + NoICE + sdld, page 18.
diff --git a/src/boot_rom.noi b/src/boot_rom.noi
index ca94677..f0383fd 100644
--- a/src/boot_rom.noi
+++ b/src/boot_rom.noi
@@ -27,46 +27,48 @@ DEF l__HEADER5 0x3
DEF l__HEADER6 0x3
DEF l__HEADER7 0x3
DEF l__HEADER1 0x4
-DEF l__DATA 0x7
+DEF l__DATA 0x6
DEF l__HEADER8 0xC
DEF l__GSINIT 0xF
DEF s__CODE 0x200
-DEF l__INITIALIZED 0x305
-DEF l__INITIALIZER 0x305
-DEF l__CODE 0x423
-DEF s__HOME 0x623
-DEF s__INITIALIZER 0x623
-DEF s__GSINIT 0x928
-DEF s__GSFINAL 0x937
-DEF _input0 0x4000
-DEF _input1 0x4001
+DEF l__INITIALIZED 0x304
+DEF l__INITIALIZER 0x304
+DEF l__CODE 0x447
+DEF s__HOME 0x647
+DEF s__INITIALIZER 0x647
+DEF s__GSINIT 0x94B
+DEF s__GSFINAL 0x95A
+DEF _input0 0x6000
+DEF _input1 0x6001
DEF s__DATA 0x8000
-DEF s__INITIALIZED 0x8007
-DEF s__BSEG 0x830C
-DEF s__BSS 0x830C
-DEF s__HEAP 0x830C
+DEF s__INITIALIZED 0x8006
+DEF s__BSEG 0x830A
+DEF s__BSS 0x830A
+DEF s__HEAP 0x830A
DEF __clock 0x200
DEF _exit 0x204
DEF _putchar 0x20A
-DEF _VGA_WIDTH 0x36B
-DEF _VGA_HEIGHT 0x36D
-DEF _put_pixel 0x36F
-DEF _cls 0x3A2
-DEF _draw_line 0x3F8
-DEF _main 0x5AF
-DEF _abs 0x5FD
-DEF __mulint 0x609
-DEF __mul16 0x60F
-DEF gsinit 0x928
+DEF _VGA_WIDTH 0x31A
+DEF _VGA_HEIGHT 0x31C
+DEF _put_pixel 0x31E
+DEF _cls 0x351
+DEF _draw_line 0x397
+DEF _main 0x54E
+DEF _abs 0x5D0
+DEF __mulint 0x5DC
+DEF __mul16 0x5E2
+DEF _memset 0x5F6
+DEF _puts 0x621
+DEF gsinit 0x94B
DEF _hsync 0x8000
DEF _hsync_last 0x8001
DEF _vsync 0x8002
DEF _vsync_last 0x8003
DEF _input0_cache 0x8004
DEF _input1_cache 0x8005
-DEF _color 0x8006
-DEF _y 0x8007
-DEF _cur_x 0x8008
-DEF _cur_y 0x800A
-DEF _font 0x800C
+DEF _y 0x8006
+DEF _cur_x 0x8007
+DEF _cur_y 0x8008
+DEF _color 0x8009
+DEF _font 0x800A
LOAD boot_rom.ihx
diff --git a/src/boot_rom.sym b/src/boot_rom.sym
index e0b27b1..8eba22f 100644
--- a/src/boot_rom.sym
+++ b/src/boot_rom.sym
@@ -7,45 +7,48 @@ Symbol Table
.__.ABS. = 0000 G
.__.CPU. = 0000 L
.__.H$L. = 0000 L
- 0 _VGA_HEIGHT 0163 GR
- 0 _VGA_WIDTH 0161 GR
+ 0 _VGA_HEIGHT 0112 GR
+ 0 _VGA_WIDTH 0110 GR
+ 0 ___str_0 03B6 R
__mulint **** GX
+ 7 __xinit__color 0003 R
7 __xinit__cur_x 0001 R
- 7 __xinit__cur_y 0003 R
+ 7 __xinit__cur_y 0002 R
7 __xinit__y 0000 R
_abs **** GX
- 0 _cls 0198 GR
- 1 _color 0006 GR
+ 0 _cls 0147 GR
+ 2 _color 0003 GR
2 _cur_x 0001 GR
- 2 _cur_y 0003 GR
- 0 _draw_line 01EE GR
+ 2 _cur_y 0002 GR
+ 0 _draw_line 018D GR
_font **** GX
1 _hsync 0000 GR
1 _hsync_last 0001 GR
- _input0 = 4000 G
+ _input0 = 6000 G
1 _input0_cache 0004 GR
- _input1 = 4001 G
+ _input1 = 6001 G
1 _input1_cache 0005 GR
- 0 _main 03A5 GR
- 0 _put_pixel 0165 GR
+ 0 _main 0344 GR
+ _memset **** GX
+ 0 _put_pixel 0114 GR
0 _putchar 0000 GR
+ _puts **** GX
1 _vsync 0002 GR
1 _vsync_last 0003 GR
2 _y 0000 GR
-
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Zilog Z80 / Hitachi HD64180 / ZX-Next), page 2.
Hexadecimal [16-Bits]
Area Table
- 0 _CODE size 3F3 flags 0
- 1 _DATA size 7 flags 0
- 2 _INITIALIZED size 5 flags 0
+ 0 _CODE size 3C6 flags 0
+ 1 _DATA size 6 flags 0
+ 2 _INITIALIZED size 4 flags 0
3 _DABS size 0 flags 8
4 _HOME size 0 flags 0
5 _GSINIT size 0 flags 0
6 _GSFINAL size 0 flags 0
- 7 _INITIALIZER size 5 flags 0
+ 7 _INITIALIZER size 4 flags 0
8 _CABS size 0 flags 8
diff --git a/src/font.bin b/src/font.bin
new file mode 100644
index 0000000..7e4bd28
Binary files /dev/null and b/src/font.bin differ
diff --git a/src/font.fnt b/src/font.fnt
new file mode 100644
index 0000000..5dee3f7
Binary files /dev/null and b/src/font.fnt differ
diff --git a/verilator/Makefile b/verilator/Makefile
index e5c0c7f..ead87ea 100644
--- a/verilator/Makefile
+++ b/verilator/Makefile
@@ -56,7 +56,8 @@ V_SRC = \
sim.v \
$(RTL)/soc.v \
$(RTL)/dpram.v \
- $(RTL)/video.v \
+ $(RTL)/spram.v \
+ $(RTL)/JTFRAME/jtframe_vtimer.v
../rtl/tv80/tv80_core.v \
../rtl/tv80/tv80_alu.v \
../rtl/tv80/tv80_mcode.v \
diff --git a/verilator/imgui.ini b/verilator/imgui.ini
index 52010f9..ec21158 100644
--- a/verilator/imgui.ini
+++ b/verilator/imgui.ini
@@ -9,7 +9,7 @@ Size=520,600
Collapsed=0
[Window][Virtual Dev Board v1.0]
-Pos=150,89
+Pos=580,10
Size=1000,1000
Collapsed=0
@@ -33,3 +33,13 @@ Pos=738,825
Size=269,180
Collapsed=0
+[Window][PGROM Editor]
+Pos=12,617
+Size=554,229
+Collapsed=0
+
+[Window][CHROM Editor]
+Pos=19,866
+Size=553,169
+Collapsed=0
+
diff --git a/verilator/sim.v b/verilator/sim.v
index 770d714..fe7168b 100644
--- a/verilator/sim.v
+++ b/verilator/sim.v
@@ -40,10 +40,10 @@ module top(VGA_R,VGA_B,VGA_G,VGA_HS,VGA_VS,VGA_HB,VGA_VB,reset,clk_sys,clk_vid,i
wire m_down = inputs[2];
wire m_up = inputs[3];
-wire VGA_DE;
soc soc(
.clk_sys(clk_sys),
.clk_pix(clk_sys),
+ .reset(reset | ioctl_download),
.VGA_HS(VGA_HS),
.VGA_VS(VGA_VS),
.VGA_R(VGA_R),
@@ -51,10 +51,10 @@ soc soc(
.VGA_B(VGA_B),
.VGA_HB(VGA_HB),
.VGA_VB(VGA_VB),
- .VGA_DE(VGA_DE),
.dn_addr(ioctl_addr[13:0]),
.dn_data(ioctl_dout),
.dn_wr(ioctl_wr),
+ .dn_index(ioctl_index),
.inputs({btn_coin, btn_start, m_bomb, m_fire, m_right, m_left, m_down, m_up})
);
diff --git a/verilator/sim/sim_video.cpp b/verilator/sim/sim_video.cpp
index 50f7310..2435fa2 100644
--- a/verilator/sim/sim_video.cpp
+++ b/verilator/sim/sim_video.cpp
@@ -46,6 +46,8 @@ int count_line;
int count_frame;
bool last_hblank;
bool last_vblank;
+bool last_hsync;
+bool last_vsync;
// Statistics
#ifdef WIN32
@@ -395,14 +397,15 @@ void SimVideo::StartFrame() {
#endif
}
-void SimVideo::Clock(bool hblank, bool vblank, uint32_t colour) {
-
- int ox = count_pixel + 1;
- int oy = count_line;
+void SimVideo::Clock(bool hblank, bool vblank, bool hsync, bool vsync, uint32_t colour) {
// Only draw outside of blanks
if (!(hblank || vblank)) {
+ //int ox = count_pixel + 1;
+ int ox = count_pixel;
+ int oy = count_line;
+
int x = ox, xs = output_width, y = oy;
if (output_rotate == -1) {
@@ -442,18 +445,20 @@ void SimVideo::Clock(bool hblank, bool vblank, uint32_t colour) {
}
- // Increment pixel counter
- count_pixel++;
+ // Increment pixel counter when not blanked
+ if (!(hblank || vblank)) {
+ count_pixel++;
+ }
- // Falling edge of hblank
- if (last_hblank && !hblank) {
+ // Next line on rising hsync
+ if (last_hsync && !hsync) {
// Increment line and reset pixel count
count_line++;
count_pixel = 0;
}
- // Falling edge of vblank
- if (last_vblank && !vblank) {
+ // Reset on rising vsync
+ if (last_vsync && !vsync) {
count_frame++;
count_line = 0;
@@ -470,6 +475,10 @@ void SimVideo::Clock(bool hblank, bool vblank, uint32_t colour) {
stats_fps = (float)(1000.0 / stats_frameTime);
}
+
+
last_hblank = hblank;
last_vblank = vblank;
+ last_hsync = hsync;
+ last_vsync = vsync;
}
\ No newline at end of file
diff --git a/verilator/sim/sim_video.h b/verilator/sim/sim_video.h
index 704c4b1..10595ca 100644
--- a/verilator/sim/sim_video.h
+++ b/verilator/sim/sim_video.h
@@ -38,6 +38,6 @@ public:
void UpdateTexture();
void CleanUp();
void StartFrame();
- void Clock(bool hblank, bool vblank, uint32_t colour);
+ void Clock(bool hblank, bool vblank, bool hsync, bool vsync, uint32_t colour);
int Initialise(const char* windowTitle);
};
diff --git a/verilator/sim_main.cpp b/verilator/sim_main.cpp
index 90ae144..1899b4d 100644
--- a/verilator/sim_main.cpp
+++ b/verilator/sim_main.cpp
@@ -74,8 +74,8 @@ double sc_time_stamp() { // Called by $time in Verilog.
}
int clockSpeed = 24; // This is not used, just a reminder for the dividers below
-SimClock clk_sys(1); // 12mhz
-SimClock clk_pix(1); // 6mhz
+SimClock clk_sys(2); // 12mhz
+SimClock clk_pix(2); // 6mhz
void resetSim() {
main_time = 0;
@@ -104,7 +104,7 @@ int verilate() {
// Output pixels on rising edge of pixel clock
if (clk_pix.clk && !clk_pix.old) {
uint32_t colour = 0xFF000000 | top->VGA_B << 16 | top->VGA_G << 8 | top->VGA_R;
- video.Clock(top->VGA_HB, top->VGA_VB, colour);
+ video.Clock(top->VGA_HB, top->VGA_VB, top->VGA_HS, top->VGA_VS, colour);
}
// Simulate both edges of system clock
@@ -177,6 +177,7 @@ int main(int argc, char** argv, char** env) {
if (video.Initialise(windowTitle) == 1) { return 1; }
bus.QueueDownload("../src/boot_rom.bin", 0);
+ bus.QueueDownload("../src/font.bin", 1);
#ifdef WIN32
@@ -234,7 +235,7 @@ int main(int argc, char** argv, char** env) {
ImGui::SliderInt("Rotate", &video.output_rotate, -1, 1); ImGui::SameLine();
ImGui::Checkbox("Flip V", &video.output_vflip);
- ImGui::Text("main_time: %d frame_count: %d sim FPS: %f", main_time, video.count_frame, video.stats_fps);
+ ImGui::Text("main_time: %d frame_count: %d sim FPS: %f", main_time, video.count_frame, video.stats_fps);
ImGui::Text("minx: %d maxx: %d miny: %d maxy: %d", video.stats_xMin, video.stats_xMax, video.stats_yMin, video.stats_yMax);
// Draw VGA output
@@ -242,39 +243,42 @@ int main(int argc, char** argv, char** env) {
ImGui::Image(video.texture_id, ImVec2(video.output_width * m, video.output_height * m));
ImGui::End();
- ImGui::Begin("ROM Editor");
- mem_edit_1.DrawContents(top->top__DOT__soc__DOT__rom__DOT__mem, 4096, 0);
- ImGui::End();
- ImGui::Begin("RAM Editor");
- mem_edit_2.DrawContents(top->top__DOT__soc__DOT__ram__DOT__mem, 4096, 0);
- ImGui::End();
- ImGui::Begin("VRAM Editor");
- mem_edit_3.DrawContents(top->top__DOT__soc__DOT__video__DOT__vmem, 320*200, 0);
- ImGui::End();
+ ImGui::Begin("PGROM Editor");
+ mem_edit_1.DrawContents(top->top__DOT__soc__DOT__pgrom__DOT__mem, 4096, 0);
+ ImGui::End();
+ ImGui::Begin("CHROM Editor");
+ mem_edit_1.DrawContents(top->top__DOT__soc__DOT__chrom__DOT__mem, 1024, 0);
+ ImGui::End();
+ //ImGui::Begin("RAM Editor");
+ // mem_edit_2.DrawContents(top->top__DOT__soc__DOT__ram__DOT__mem, 4096, 0);
+ // ImGui::End();
+ //ImGui::Begin("VRAM Editor");
+ //mem_edit_3.DrawContents(top->top__DOT__soc__DOT__video__DOT__vmem, 320*200, 0);
+ //ImGui::End();
- ImGui::Begin("CPU Registers");
- ImGui::Spacing();
- ImGui::Text("PC 0x%04X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__PC);
- ImGui::Text("ACC 0x%04X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__ACC);
- ImGui::Text("Main Registers");
+ ImGui::Begin("CPU Registers");
+ ImGui::Spacing();
+ ImGui::Text("PC 0x%04X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__PC);
+ ImGui::Text("ACC 0x%04X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__ACC);
+ ImGui::Text("Main Registers");
+ /*
+ ImGui::Text("B 0x%02X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__B);
+ ImGui::Text("C 0x%02X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__C);
+ ImGui::Text("D 0x%02X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__D);
+ ImGui::Text("E 0x%02X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__E);
+ ImGui::Text("H 0x%02X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__H);
+ ImGui::Text("L 0x%02X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__L);
+ */
+ //ImGui::Spacing();
+ //ImGui::Separator();
+ //ImGui::Text("16 bit Registers");
/*
- ImGui::Text("B 0x%02X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__B);
- ImGui::Text("C 0x%02X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__C);
- ImGui::Text("D 0x%02X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__D);
- ImGui::Text("E 0x%02X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__E);
- ImGui::Text("H 0x%02X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__H);
- ImGui::Text("L 0x%02X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__L);
-*/
- //ImGui::Spacing();
- //ImGui::Separator();
- //ImGui::Text("16 bit Registers");
-/*
- ImGui::Text("IX 0x%04X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__IX);
- ImGui::Text("IY 0x%04X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__IY);
- ImGui::Text("SP 0x%04X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__SP);
+ ImGui::Text("IX 0x%04X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__IX);
+ ImGui::Text("IY 0x%04X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__i_reg__DOT__IY);
+ ImGui::Text("SP 0x%04X", top->top__DOT__soc__DOT__T80x__DOT__i_tv80_core__DOT__SP);
*/
- ImGui::End();
+ ImGui::End();
video.UpdateTexture();
@@ -284,7 +288,7 @@ int main(int argc, char** argv, char** env) {
{
if (input.inputs[i]) { top->inputs |= (1 << i); }
}
-
+
// Run simulation
if (run_enable) {
for (int step = 0; step < batchSize; step++) { verilate(); }
diff --git a/verilator/verilate.sh b/verilator/verilate.sh
index 6d8ccfa..4e83959 100644
--- a/verilator/verilate.sh
+++ b/verilator/verilate.sh
@@ -1,6 +1,9 @@
#verilator -cc -exe --public --compiler msvc --converge-limit 2000 -Wno-WIDTH -Wno-IMPLICIT -Wno-MODDUP -Wno-UNSIGNED -Wno-CASEINCOMPLETE -Wno-CASEX -Wno-SYMRSVDWORD -Wno-COMBDLY -Wno-INITIALDLY -Wno-BLKANDNBLK -Wno-UNOPTFLAT -Wno-SELRANGE -Wno-CMPCONST -Wno-CASEOVERLAP -Wno-PINMISSING --top-module top sim.v \
-verilator -cc -exe --public --compiler msvc +define+SIMULATION=1 --converge-limit 2000 --top-module top sim.v \
-../rtl/video.v ../rtl/dpram.v ../rtl/soc.v \
+verilator -cc -exe --public --compiler msvc +define+SIMULATION=1 --converge-limit 2000 --top-module top sim.v \
+../rtl/dpram.v \
+../rtl/spram.v \
+../rtl/JTFRAME/jtframe_vtimer.v \
+../rtl/soc.v \
../rtl/tv80/tv80_core.v \
../rtl/tv80/tv80_alu.v \
../rtl/tv80/tv80_mcode.v \