mirror of
https://github.com/MiSTer-devel/Gameboy_MiSTer.git
synced 2026-04-19 03:04:09 +00:00
870 lines
20 KiB
Verilog
870 lines
20 KiB
Verilog
module sgb (
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input reset,
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input clk_sys,
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input ce,
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input clk_vid,
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input ce_pix,
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input sgb_en,
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input tint,
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input lcd_clkena,
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input [14:0] lcd_data,
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input [1:0] lcd_mode,
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input lcd_on,
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input [8:0] h_cnt,
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input [8:0] v_cnt,
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input [7:0] joystick_0,
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input [7:0] joystick_1,
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input [7:0] joystick_2,
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input [7:0] joystick_3,
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input [1:0] joy_p54,
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output [3:0] joy_do,
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output reg [15:0] sgb_border_pix,
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output reg sgb_pal_en,
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output reg [14:0] sgb_lcd_data,
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output reg sgb_lcd_clkena,
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output reg [1:0] sgb_lcd_mode,
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output reg sgb_lcd_on
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);
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localparam CMD_PAL01 = 5'h00;
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localparam CMD_PAL23 = 5'h01;
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localparam CMD_PAL03 = 5'h02;
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localparam CMD_PAL12 = 5'h03;
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localparam CMD_ATTR_BLK = 5'h04;
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localparam CMD_ATTR_LIN = 5'h05;
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localparam CMD_ATTR_DIV = 5'h06;
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localparam CMD_ATTR_CHR = 5'h07;
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localparam CMD_PAL_SET = 5'h0A;
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localparam CMD_PAL_TRN = 5'h0B;
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localparam CMD_MLT_REQ = 5'h11;
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localparam CMD_CHR_TRN = 5'h13;
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localparam CMD_PCT_TRN = 5'h14;
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localparam CMD_ATTR_TRN = 5'h15;
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localparam CMD_ATTR_SET = 5'h16;
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localparam CMD_MASK_EN = 5'h17;
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wire p14 = joy_p54[0];
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wire p15 = joy_p54[1];
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reg old_p15, old_p14;
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reg [7:0] data;
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reg [3:0] byte_cnt;
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reg [2:0] cnt, packet_cnt;
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reg [2:0] length;
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reg byte_done, packet_end;
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reg [8:0] data_set_len, data_set_cnt;
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reg [2:0] data_set_byte_cnt;
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reg [4:0] cmd;
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reg [1:0] mlt_ctrl;
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reg trn_start, char_trn_tile, pal_set, attr_set;
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reg [1:0] pal0123_no, pal0123_col_no;
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reg [14:0] pal_color;
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reg pal0123_wr;
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reg [8:0] sys_pal_no[4];
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reg [5:0] attr_file_no;
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reg [1:0] mask_en;
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reg cancel_mask;
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reg [2:0] attr_blk_ctrl;
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reg [5:0] attr_blk_pal;
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reg [4:0] attr_blk_x1,attr_blk_x2,attr_blk_y1,attr_blk_y2;
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reg attr_blk_set;
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reg [7:0] attr_lin_data;
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reg attr_lin_set;
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reg [5:0] attr_div_pal;
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reg attr_div_hv;
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reg [4:0] attr_div_xy;
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reg attr_div_set;
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reg [7:0] attr_chr_data;
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reg [4:0] attr_chr_data_x;
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reg [8:0] attr_chr_data_offset, attr_chr_len;
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reg attr_chr_set, attr_chr_dir, attr_chr_start;
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always @(posedge clk_sys) begin
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if (reset) begin
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attr_file_no <= 0;
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packet_cnt <= 0;
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cnt <= 0;
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byte_cnt <= 0;
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byte_done <= 0;
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data_set_len <= 0;
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data_set_cnt <= 0;
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mask_en <= 0;
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packet_end <= 1'b1;
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mlt_ctrl <= 0;
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end else if (ce) begin
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old_p15 <= p15;
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old_p14 <= p14;
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if (sgb_en) begin
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// Reset pulse
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if (~p15 & ~p14) begin
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{cnt, byte_cnt, packet_end} <= 0;
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end
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if ( old_p15 & old_p14 & (p15 ^ p14) ) begin
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if (~packet_end) begin
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data <= {~p15,data[7:1]};
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cnt <= cnt + 1'b1;
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if (&cnt) byte_done <= 1'b1;
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end
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end
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// Corrupt packet. p15 and p14 should both go high after one is low.
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if ( (old_p15 ^ p15) & (old_p15 ^ old_p14) & (p15 ^ p14) ) begin
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packet_end <= 1'b1;
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end
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end
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trn_start <= 0;
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pal_set <= 0;
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attr_set <= 0;
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pal0123_wr <= 0;
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attr_blk_set <= 0;
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attr_lin_set <= 0;
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attr_div_set <= 0;
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attr_chr_set <= 0;
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if (pal_cancel_mask | attr_cancel_mask) mask_en <= 0;
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if (byte_done) begin
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byte_done <= 0;
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byte_cnt <= byte_cnt + 1'b1;
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if (!packet_cnt && !byte_cnt) {cmd,length} <= data;
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case (cmd)
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CMD_MLT_REQ: begin
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if (byte_cnt == 5'd1) mlt_ctrl <= data[1:0];
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end
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CMD_CHR_TRN: begin
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if (byte_cnt == 5'd1) begin
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trn_start <= 1'b1;
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char_trn_tile <= data[0];
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end
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end
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CMD_PCT_TRN,
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CMD_PAL_TRN,
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CMD_ATTR_TRN: begin
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if (byte_cnt == 5'd1) trn_start <= 1'b1;
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end
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CMD_PAL01,
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CMD_PAL23,
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CMD_PAL03,
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CMD_PAL12: begin
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if (byte_cnt >= 4'd1 && byte_cnt <= 4'd14) begin
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if (byte_cnt[0]) pal_color[7:0] <= data;
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else begin
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pal_color[14:8] <= data[6:0];
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pal0123_wr <= 1'b1;
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end
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end
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case (byte_cnt)
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1: pal0123_col_no <= 2'd0;
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3,9: pal0123_col_no <= 2'd1;
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5,11: pal0123_col_no <= 2'd2;
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7,13: pal0123_col_no <= 2'd3;
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endcase
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// color 0 always goes to palette 0
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case ({cmd,byte_cnt})
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{CMD_PAL01,4'd1},
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{CMD_PAL23,4'd1},
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{CMD_PAL03,4'd1},
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{CMD_PAL12,4'd1}: pal0123_no <= 2'd0;
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{CMD_PAL01,4'd9},
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{CMD_PAL12,4'd3}: pal0123_no <= 2'd1;
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{CMD_PAL12,4'd9},
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{CMD_PAL23,4'd3}: pal0123_no <= 2'd2;
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{CMD_PAL23,4'd9},
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{CMD_PAL03,4'd9}: pal0123_no <= 2'd3;
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endcase
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end
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CMD_PAL_SET:
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case (byte_cnt)
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1: sys_pal_no[0][7:0] <= data;
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2: sys_pal_no[0][8] <= data[0];
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3: sys_pal_no[1][7:0] <= data;
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4: sys_pal_no[1][8] <= data[0];
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5: sys_pal_no[2][7:0] <= data;
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6: sys_pal_no[2][8] <= data[0];
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7: sys_pal_no[3][7:0] <= data;
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8: sys_pal_no[3][8] <= data[0];
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9: begin
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attr_file_no <= data[5:0];
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cancel_mask <= data[6];
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if (data[7]) attr_set <= 1'b1;
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pal_set <= 1'b1;
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end
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endcase
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CMD_ATTR_SET: begin
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if (byte_cnt == 5'd1) begin
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attr_file_no <= data[5:0];
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cancel_mask <= data[6];
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attr_set <= 1'b1;
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end
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end
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CMD_ATTR_BLK: begin
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if (!packet_cnt && byte_cnt == 5'd1) begin
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data_set_len <= {4'd0,data[4:0]};
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data_set_cnt <= 0;
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data_set_byte_cnt <= 0;
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end
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if (|data_set_len && data_set_cnt < data_set_len) begin
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data_set_byte_cnt <= data_set_byte_cnt + 1'b1;
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case(data_set_byte_cnt)
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0: attr_blk_ctrl <= data[2:0];
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1: attr_blk_pal <= data[5:0];
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2: attr_blk_x1 <= data[4:0];
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3: attr_blk_y1 <= data[4:0];
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4: attr_blk_x2 <= data[4:0];
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5: begin
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attr_blk_y2 <= data[4:0];
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attr_blk_set <= 1'b1;
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data_set_byte_cnt <= 0;
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data_set_cnt <= data_set_cnt + 1'b1;
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if (data_set_cnt + 1'b1 == data_set_len) begin
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data_set_len <= 0;
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end
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end
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endcase
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end
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end
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CMD_ATTR_LIN: begin
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if (!packet_cnt && byte_cnt == 5'd1) begin
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data_set_len <= {2'd0,data[6:0]};
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data_set_cnt <= 0;
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end
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if (|data_set_len && data_set_cnt < data_set_len) begin
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attr_lin_data <= data;
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attr_lin_set <= 1'b1;
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data_set_cnt <= data_set_cnt + 1'b1;
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if (data_set_cnt + 1'b1 == data_set_len) begin
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data_set_len <= 0;
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end
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end
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end
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CMD_ATTR_DIV: begin
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case (byte_cnt)
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1: {attr_div_hv,attr_div_pal} <= data[6:0];
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2: begin
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attr_div_xy <= data[4:0];
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attr_div_set <= 1'b1;
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end
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endcase
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end
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CMD_ATTR_CHR: begin
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if (!packet_cnt) begin
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case (byte_cnt)
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1: attr_chr_data_x <= data[4:0];
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2: attr_chr_data_offset <= 5'd20 * data[4:0];
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3: attr_chr_len[7:0] <= data;
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4: attr_chr_len[8] <= data[0];
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5: begin
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attr_chr_dir <= data[0];
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data_set_len <= attr_chr_len;
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data_set_cnt <= 0;
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attr_chr_start <= 1'b1;
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end
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endcase
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end
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if (|data_set_len && data_set_cnt < data_set_len) begin
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attr_chr_data <= data;
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attr_chr_set <= 1'b1;
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if (|data_set_cnt) attr_chr_start <= 0;
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data_set_cnt <= data_set_cnt + 9'd4;
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if (data_set_cnt + 9'd4 >= data_set_len) begin
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data_set_len <= 0;
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end
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end
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end
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CMD_MASK_EN: begin
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if (byte_cnt == 5'd1) begin
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mask_en <= data[1:0];
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end
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end
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endcase
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// End of packet
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if (&byte_cnt) begin
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packet_cnt <= packet_cnt + 1'b1;
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if (packet_cnt + 1'b1 >= length) begin
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packet_cnt <= 0;
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packet_end <= 1'b1;
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data_set_len <= 0;
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end
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end
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end
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end
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end
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/*
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Lower 4 bits of FF00
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0Fh Joypad 1
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0Eh Joypad 2
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0Dh Joypad 3
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0Ch Joypad 4
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Setting P15 & P14 to high will decrement the joypad id if multiplayer
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is enabled with MLT_REQ.
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2 player: 0F,0E. 4 player: 0F,0E,0D,0C
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Normal Gameboy or Super Gameboy with multiplayer disabled will always return 0F.
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*/
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reg [1:0] joypad_id;
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reg joypad_id_out;
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reg joylock;
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always @(posedge clk_sys) begin
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if (reset) begin
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joylock <= 0;
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joypad_id_out <= 0;
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joypad_id <= 0;
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end else if (ce) begin
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if (sgb_en & ~joylock & (~old_p15 | ~old_p14) & p15 & p14) begin
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joylock <= 1'b1;
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joypad_id_out <= 1'b1;
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joypad_id <= (joypad_id - 1'b1) | ~mlt_ctrl;
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end
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if (old_p15 & ~p15 & p14) begin
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joylock <= ~joylock;
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end
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if (~p15 | ~p14) begin
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joypad_id_out <= 0;
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end
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end
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end
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assign joy_do = joypad_id_out ? {2'b11,joypad_id} : joy_data;
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wire [3:0] joy_dir = ~{ joystick[2], joystick[3], joystick[1], joystick[0] } | {4{p14}};
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wire [3:0] joy_buttons = ~{ joystick[7], joystick[6], joystick[5], joystick[4] } | {4{p15}};
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wire [3:0] joy_data = joy_dir & joy_buttons;
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wire [7:0] joystick =
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(~sgb_en | ~mlt_ctrl[0]) ? (joystick_0 | joystick_1) :
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(joypad_id == 2'b11) ? joystick_0 :
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(joypad_id == 2'b10) ? joystick_1 :
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(joypad_id == 2'b01) ? joystick_2 :
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joystick_3;
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wire lcd_off = !lcd_on || (lcd_mode == 2'd01);
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reg old_lcd_off;
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reg [7:0] tile_cnt;
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reg trn_en, trn_wait, frame_end;
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reg [7:0] pix_x, pix_y;
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reg [8:0] tile_offset;
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reg [6:0] trn_data_h, trn_data_l;
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reg output_border = 0;
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reg pct_trn_done, chr_trn_done;
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wire [8:0] tile_number = {tile_offset+pix_x[7:3]};
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wire [13:0] pixel_wr_addr = {tile_number[7:0], pix_y[2:0],pix_x[2:0]};
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// Convert 2x 2bpp tiles to 1x 4bpp tile for border output
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wire [13:0] tile_addr = {tile_number[7:1], pix_y[2:0],pix_x[2:0], tile_number[0]};
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wire [15:0] trn_data = {trn_data_h,lcd_data[1],trn_data_l,lcd_data[0]};
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always @(posedge clk_sys) begin
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if (reset) begin
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pct_trn_done <= 0;
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chr_trn_done <= 0;
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end else if (ce) begin
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frame_end <= 0;
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old_lcd_off <= lcd_off;
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if(~old_lcd_off & lcd_off) begin
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trn_en <= 0;
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pix_x <= 0;
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pix_y <= 0;
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tile_offset <= 0;
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frame_end <= 1'b1;
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end
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if(lcd_clkena & ~lcd_off) begin
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pix_x <= pix_x + 1'b1;
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if (pix_x == 8'd159) begin
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pix_x <= 0;
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pix_y <= pix_y + 1'b1;
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if(&pix_y[2:0]) tile_offset <= tile_offset + 9'd20;
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end
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if (trn_en) begin
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// HLHLHLHLHLHLHLHL -> HHHHHHHH LLLLLLLL
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trn_data_h <= {trn_data_h[5:0],lcd_data[1]};
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trn_data_l <= {trn_data_l[5:0],lcd_data[0]};
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end
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if (pix_x == 8'd159 && pix_y == 8'd103) begin // 256 tiles
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trn_en <= 0;
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if (trn_en) begin
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if (cmd == CMD_PCT_TRN) pct_trn_done <= 1'b1;
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if (cmd == CMD_CHR_TRN) chr_trn_done <= 1'b1;
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end
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end
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end
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// Wait until start of frame
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if (trn_start) trn_wait <= 1'b1;
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if (old_lcd_off & ~lcd_off) begin
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trn_wait <= 0;
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if (trn_wait) begin
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trn_en <= 1'b1;
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if (cmd == CMD_CHR_TRN || cmd == CMD_PCT_TRN) output_border <= 0;
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end
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end
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if (pct_trn_done & chr_trn_done & !mask_en) begin
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pct_trn_done <= 0;
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chr_trn_done <= 0;
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output_border <= 1'b1;
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end
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end
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end
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(* ramstyle="no_rw_check" *) reg [15:0] tile_map_ram[32*28];
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(* ramstyle="no_rw_check" *) reg [14:0] tile_pal_ram[4*16];
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(* ramstyle="no_rw_check" *) reg [14:0] sys_pal_ram[512*4];
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(* ramstyle="no_rw_check" *) reg [15:0] attr_files_ram[45*45];
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wire trn_data_wr = (lcd_clkena && trn_en && &pix_x[2:0] && !tile_number[8]);
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always @(posedge clk_sys) begin
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if (ce) begin
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if (trn_data_wr) begin
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// PCT_TRN Tile 0-111
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if (cmd == CMD_PCT_TRN && pixel_wr_addr[13:6] < 8'd112) begin
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tile_map_ram[pixel_wr_addr[12:3]] <= trn_data;
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end
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// PCT_TRN Tile 128-135
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if (cmd == CMD_PCT_TRN && pixel_wr_addr[13:9] == 6'b10000) begin
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tile_pal_ram[pixel_wr_addr[8:3]] <= trn_data[14:0];
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end
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if (cmd == CMD_PAL_TRN) begin
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sys_pal_ram[pixel_wr_addr[13:3]] <= trn_data[14:0];
|
|
end
|
|
|
|
if (cmd == CMD_ATTR_TRN && pixel_wr_addr[13:3] < 11'd2025) begin
|
|
attr_files_ram[pixel_wr_addr[13:3]] <= {trn_data[7:0],trn_data[15:8]};
|
|
end
|
|
end
|
|
|
|
end
|
|
|
|
end
|
|
|
|
dpram_dif #(15,2, 14,4) tile_ram (
|
|
.clock ( clk_vid ),
|
|
|
|
.address_a ( {char_trn_tile,tile_addr} ),
|
|
.wren_a ( lcd_clkena && trn_en && cmd == CMD_CHR_TRN && !tile_number[8] ),
|
|
.data_a ( lcd_data ),
|
|
.q_a (),
|
|
|
|
.address_b (tile_rd_addr),
|
|
.wren_b (1'b0),
|
|
.data_b (),
|
|
.q_b (tile_data)
|
|
);
|
|
|
|
reg [14:0] sys_pal_data, pal_wr_data;
|
|
reg [1:0] pal_wr_no, pal_wr_col_no;
|
|
reg [0:59] palette[4];
|
|
reg pal_set_wait, pal_set_busy, pal_wr, pal_cancel_mask, pal_clear;
|
|
reg [3:0] pal_set_cnt, pal_set_cnt_r;
|
|
reg [10:0] sys_pal_ram_addr;
|
|
reg output_sgb_pal;
|
|
|
|
always @(posedge clk_sys) begin
|
|
if (reset) begin
|
|
output_sgb_pal <= 0;
|
|
pal_set_busy <= 0;
|
|
pal_set_wait <= 0;
|
|
pal_clear <= 1'b1;
|
|
pal_set_cnt <= 0;
|
|
end else if (ce) begin
|
|
|
|
pal_cancel_mask <= 0;
|
|
pal_wr <= 0;
|
|
|
|
// PAL_SET
|
|
if (pal_set) pal_set_wait <= 1'b1;
|
|
|
|
if (pal_set_wait & frame_end) begin
|
|
pal_set_wait <= 0;
|
|
pal_set_busy <= 1'b1;
|
|
pal_set_cnt <= 0;
|
|
pal_set_cnt_r <= 0;
|
|
end
|
|
|
|
sys_pal_data <= sys_pal_ram[{sys_pal_no[pal_set_cnt[3:2]], pal_set_cnt[1:0]}];
|
|
|
|
if (pal_set_busy) begin
|
|
|
|
pal_set_cnt <= pal_set_cnt + 1'b1;
|
|
pal_set_cnt_r <= pal_set_cnt;
|
|
|
|
if (&pal_set_cnt_r) begin
|
|
pal_set_busy <= 0;
|
|
output_sgb_pal <= 1'b1;
|
|
if (cancel_mask) pal_cancel_mask <= 1'b1;
|
|
end
|
|
|
|
pal_wr <= 1'b1;
|
|
pal_wr_data <= sys_pal_data;
|
|
{pal_wr_no, pal_wr_col_no} <= pal_set_cnt_r;
|
|
|
|
end
|
|
|
|
// PAL01,PAL23,PAL03,PAL12
|
|
if (pal0123_wr) begin
|
|
output_sgb_pal <= 1'b1;
|
|
|
|
pal_wr <= 1'b1;
|
|
pal_wr_data <= pal_color;
|
|
pal_wr_no <= pal0123_no;
|
|
pal_wr_col_no <= pal0123_col_no;
|
|
end
|
|
|
|
if (pal_clear) begin
|
|
pal_set_cnt <= pal_set_cnt + 1'b1;
|
|
|
|
pal_wr <= 1'b1;
|
|
pal_wr_data <= 0;
|
|
{pal_wr_no, pal_wr_col_no} <= pal_set_cnt;
|
|
|
|
if (&pal_set_cnt) pal_clear <= 0;
|
|
end
|
|
|
|
if (pal_wr) begin
|
|
palette[pal_wr_no][pal_wr_col_no*15 +: 15] <= pal_wr_data;
|
|
end
|
|
|
|
end
|
|
|
|
end
|
|
|
|
reg [15:0] attr_file_data;
|
|
reg [0:719] attr_file;
|
|
|
|
reg attr_set_busy, attr_blk_busy, attr_lin_busy, attr_div_busy, attr_chr_busy;
|
|
reg [8:0] attr_set_cnt, attr_set_cnt_r;
|
|
reg [10:0] attr_file_ram_addr;
|
|
reg [5:0] attr_file_idx;
|
|
reg attr_cancel_mask;
|
|
|
|
reg [8:0] attr_tile_no, attr_tile_no_wr;
|
|
reg [4:0] attr_tile_cnt_x, attr_tile_cnt_y;
|
|
reg [1:0] attr_file_pal_wr;
|
|
reg attr_file_wr;
|
|
|
|
reg [8:0] attr_chr_pal_cnt;
|
|
reg [4:0] attr_chr_x;
|
|
reg [8:0] attr_chr_offset;
|
|
|
|
reg attr_clear;
|
|
always @(posedge clk_sys) begin
|
|
if (reset) begin
|
|
attr_set_busy <= 0;
|
|
attr_blk_busy <= 0;
|
|
attr_lin_busy <= 0;
|
|
attr_div_busy <= 0;
|
|
attr_chr_busy <= 0;
|
|
attr_clear <= 1'b1;
|
|
attr_set_cnt <= 0;
|
|
end else if (ce) begin
|
|
|
|
attr_cancel_mask <= 0;
|
|
attr_file_wr <= 0;
|
|
|
|
// ATTR_SET
|
|
if (attr_set) begin
|
|
attr_set_busy <= 1'b1;
|
|
attr_set_cnt <= 0;
|
|
attr_file_ram_addr <= 0;
|
|
attr_file_idx <= 0;
|
|
end
|
|
|
|
attr_file_data <= attr_files_ram[attr_file_ram_addr];
|
|
|
|
if (attr_set_busy) begin
|
|
|
|
if (attr_file_idx != attr_file_no) begin
|
|
attr_file_idx <= attr_file_idx + 1'b1;
|
|
attr_file_ram_addr <= attr_file_ram_addr + 11'd45;
|
|
end else begin
|
|
attr_set_cnt <= attr_set_cnt + 1'b1;
|
|
attr_set_cnt_r <= attr_set_cnt;
|
|
|
|
if (&attr_set_cnt[2:0]) attr_file_ram_addr <= attr_file_ram_addr + 1'b1;
|
|
|
|
attr_file_pal_wr <= attr_file_data[~attr_set_cnt_r[2:0]*2 +: 2];
|
|
attr_tile_no_wr <= attr_set_cnt_r;
|
|
attr_file_wr <= 1'b1;
|
|
end
|
|
|
|
if (attr_file_idx == 6'd45 || attr_set_cnt_r == 9'd359) begin
|
|
attr_set_busy <= 0;
|
|
if (cancel_mask) attr_cancel_mask <= 1'b1;
|
|
end
|
|
|
|
end
|
|
|
|
if (attr_blk_set) attr_blk_busy <= 1'b1;
|
|
if (attr_lin_set) attr_lin_busy <= 1'b1;
|
|
if (attr_div_set) attr_div_busy <= 1'b1;
|
|
|
|
if (attr_blk_set | attr_lin_set | attr_div_set) begin
|
|
attr_tile_no <= 0;
|
|
attr_tile_cnt_x <= 0;
|
|
attr_tile_cnt_y <= 0;
|
|
end
|
|
|
|
if (attr_blk_busy | attr_lin_busy | attr_div_busy) begin
|
|
attr_tile_no <= attr_tile_no + 1'b1;
|
|
attr_tile_cnt_x <= attr_tile_cnt_x + 1'b1;
|
|
attr_tile_no_wr <= attr_tile_no;
|
|
|
|
if(attr_tile_cnt_x == 5'd19) begin
|
|
attr_tile_cnt_x <= 0;
|
|
attr_tile_cnt_y <= attr_tile_cnt_y + 1'b1;
|
|
if (attr_tile_cnt_y == 5'd17) begin
|
|
attr_blk_busy <= 0;
|
|
attr_lin_busy <= 0;
|
|
attr_div_busy <= 0;
|
|
end
|
|
end
|
|
end
|
|
|
|
// ATTR_BLK
|
|
if (attr_blk_busy) begin
|
|
if (attr_tile_cnt_x > attr_blk_x1 && attr_tile_cnt_x < attr_blk_x2
|
|
&& attr_tile_cnt_y > attr_blk_y1 && attr_tile_cnt_y < attr_blk_y2) begin
|
|
// inside
|
|
if (attr_blk_ctrl[0]) begin
|
|
attr_file_pal_wr <= attr_blk_pal[1:0];
|
|
attr_file_wr <= 1'b1;
|
|
end
|
|
end else if (attr_tile_cnt_x < attr_blk_x1 || attr_tile_cnt_x > attr_blk_x2
|
|
|| attr_tile_cnt_y < attr_blk_y1 || attr_tile_cnt_y > attr_blk_y2) begin
|
|
// outside
|
|
if (attr_blk_ctrl[2]) begin
|
|
attr_file_pal_wr <= attr_blk_pal[5:4];
|
|
attr_file_wr <= 1'b1;
|
|
end
|
|
end else begin
|
|
// on border
|
|
// "Exception: When changing only the Inside or Outside, then the
|
|
// Surrounding line becomes automatically changed to same color."
|
|
casez (attr_blk_ctrl)
|
|
3'b001: begin
|
|
attr_file_pal_wr <= attr_blk_pal[1:0];
|
|
attr_file_wr <= 1'b1;
|
|
end
|
|
3'b100: begin
|
|
attr_file_pal_wr <= attr_blk_pal[5:4];
|
|
attr_file_wr <= 1'b1;
|
|
end
|
|
3'b?1?: begin
|
|
attr_file_pal_wr <= attr_blk_pal[3:2];
|
|
attr_file_wr <= 1'b1;
|
|
end
|
|
endcase
|
|
end
|
|
end
|
|
|
|
// ATTR_LIN
|
|
if (attr_lin_busy) begin
|
|
if ( (attr_lin_data[7] && attr_tile_cnt_y == attr_lin_data[4:0])
|
|
|| (~attr_lin_data[7] && attr_tile_cnt_x == attr_lin_data[4:0]) ) begin
|
|
attr_file_wr <= 1'b1;
|
|
attr_file_pal_wr <= attr_lin_data[6:5];
|
|
end
|
|
end
|
|
|
|
// ATTR_DIV
|
|
if (attr_div_busy) begin
|
|
if ( (~attr_div_hv && attr_tile_cnt_x > attr_div_xy) || (attr_div_hv && attr_tile_cnt_y > attr_div_xy) ) begin
|
|
// below/right
|
|
attr_file_pal_wr <= attr_div_pal[1:0];
|
|
end else if ( (~attr_div_hv && attr_tile_cnt_x < attr_div_xy) || (attr_div_hv && attr_tile_cnt_y < attr_div_xy) ) begin
|
|
// above/left
|
|
attr_file_pal_wr <= attr_div_pal[3:2];
|
|
end else begin
|
|
// on divider line
|
|
attr_file_pal_wr <= attr_div_pal[5:4];
|
|
end
|
|
attr_file_wr <= 1'b1;
|
|
end
|
|
|
|
// ATTR_CHR
|
|
if (attr_chr_set) begin
|
|
attr_chr_busy <= 1'b1;
|
|
if (attr_chr_start) begin
|
|
attr_chr_pal_cnt <= 0;
|
|
attr_chr_x <= attr_chr_data_x;
|
|
attr_chr_offset <= attr_chr_data_offset;
|
|
end
|
|
end
|
|
|
|
if (attr_chr_busy) begin
|
|
attr_chr_pal_cnt <= attr_chr_pal_cnt + 1'b1;
|
|
if (&attr_chr_pal_cnt[1:0] || attr_chr_pal_cnt+1'b1 == attr_chr_len) attr_chr_busy <= 0;
|
|
|
|
if (attr_chr_dir) begin
|
|
attr_chr_offset <= attr_chr_offset + 9'd20;
|
|
if(attr_chr_offset == 9'd340) begin
|
|
attr_chr_offset <= 0;
|
|
attr_chr_x <= attr_chr_x + 1'b1;
|
|
if (attr_chr_x == 5'd19) attr_chr_x <= 0;
|
|
end
|
|
end
|
|
|
|
if (~attr_chr_dir) begin
|
|
attr_chr_x <= attr_chr_x + 1'b1;
|
|
if (attr_chr_x == 5'd19) begin
|
|
attr_chr_x <= 0;
|
|
attr_chr_offset <= attr_chr_offset + 9'd20;
|
|
if (attr_chr_offset == 9'd340) attr_chr_offset <= 0;
|
|
end
|
|
end
|
|
|
|
attr_tile_no_wr <= attr_chr_offset + attr_chr_x;
|
|
case (attr_chr_pal_cnt[1:0])
|
|
0: attr_file_pal_wr <= attr_chr_data[7:6];
|
|
1: attr_file_pal_wr <= attr_chr_data[5:4];
|
|
2: attr_file_pal_wr <= attr_chr_data[3:2];
|
|
3: attr_file_pal_wr <= attr_chr_data[1:0];
|
|
endcase
|
|
attr_file_wr <= 1'b1;
|
|
|
|
end
|
|
|
|
if (attr_clear) begin
|
|
attr_set_cnt <= attr_set_cnt + 1'b1;
|
|
|
|
attr_file_pal_wr <= 0;
|
|
attr_tile_no_wr <= attr_set_cnt;
|
|
attr_file_wr <= 1'b1;
|
|
|
|
if (attr_set_cnt == 9'd359) attr_clear <= 0;
|
|
end
|
|
|
|
if (attr_file_wr) begin
|
|
attr_file[attr_tile_no_wr*2 +: 2] <= attr_file_pal_wr;
|
|
end
|
|
|
|
end
|
|
end
|
|
|
|
reg [15:0] bg_map_data;
|
|
reg [1:0] bg_pal_no;
|
|
reg [13:0] tile_rd_addr;
|
|
reg [3:0] tile_data;
|
|
reg [14:0] pal_data;
|
|
reg pix_visible;
|
|
|
|
wire [8:0] bg_vcnt = v_cnt >= 9'd65 ? (v_cnt-9'd65) : (v_cnt+9'd264-9'd65);
|
|
|
|
reg [8:0] h_cnt_r, v_cnt_r;
|
|
// border output
|
|
always @(posedge clk_vid) begin
|
|
if (ce_pix) begin
|
|
|
|
bg_map_data <= tile_map_ram[{bg_vcnt[7:3],h_cnt[7:3]}];
|
|
h_cnt_r <= h_cnt;
|
|
v_cnt_r <= bg_vcnt;
|
|
|
|
bg_pal_no <= bg_map_data[11:10];
|
|
tile_rd_addr <= {bg_map_data[7:0],bg_map_data[15] ? ~v_cnt_r[2:0] : v_cnt_r[2:0],bg_map_data[14] ? ~h_cnt_r[2:0] : h_cnt_r[2:0]};
|
|
|
|
pix_visible <= |tile_data;
|
|
pal_data <= |tile_data ? tile_pal_ram[{bg_pal_no, tile_data}] : palette[0][0:14];
|
|
|
|
sgb_border_pix <= output_border ? {pix_visible, pal_data} : 16'd0;
|
|
|
|
end
|
|
|
|
end
|
|
|
|
|
|
reg [14:0] lcd_data_r;
|
|
reg [1:0] pal_no;
|
|
reg lcd_clkena_r, lcd_on_r;
|
|
reg [1:0] lcd_mode_r;
|
|
reg [1:0] mask_en_r;
|
|
wire [1:0] lcd_data_2 = lcd_data_r[1:0];
|
|
// Lcd pixel output
|
|
always @(posedge clk_sys) begin
|
|
if (ce) begin
|
|
|
|
if (lcd_off) mask_en_r <= mask_en;
|
|
|
|
pal_no <= attr_file[tile_number*2 +: 2];
|
|
lcd_data_r <= lcd_data;
|
|
lcd_clkena_r <= lcd_clkena;
|
|
lcd_mode_r <= lcd_mode;
|
|
lcd_on_r <= lcd_on;
|
|
|
|
if (~sgb_en | ((~output_sgb_pal | tint) & !mask_en_r) ) begin
|
|
sgb_lcd_data <= lcd_data_r;
|
|
end else if (mask_en_r == 2'd2) begin
|
|
sgb_lcd_data <= 0;
|
|
end else if (!lcd_data_2 || mask_en_r == 2'd3) begin
|
|
sgb_lcd_data <= palette[0][0:14];
|
|
end else begin
|
|
sgb_lcd_data <= palette[pal_no][lcd_data_2*15 +:15];
|
|
end
|
|
|
|
sgb_lcd_clkena <= (~sgb_en || mask_en_r != 2'd1) ? lcd_clkena_r : 1'b0;
|
|
sgb_lcd_mode <= lcd_mode_r;
|
|
sgb_lcd_on <= lcd_on_r;
|
|
sgb_pal_en <= sgb_en & ( (output_sgb_pal & ~tint) || |mask_en_r);
|
|
end
|
|
|
|
end
|
|
|
|
endmodule |