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12 lines
440 B
Tcl
12 lines
440 B
Tcl
derive_pll_clocks
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derive_clock_uncertainty
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set clk_ram {*|pll|pll_inst|altera_pll_i|*[0].*|divclk}
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set clk_sys {*|pll|pll_inst|altera_pll_i|*[1].*|divclk}
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set_multicycle_path -from [get_clocks $clk_ram] -to [get_clocks $clk_sys] -start -setup 2
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set_multicycle_path -from [get_clocks $clk_ram] -to [get_clocks $clk_sys] -start -hold 1
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set_multicycle_path -from {emu|gb|video|*} -setup 2
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set_multicycle_path -from {emu|gb|video|*} -hold 1
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