mirror of
https://github.com/MiSTer-devel/Gameboy_MiSTer.git
synced 2026-04-19 03:04:09 +00:00
e387e70ef2
RTC fixes Implement KEY0 and OPRI registers HDMA fixes Megaduck audio fixes Bootrom updates (GBA/Fastboot)
645 lines
16 KiB
Verilog
645 lines
16 KiB
Verilog
module mappers(
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input reset,
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input clk_sys,
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input ce_cpu,
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input ce_cpu2x,
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input speed,
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input mbc1,
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input mbc1m,
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input mbc2,
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input mbc3,
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input mbc30,
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input mbc5,
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input mbc6,
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input mbc7,
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input mmm01,
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input huc1,
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input huc3,
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input gb_camera,
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input tama,
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input rocket,
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input sachen,
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input wisdom_tree,
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input mani161,
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input megaduck,
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input isGBC_game,
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input [15:0] joystick_analog_0,
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input ce_32k,
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input [32:0] RTC_time,
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output [31:0] RTC_timestampOut,
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output [47:0] RTC_savedtimeOut,
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output RTC_inuse,
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input bk_wr,
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input bk_rtc_wr,
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input [16:0] bk_addr,
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input [15:0] bk_data,
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input [63:0] img_size,
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input savestate_load,
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input [15:0] savestate_data,
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output [15:0] savestate_back,
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input [63:0] savestate_data2,
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output [63:0] savestate_back2,
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input has_ram,
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input [3:0] ram_mask,
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input [8:0] rom_mask,
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input [14:0] cart_addr,
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input cart_a15,
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input [7:0] cart_mbc_type,
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input cart_rd,
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input cart_wr,
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input [7:0] cart_di,
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output cart_oe,
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input [7:0] rom_di,
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output [7:0] rom_do,
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input nCS,
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input cram_rd,
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input [7:0] cram_di, // input from Cart RAM q
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output [7:0] cram_do, // output to CPU
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output [16:0] cram_addr,
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output [7:0] cram_wr_do, // For writing to Cart RAM directly without CPU (MBC7 EEPROM)
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output cram_wr,
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output [22:0] mbc_addr,
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output ram_enabled,
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output has_battery,
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output rumbling
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);
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tri1 [7:0] cram_do_b;
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tri1 [7:0] rom_do_b;
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tri0 [22:0] mbc_addr_b;
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tri0 [16:0] cram_addr_b;
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tri0 ram_enabled_b, has_battery_b;
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tri0 [15:0] savestate_back_b;
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tri0 [63:0] savestate_back2_b;
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tri0 [7:0] cram_wr_do_b;
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tri0 cram_wr_b;
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tri0 cart_oe_b;
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tri0 [31:0] RTC_timestampOut_b;
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tri0 [47:0] RTC_savedtimeOut_b;
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tri0 RTC_inuse_b;
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wire ce = speed ? ce_cpu2x : ce_cpu;
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wire no_mapper = ~(mbc1 | mbc2 | mbc3 | mbc5 | mbc6 | mbc7 | mmm01 | huc1 | huc3 | gb_camera | tama | rocket | sachen | wisdom_tree | mani161 | megaduck);
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wire no_mapper_single_bank = no_mapper & ~rom_mask[1];
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wire no_mapper_multi_bank = no_mapper & rom_mask[1]; // size > 32KB
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wire rom_override = (rocket);
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wire cart_oe_override = (mbc3 | mbc7 | huc1 | huc3 | gb_camera | tama);
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mbc1 map_mbc1 (
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.enable ( mbc1 | no_mapper_multi_bank ),
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.mbc1m ( mbc1m ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data ),
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.savestate_back_b ( savestate_back_b ),
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.has_ram ( has_ram ),
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.ram_mask ( ram_mask ),
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.rom_mask ( rom_mask ),
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.cart_addr ( cart_addr ),
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.cart_a15 ( cart_a15 ),
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.cart_mbc_type ( cart_mbc_type ),
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.cart_wr ( cart_wr ),
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.cart_di ( cart_di ),
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.cram_di ( cram_di ),
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.cram_do_b ( cram_do_b ),
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.cram_addr_b ( cram_addr_b ),
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.mbc_addr_b ( mbc_addr_b ),
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.ram_enabled_b ( ram_enabled_b ),
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.has_battery_b ( has_battery_b )
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);
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mbc2 map_mbc2 (
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.enable ( mbc2 ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data ),
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.savestate_back_b ( savestate_back_b ),
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.ram_mask ( ram_mask ),
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.rom_mask ( rom_mask ),
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.cart_addr ( cart_addr ),
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.cart_a15 ( cart_a15 ),
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.cart_mbc_type ( cart_mbc_type ),
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.cart_wr ( cart_wr ),
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.cart_di ( cart_di ),
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.cram_di ( cram_di ),
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.cram_do_b ( cram_do_b ),
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.cram_addr_b ( cram_addr_b ),
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.mbc_addr_b ( mbc_addr_b ),
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.ram_enabled_b ( ram_enabled_b ),
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.has_battery_b ( has_battery_b )
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);
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mbc3 map_mbc3 (
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.enable ( mbc3 ),
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.reset ( reset ),
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.mbc30 ( mbc30 ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data ),
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.savestate_back_b ( savestate_back_b ),
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.ce_32k ( ce_32k ),
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.RTC_time ( RTC_time ),
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.RTC_timestampOut_b( RTC_timestampOut_b ),
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.RTC_savedtimeOut_b( RTC_savedtimeOut_b ),
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.RTC_inuse_b ( RTC_inuse_b ),
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.bk_wr ( bk_wr ),
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.bk_rtc_wr ( bk_rtc_wr ),
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.bk_addr ( bk_addr ),
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.bk_data ( bk_data ),
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.img_size ( img_size ),
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.has_ram ( has_ram ),
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.ram_mask ( ram_mask ),
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.rom_mask ( rom_mask ),
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.cart_addr ( cart_addr ),
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.cart_a15 ( cart_a15 ),
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.cart_mbc_type ( cart_mbc_type ),
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.cart_rd ( cart_rd ),
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.cart_wr ( cart_wr ),
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.cart_di ( cart_di ),
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.cart_oe_b ( cart_oe_b ),
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.nCS ( nCS ),
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.cram_di ( cram_di ),
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.cram_do_b ( cram_do_b ),
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.cram_addr_b ( cram_addr_b ),
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.mbc_addr_b ( mbc_addr_b ),
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.ram_enabled_b ( ram_enabled_b ),
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.has_battery_b ( has_battery_b )
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);
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mbc5 map_mbc5 (
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.enable ( mbc5 ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data ),
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.savestate_back_b ( savestate_back_b ),
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.has_ram ( has_ram ),
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.ram_mask ( ram_mask ),
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.rom_mask ( rom_mask ),
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.cart_addr ( cart_addr ),
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.cart_a15 ( cart_a15 ),
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.cart_mbc_type ( cart_mbc_type ),
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.cart_wr ( cart_wr ),
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.cart_di ( cart_di ),
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.cram_di ( cram_di ),
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.cram_do_b ( cram_do_b ),
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.cram_addr_b ( cram_addr_b ),
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.mbc_addr_b ( mbc_addr_b ),
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.ram_enabled_b ( ram_enabled_b ),
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.has_battery_b ( has_battery_b ),
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.rumbling ( rumbling )
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);
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mbc6 map_mbc6 (
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.enable ( mbc6 ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data2 ),
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.savestate_back_b ( savestate_back2_b ),
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.has_ram ( has_ram ),
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.ram_mask ( ram_mask ),
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.rom_mask ( rom_mask ),
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.cart_addr ( cart_addr ),
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.cart_a15 ( cart_a15 ),
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.cart_mbc_type ( cart_mbc_type ),
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.cart_wr ( cart_wr ),
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.cart_di ( cart_di ),
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.cram_di ( cram_di ),
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.cram_do_b ( cram_do_b ),
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.cram_addr_b ( cram_addr_b ),
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.mbc_addr_b ( mbc_addr_b ),
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.ram_enabled_b ( ram_enabled_b ),
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.has_battery_b ( has_battery_b )
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);
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mbc7 map_mbc7 (
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.enable ( mbc7 ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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.ce_1x ( ce_cpu ),
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data ),
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.savestate_back_b ( savestate_back_b ),
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.savestate_data2 ( savestate_data2 ),
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.savestate_back2_b( savestate_back2_b ),
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.joystick_analog_x ( joystick_analog_0[7:0] ),
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.joystick_analog_y ( joystick_analog_0[15:8] ),
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.has_ram ( has_ram ),
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.ram_mask ( ram_mask ),
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.rom_mask ( rom_mask ),
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.cart_addr ( cart_addr ),
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.cart_a15 ( cart_a15 ),
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.cart_mbc_type ( cart_mbc_type ),
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.cart_rd ( cart_rd ),
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.cart_wr ( cart_wr ),
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.cart_di ( cart_di ),
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.cart_oe_b ( cart_oe_b ),
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.nCS ( nCS ),
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.cram_di ( cram_di ),
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.cram_do_b ( cram_do_b ),
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.cram_addr_b ( cram_addr_b ),
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.cram_wr_do_b ( cram_wr_do_b ),
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.cram_wr_b ( cram_wr_b ),
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.mbc_addr_b ( mbc_addr_b ),
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.ram_enabled_b ( ram_enabled_b ),
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.has_battery_b ( has_battery_b )
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);
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mmm01 map_mmm01 (
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.enable ( mmm01 ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data2 ),
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.savestate_back_b ( savestate_back2_b ),
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.has_ram ( has_ram ),
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.ram_mask ( ram_mask ),
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.rom_mask ( rom_mask ),
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.cart_addr ( cart_addr ),
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.cart_a15 ( cart_a15 ),
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.cart_mbc_type ( cart_mbc_type ),
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.cart_wr ( cart_wr ),
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.cart_di ( cart_di ),
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.cram_di ( cram_di ),
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.cram_do_b ( cram_do_b ),
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.cram_addr_b ( cram_addr_b ),
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.mbc_addr_b ( mbc_addr_b ),
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.ram_enabled_b ( ram_enabled_b ),
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.has_battery_b ( has_battery_b )
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);
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huc1 map_huc1 (
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.enable ( huc1 ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data ),
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.savestate_back_b ( savestate_back_b ),
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.has_ram ( has_ram ),
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.ram_mask ( ram_mask ),
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.rom_mask ( rom_mask ),
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.cart_addr ( cart_addr ),
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.cart_a15 ( cart_a15 ),
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.cart_mbc_type ( cart_mbc_type ),
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.cart_rd ( cart_rd ),
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.cart_wr ( cart_wr ),
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.cart_di ( cart_di ),
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.cart_oe_b ( cart_oe_b ),
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.cram_rd ( cram_rd ),
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.cram_di ( cram_di ),
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.cram_do_b ( cram_do_b ),
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.cram_addr_b ( cram_addr_b ),
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.mbc_addr_b ( mbc_addr_b ),
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.ram_enabled_b ( ram_enabled_b ),
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.has_battery_b ( has_battery_b )
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);
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huc3 map_huc3 (
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.enable ( huc3 ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data2 ),
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.savestate_back_b ( savestate_back2_b ),
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.ce_32k ( ce_32k ),
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.RTC_time ( RTC_time ),
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.RTC_timestampOut_b( RTC_timestampOut_b ),
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.RTC_savedtimeOut_b( RTC_savedtimeOut_b ),
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.RTC_inuse_b ( RTC_inuse_b ),
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.bk_rtc_wr ( bk_rtc_wr ),
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.bk_addr ( bk_addr ),
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.bk_data ( bk_data ),
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.has_ram ( has_ram ),
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.ram_mask ( ram_mask ),
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.rom_mask ( rom_mask ),
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.cart_addr ( cart_addr ),
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.cart_a15 ( cart_a15 ),
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.cart_mbc_type ( cart_mbc_type ),
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.cart_rd ( cart_rd ),
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.cart_wr ( cart_wr ),
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.cart_di ( cart_di ),
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.cart_oe_b ( cart_oe_b ),
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.nCS ( nCS ),
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.cram_di ( cram_di ),
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.cram_do_b ( cram_do_b ),
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.cram_addr_b ( cram_addr_b ),
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.mbc_addr_b ( mbc_addr_b ),
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.ram_enabled_b ( ram_enabled_b ),
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.has_battery_b ( has_battery_b )
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);
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gb_camera map_gb_camera (
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.enable ( gb_camera ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data ),
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.savestate_back_b ( savestate_back_b ),
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.ram_mask ( ram_mask ),
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.rom_mask ( rom_mask ),
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.cart_addr ( cart_addr ),
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.cart_a15 ( cart_a15 ),
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.cart_mbc_type ( cart_mbc_type ),
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.cart_rd ( cart_rd ),
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.cart_wr ( cart_wr ),
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.cart_di ( cart_di ),
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.cart_oe_b ( cart_oe_b ),
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.cram_rd ( cram_rd ),
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.cram_di ( cram_di ),
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.cram_do_b ( cram_do_b ),
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.cram_addr_b ( cram_addr_b ),
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.mbc_addr_b ( mbc_addr_b ),
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.ram_enabled_b ( ram_enabled_b ),
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.has_battery_b ( has_battery_b )
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);
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// TODO: TAMA RTC
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tama map_tama (
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.enable ( tama ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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.ce_32k ( ce_32k ),
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data2 ),
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.savestate_back_b ( savestate_back2_b ),
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.has_ram ( has_ram ),
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.ram_mask ( ram_mask ),
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.rom_mask ( rom_mask ),
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.cart_addr ( cart_addr ),
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.cart_a15 ( cart_a15 ),
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.cart_mbc_type ( cart_mbc_type ),
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.cart_rd ( cart_rd ),
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.cart_wr ( cart_wr ),
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.cart_di ( cart_di ),
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.cart_oe_b ( cart_oe_b ),
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.nCS ( nCS ),
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.cram_rd ( cram_rd ),
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.cram_di ( cram_di ),
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.cram_do_b ( cram_do_b ),
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.cram_addr_b ( cram_addr_b ),
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.cram_wr_do_b ( cram_wr_do_b ),
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.cram_wr_b ( cram_wr_b ),
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.mbc_addr_b ( mbc_addr_b ),
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.ram_enabled_b ( ram_enabled_b ),
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.has_battery_b ( has_battery_b )
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);
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rocket map_rocket (
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.enable ( rocket ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data ),
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.savestate_back_b ( savestate_back_b ),
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.has_ram ( has_ram ),
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.ram_mask ( ram_mask ),
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.rom_mask ( rom_mask ),
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.cart_addr ( cart_addr ),
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.cart_a15 ( cart_a15 ),
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.cart_mbc_type ( cart_mbc_type ),
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.cart_wr ( cart_wr ),
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.cart_di ( cart_di ),
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.rom_di ( rom_di ),
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.rom_do_b ( rom_do_b ),
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.cram_di ( cram_di ),
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.cram_do_b ( cram_do_b ),
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.cram_addr_b ( cram_addr_b ),
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.mbc_addr_b ( mbc_addr_b ),
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.ram_enabled_b ( ram_enabled_b ),
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.has_battery_b ( has_battery_b )
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);
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sachen map_sachen (
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.enable ( sachen ),
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.clk_sys ( clk_sys ),
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.ce_cpu ( ce ),
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|
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|
.isGBC_game ( isGBC_game ),
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|
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.savestate_load ( savestate_load ),
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.savestate_data ( savestate_data2 ),
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.savestate_back_b ( savestate_back2_b ),
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|
|
|
.cart_addr ( cart_addr ),
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|
.cart_a15 ( cart_a15 ),
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|
|
|
.cart_wr ( cart_wr ),
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|
.cart_di ( cart_di ),
|
|
|
|
.nCS ( nCS ),
|
|
|
|
.cram_di ( cram_di ),
|
|
.cram_do_b ( cram_do_b ),
|
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.cram_addr_b ( cram_addr_b ),
|
|
|
|
.mbc_addr_b ( mbc_addr_b ),
|
|
.ram_enabled_b ( ram_enabled_b ),
|
|
.has_battery_b ( has_battery_b )
|
|
);
|
|
|
|
megaduck map_megaduck (
|
|
.enable ( megaduck ),
|
|
|
|
.clk_sys ( clk_sys ),
|
|
.ce_cpu ( ce ),
|
|
|
|
.savestate_load ( savestate_load ),
|
|
.savestate_data ( savestate_data ),
|
|
.savestate_back_b ( savestate_back_b ),
|
|
|
|
.has_ram ( has_ram ),
|
|
.ram_mask ( ram_mask ),
|
|
.rom_mask ( rom_mask ),
|
|
|
|
.cart_addr ( cart_addr ),
|
|
.cart_a15 ( cart_a15 ),
|
|
|
|
.cart_mbc_type ( cart_mbc_type ),
|
|
|
|
.cart_wr ( cart_wr ),
|
|
.cart_di ( cart_di ),
|
|
|
|
.cram_di ( cram_di ),
|
|
.cram_do_b ( cram_do_b ),
|
|
.cram_addr_b ( cram_addr_b ),
|
|
|
|
.mbc_addr_b ( mbc_addr_b ),
|
|
.ram_enabled_b ( ram_enabled_b ),
|
|
.has_battery_b ( has_battery_b )
|
|
);
|
|
|
|
// Mani 4-in-1 DMG 601 & Wisdom Tree 32KB bank mappers
|
|
misc_mapper map_misc (
|
|
.enable ( ~reset & (wisdom_tree | mani161) ),
|
|
|
|
.clk_sys ( clk_sys ),
|
|
.ce_cpu ( ce ),
|
|
|
|
.mapper_sel ( mani161 ),
|
|
|
|
.savestate_load ( savestate_load ),
|
|
.savestate_data ( savestate_data ),
|
|
.savestate_back_b ( savestate_back_b ),
|
|
|
|
.rom_mask ( rom_mask ),
|
|
|
|
.cart_addr ( cart_addr ),
|
|
.cart_a15 ( cart_a15 ),
|
|
|
|
.cart_wr ( cart_wr ),
|
|
.cart_di ( cart_di ),
|
|
|
|
.cram_di ( cram_di ),
|
|
.cram_do_b ( cram_do_b ),
|
|
.cram_addr_b ( cram_addr_b ),
|
|
|
|
.mbc_addr_b ( mbc_addr_b ),
|
|
.ram_enabled_b ( ram_enabled_b ),
|
|
.has_battery_b ( has_battery_b )
|
|
);
|
|
|
|
assign { cram_do } = { cram_do_b };
|
|
assign { savestate_back, savestate_back2 } = { savestate_back_b, savestate_back2_b };
|
|
assign { RTC_timestampOut, RTC_savedtimeOut, RTC_inuse } = { RTC_timestampOut_b, RTC_savedtimeOut_b, RTC_inuse_b };
|
|
assign { cram_wr_do, cram_wr } = { cram_wr_do_b, cram_wr_b };
|
|
|
|
assign mbc_addr = no_mapper_single_bank ? {8'd0, cart_addr[14:0]} : mbc_addr_b;
|
|
assign cram_addr = no_mapper_single_bank ? {4'd0, cart_addr[12:0]} : cram_addr_b;
|
|
assign has_battery = no_mapper_single_bank ? (cart_mbc_type == 8'h09) : has_battery_b;
|
|
assign ram_enabled = no_mapper_single_bank ? has_ram : ram_enabled_b;
|
|
assign rom_do = rom_override ? rom_do_b : rom_di;
|
|
assign cart_oe = cart_oe_override ? cart_oe_b : ((cart_rd & ~cart_a15) | (cram_rd & ram_enabled));
|
|
|
|
endmodule |