* Rework timer modules to resolve#101
Sound clock is passed to the APU but is not currently being used. Work needed to match this up.
* Rename APU frame clock.
* VHDL-2008 fix.
* Fix APU clock to 1x CPU clock.
* Clarify machine cycles in timer.
* Whitespace
* Add APU channel enables for debugging.
* Fix timer generated sound clk
R14 - Audio issues remain for 2X CPU games
* Fix issue with 2x gameboy APU sound clock
R22
* Re-implement sound clocking in timer module.
R25, Remove old code N.B. Likely a bug still here.
* Fix timer generated APU clock to 4 MiHz cycle.
R27
* Tidy up.
Remove attribution in timer module since doing a full rewrite.
* Disabling TAC can generate a clock-edge
Thanks to @paulb-nl for pointing out
* Prevent name clash
* Rework timer modules to resolve#101
Sound clock is passed to the APU but is not currently being used. Work needed to match this up.
* Rename APU frame clock.
* VHDL-2008 fix.
* Fix APU clock to 1x CPU clock.
* Clarify machine cycles in timer.
* Whitespace
* Add APU channel enables for debugging.
* Fix timer generated sound clk
R14 - Audio issues remain for 2X CPU games
* Fix issue with 2x gameboy APU sound clock
R22
* Re-implement sound clocking in timer module.
R25, Remove old code N.B. Likely a bug still here.
* Fix timer generated APU clock to 4 MiHz cycle.
R27
* Tidy up.
Remove attribution in timer module since doing a full rewrite.
* Disabling TAC can generate a clock-edge
Thanks to @paulb-nl for pointing out
* Prevent name clash
* Remove unused variable
* Set en_len_r on same cycle as en_len
* Buffer en_len to en_len_r properly
* Remove debug tools
