From cdaa74d1641ce5956ff1e3fe8a243d06daef65f2 Mon Sep 17 00:00:00 2001 From: sorgelig Date: Thu, 11 Jul 2019 22:43:30 +0800 Subject: [PATCH] Update sys. --- Gameboy.qsf | 1 + Gameboy_Q13.qsf | 1 + sys/sys.tcl | 86 +++----------- sys/sys_analog.tcl | 71 ++++++++++++ sys/sys_dual_sdram.tcl | 53 +++++++++ sys/sys_top.v | 246 ++++++++++++++++++++++++++--------------- 6 files changed, 299 insertions(+), 159 deletions(-) create mode 100644 sys/sys_analog.tcl create mode 100644 sys/sys_dual_sdram.tcl diff --git a/Gameboy.qsf b/Gameboy.qsf index e60b26e..56d2347 100644 --- a/Gameboy.qsf +++ b/Gameboy.qsf @@ -51,5 +51,6 @@ set_global_assignment -name ALM_REGISTER_PACKING_EFFORT LOW set_global_assignment -name SEED 1 source sys/sys.tcl +source sys/sys_analog.tcl source files.qip set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/Gameboy_Q13.qsf b/Gameboy_Q13.qsf index d40f2d7..433b4dd 100644 --- a/Gameboy_Q13.qsf +++ b/Gameboy_Q13.qsf @@ -41,5 +41,6 @@ set_global_assignment -name ALM_REGISTER_PACKING_EFFORT LOW set_global_assignment -name SEED 1 source sys/sys.tcl +source sys/sys_analog.tcl set_global_assignment -name QIP_FILE files.qip set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/sys/sys.tcl b/sys/sys.tcl index cddaea7..d976d0e 100644 --- a/sys/sys.tcl +++ b/sys/sys.tcl @@ -22,9 +22,6 @@ set_location_assignment PIN_AD4 -to ADC_SDO set_location_assignment PIN_AG9 -to ARDUINO_IO[3] set_location_assignment PIN_U14 -to ARDUINO_IO[4] set_location_assignment PIN_U13 -to ARDUINO_IO[5] -set_location_assignment PIN_AG8 -to ARDUINO_IO[6] -set_location_assignment PIN_AH8 -to ARDUINO_IO[7] -set_location_assignment PIN_AF17 -to ARDUINO_IO[8] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[*] set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ARDUINO_IO[*] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ARDUINO_IO[*] @@ -43,67 +40,14 @@ set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to USER_IO[*] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to USER_IO[*] #============================================================ -# SDIO +# SDIO_CD or SPDIF_OUT #============================================================ -set_location_assignment PIN_AF25 -to SDIO_DAT[0] -set_location_assignment PIN_AF23 -to SDIO_DAT[1] -set_location_assignment PIN_AD26 -to SDIO_DAT[2] -set_location_assignment PIN_AF28 -to SDIO_DAT[3] -set_location_assignment PIN_AF27 -to SDIO_CMD -set_location_assignment PIN_AH26 -to SDIO_CLK -set_location_assignment PIN_AH7 -to SDIO_CD +set_location_assignment PIN_AH7 -to SDCD_SPDIF -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDIO_* +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDCD_SPDIF -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDIO_* -set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_DAT[*] -set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_CMD -set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_CD - -#============================================================ -# VGA -#============================================================ -set_location_assignment PIN_AE17 -to VGA_R[0] -set_location_assignment PIN_AE20 -to VGA_R[1] -set_location_assignment PIN_AF20 -to VGA_R[2] -set_location_assignment PIN_AH18 -to VGA_R[3] -set_location_assignment PIN_AH19 -to VGA_R[4] -set_location_assignment PIN_AF21 -to VGA_R[5] - -set_location_assignment PIN_AE19 -to VGA_G[0] -set_location_assignment PIN_AG15 -to VGA_G[1] -set_location_assignment PIN_AF18 -to VGA_G[2] -set_location_assignment PIN_AG18 -to VGA_G[3] -set_location_assignment PIN_AG19 -to VGA_G[4] -set_location_assignment PIN_AG20 -to VGA_G[5] - -set_location_assignment PIN_AG21 -to VGA_B[0] -set_location_assignment PIN_AA20 -to VGA_B[1] -set_location_assignment PIN_AE22 -to VGA_B[2] -set_location_assignment PIN_AF22 -to VGA_B[3] -set_location_assignment PIN_AH23 -to VGA_B[4] -set_location_assignment PIN_AH21 -to VGA_B[5] - -set_location_assignment PIN_AH22 -to VGA_HS -set_location_assignment PIN_AG24 -to VGA_VS - -set_location_assignment PIN_AH27 -to VGA_EN -set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to VGA_EN - -set_location_assignment PIN_AE15 -to VGA_SOG -set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to VGA_SOG - -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_* -set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_* - -#============================================================ -# AUDIO -#============================================================ -set_location_assignment PIN_AC24 -to AUDIO_L -set_location_assignment PIN_AE25 -to AUDIO_R -set_location_assignment PIN_AG26 -to AUDIO_SPDIF -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUDIO_* -set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to AUDIO_* +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDCD_SPDIF +set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDCD_SPDIF #============================================================ # SDRAM @@ -162,19 +106,19 @@ set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*] set_instance_assignment -name ALLOW_SYNCH_CTRL_USAGE OFF -to *|SDRAM_* #============================================================ -# I/O +# I/O #2 #============================================================ -set_location_assignment PIN_Y15 -to LED_USER -set_location_assignment PIN_AA15 -to LED_HDD -set_location_assignment PIN_AG28 -to LED_POWER +set_location_assignment PIN_AG8 -to BTNLED[0] +set_location_assignment PIN_AH8 -to BTNLED[1] +set_location_assignment PIN_AF17 -to BTNLED[2] +set_location_assignment PIN_AE15 -to BTNLED[3] -set_location_assignment PIN_AH24 -to BTN_USER -set_location_assignment PIN_AG25 -to BTN_OSD -set_location_assignment PIN_AG23 -to BTN_RESET +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to BTNLED[*] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BTNLED[*] +set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to BTNLED[*] +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to BTNLED[*] +set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to BTNLED[*] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_* -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BTN_* -set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to BTN_* #============================================================ # CLOCK diff --git a/sys/sys_analog.tcl b/sys/sys_analog.tcl new file mode 100644 index 0000000..692043f --- /dev/null +++ b/sys/sys_analog.tcl @@ -0,0 +1,71 @@ +#============================================================ +# SDIO +#============================================================ +set_location_assignment PIN_AF25 -to SDIO_DAT[0] +set_location_assignment PIN_AF23 -to SDIO_DAT[1] +set_location_assignment PIN_AD26 -to SDIO_DAT[2] +set_location_assignment PIN_AF28 -to SDIO_DAT[3] +set_location_assignment PIN_AF27 -to SDIO_CMD +set_location_assignment PIN_AH26 -to SDIO_CLK +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDIO_* + +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDIO_* +set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_DAT[*] +set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SDIO_CMD + +#============================================================ +# VGA +#============================================================ +set_location_assignment PIN_AE17 -to VGA_R[0] +set_location_assignment PIN_AE20 -to VGA_R[1] +set_location_assignment PIN_AF20 -to VGA_R[2] +set_location_assignment PIN_AH18 -to VGA_R[3] +set_location_assignment PIN_AH19 -to VGA_R[4] +set_location_assignment PIN_AF21 -to VGA_R[5] + +set_location_assignment PIN_AE19 -to VGA_G[0] +set_location_assignment PIN_AG15 -to VGA_G[1] +set_location_assignment PIN_AF18 -to VGA_G[2] +set_location_assignment PIN_AG18 -to VGA_G[3] +set_location_assignment PIN_AG19 -to VGA_G[4] +set_location_assignment PIN_AG20 -to VGA_G[5] + +set_location_assignment PIN_AG21 -to VGA_B[0] +set_location_assignment PIN_AA20 -to VGA_B[1] +set_location_assignment PIN_AE22 -to VGA_B[2] +set_location_assignment PIN_AF22 -to VGA_B[3] +set_location_assignment PIN_AH23 -to VGA_B[4] +set_location_assignment PIN_AH21 -to VGA_B[5] + +set_location_assignment PIN_AH22 -to VGA_HS +set_location_assignment PIN_AG24 -to VGA_VS + +set_location_assignment PIN_AH27 -to VGA_EN +set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to VGA_EN + +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_* +set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_* + +#============================================================ +# AUDIO +#============================================================ +set_location_assignment PIN_AC24 -to AUDIO_L +set_location_assignment PIN_AE25 -to AUDIO_R +set_location_assignment PIN_AG26 -to AUDIO_SPDIF +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUDIO_* +set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to AUDIO_* + +#============================================================ +# I/O #1 +#============================================================ +set_location_assignment PIN_Y15 -to LED_USER +set_location_assignment PIN_AA15 -to LED_HDD +set_location_assignment PIN_AG28 -to LED_POWER + +set_location_assignment PIN_AH24 -to BTN_USER +set_location_assignment PIN_AG25 -to BTN_OSD +set_location_assignment PIN_AG23 -to BTN_RESET + +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_* +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BTN_* +set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to BTN_* diff --git a/sys/sys_dual_sdram.tcl b/sys/sys_dual_sdram.tcl new file mode 100644 index 0000000..de9fd29 --- /dev/null +++ b/sys/sys_dual_sdram.tcl @@ -0,0 +1,53 @@ +#============================================================ +# Secondary SDRAM +#============================================================ +set_location_assignment PIN_Y15 -to SDRAM2_DQ[0] +set_location_assignment PIN_AC24 -to SDRAM2_DQ[1] +set_location_assignment PIN_AA15 -to SDRAM2_DQ[2] +set_location_assignment PIN_AD26 -to SDRAM2_DQ[3] +set_location_assignment PIN_AG28 -to SDRAM2_DQ[4] +set_location_assignment PIN_AF28 -to SDRAM2_DQ[5] +set_location_assignment PIN_AE25 -to SDRAM2_DQ[6] +set_location_assignment PIN_AF27 -to SDRAM2_DQ[7] +set_location_assignment PIN_AG26 -to SDRAM2_DQ[14] +set_location_assignment PIN_AH27 -to SDRAM2_DQ[15] + +set_location_assignment PIN_AG25 -to SDRAM2_DQ[13] +set_location_assignment PIN_AH26 -to SDRAM2_DQ[12] +set_location_assignment PIN_AH24 -to SDRAM2_DQ[11] +set_location_assignment PIN_AF25 -to SDRAM2_DQ[10] +set_location_assignment PIN_AG23 -to SDRAM2_DQ[9] +set_location_assignment PIN_AF23 -to SDRAM2_DQ[8] +set_location_assignment PIN_AG24 -to SDRAM2_A[12] +set_location_assignment PIN_AH22 -to SDRAM2_CLK +set_location_assignment PIN_AH21 -to SDRAM2_A[9] +set_location_assignment PIN_AG21 -to SDRAM2_A[11] +set_location_assignment PIN_AH23 -to SDRAM2_A[7] +set_location_assignment PIN_AA20 -to SDRAM2_A[8] +set_location_assignment PIN_AF22 -to SDRAM2_A[5] +set_location_assignment PIN_AE22 -to SDRAM2_A[6] +set_location_assignment PIN_AG20 -to SDRAM2_nWE +set_location_assignment PIN_AF21 -to SDRAM2_A[4] + +set_location_assignment PIN_AG19 -to SDRAM2_nCAS +set_location_assignment PIN_AH19 -to SDRAM2_nRAS +set_location_assignment PIN_AG18 -to SDRAM2_nCS +set_location_assignment PIN_AH18 -to SDRAM2_BA[0] +set_location_assignment PIN_AF18 -to SDRAM2_BA[1] +set_location_assignment PIN_AF20 -to SDRAM2_A[10] +set_location_assignment PIN_AG15 -to SDRAM2_A[0] +set_location_assignment PIN_AE20 -to SDRAM2_A[1] +set_location_assignment PIN_AE19 -to SDRAM2_A[2] +set_location_assignment PIN_AE17 -to SDRAM2_A[3] + +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SDRAM2_* +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM2_* +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM2_A* +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM2_BA* +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM2_DQ[*] +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM2_DQM* +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM2_n* +set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM2_DQ[*] +set_instance_assignment -name ALLOW_SYNCH_CTRL_USAGE OFF -to *|SDRAM2_* + +set_global_assignment -name VERILOG_MACRO "DUAL_SDRAM=1" diff --git a/sys/sys_top.v b/sys/sys_top.v index d143813..5d0a8bb 100644 --- a/sys/sys_top.v +++ b/sys/sys_top.v @@ -26,20 +26,6 @@ module sys_top input FPGA_CLK2_50, input FPGA_CLK3_50, - //////////// VGA /////////// - output [5:0] VGA_R, - output [5:0] VGA_G, - output [5:0] VGA_B, - inout VGA_HS, // VGA_HS is secondary SD card detect when VGA_EN = 1 (inactive) - output VGA_VS, - input VGA_EN, // active low - output VGA_SOG, - - /////////// AUDIO ////////// - output AUDIO_L, - output AUDIO_R, - output AUDIO_SPDIF, - //////////// HDMI ////////// output HDMI_I2C_SCL, inout HDMI_I2C_SDA, @@ -70,6 +56,36 @@ module sys_top output SDRAM_CLK, output SDRAM_CKE, +`ifdef DUAL_SDRAM + ////////// SDR #2 ////////// + output [12:0] SDRAM2_A, + inout [15:0] SDRAM2_DQ, + output SDRAM2_nWE, + output SDRAM2_nCAS, + output SDRAM2_nRAS, + output SDRAM2_nCS, + output [1:0] SDRAM2_BA, + output SDRAM2_CLK, + +`else + //////////// VGA /////////// + output [5:0] VGA_R, + output [5:0] VGA_G, + output [5:0] VGA_B, + inout VGA_HS, // VGA_HS is secondary SD card detect when VGA_EN = 1 (inactive) + output VGA_VS, + input VGA_EN, // active low + + /////////// AUDIO ////////// + output AUDIO_L, + output AUDIO_R, + output AUDIO_SPDIF, + + //////////// SDIO /////////// + inout [3:0] SDIO_DAT, + inout SDIO_CMD, + output SDIO_CLK, + //////////// I/O /////////// output LED_USER, output LED_HDD, @@ -77,12 +93,11 @@ module sys_top input BTN_USER, input BTN_OSD, input BTN_RESET, +`endif - //////////// SDIO /////////// - inout [3:0] SDIO_DAT, - inout SDIO_CMD, - output SDIO_CLK, - input SDIO_CD, + ////////// I/O ALT ///////// + inout [3:0] BTNLED, + inout SDCD_SPDIF, ////////// ADC ////////////// output ADC_SCK, @@ -103,11 +118,19 @@ module sys_top inout [5:0] USER_IO ); +////////////////////// Secondary SD /////////////////////////////////// -assign SDIO_DAT[2:1] = 2'bZZ; +`ifndef DUAL_SDRAM + wire SD_CS, SD_CLK, SD_MOSI, SD_MISO; + assign SDIO_DAT[2:1]= 2'bZZ; + assign SDIO_DAT[3] = SW[3] ? 1'bZ : SD_CS; + assign SDIO_CLK = SW[3] ? 1'bZ : SD_CLK; + assign SDIO_CMD = SW[3] ? 1'bZ : SD_MOSI; + assign SD_MISO = SW[3] ? 1'b1 : SDIO_DAT[0]; +`endif -////////////////////////// LEDs /////////////////////////////////////// +////////////////////// LEDs/Buttons /////////////////////////////////// reg [7:0] led_overtake = 0; reg [7:0] led_state = 0; @@ -117,15 +140,43 @@ wire led_d = led_disk[1] ? ~led_disk[0] : ~(led_disk[0] | gp_out[29]); wire led_u = ~led_user; wire led_locked; -assign LED_POWER = led_p ? 1'bZ : 1'b0; -assign LED_HDD = led_d ? 1'bZ : 1'b0; -assign LED_USER = led_u ? 1'bZ : 1'b0; +`ifndef DUAL_SDRAM + assign LED_POWER = (SW[3] | led_p) ? 1'bZ : 1'b0; + assign LED_HDD = (SW[3] | led_d) ? 1'bZ : 1'b0; + assign LED_USER = (SW[3] | led_u) ? 1'bZ : 1'b0; +`endif //LEDs on main board assign LED = (led_overtake & led_state) | (~led_overtake & {1'b0,led_locked,1'b0, ~led_p, 1'b0, ~led_d, 1'b0, ~led_u}); +reg [3:0] btnled = 3'bZZZ; +reg btn_r = 0, btn_o = 0, btn_u = 0; +always @(posedge FPGA_CLK2_50) begin + reg [12:0] cnt; + + if(SW[3]) begin + cnt <= cnt + 1'd1; + if(~&cnt[12:8]) btnled <= ~{1'b0,led_p,led_d,led_u}; + else begin + if(~cnt[7]) btnled <= 0; + else btnled <= 4'b0ZZZ; + if(&cnt) {btn_r,btn_o,btn_u} <= ~BTNLED[2:0]; + end + end + else begin + cnt <= 0; + `ifdef DUAL_SDRAM + {btn_r,btn_o,btn_u} <= 0; + btnled <= 4'bZZZZ; + `else + {btn_r,btn_o,btn_u} <= ~{BTN_RESET,BTN_OSD,BTN_USER}; + btnled <= {(~VGA_EN & sog & ~(vs1 ^ hs1)) ? 1'b1 : 1'bZ, 3'bZZZ}; + `endif + end +end + +assign BTNLED = btnled; -////////////////////////// Buttons /////////////////////////////////// reg btn_user, btn_osd; always @(posedge FPGA_CLK2_50) begin integer div; @@ -134,21 +185,18 @@ always @(posedge FPGA_CLK2_50) begin div <= div + 1'b1; if(div > 100000) div <= 0; - + if(!div) begin - deb_user <= {deb_user[6:0], ~(BTN_USER & KEY[1])}; + deb_user <= {deb_user[6:0], btn_u | ~KEY[1]}; if(&deb_user) btn_user <= 1; if(!deb_user) btn_user <= 0; - deb_osd <= {deb_osd[6:0], ~(BTN_OSD & KEY[0])}; + deb_osd <= {deb_osd[6:0], btn_o | ~KEY[0]}; if(&deb_osd) btn_osd <= 1; if(!deb_osd) btn_osd <= 0; end end -reg btn_reset = 1; -always @(posedge FPGA_CLK2_50) btn_reset <= BTN_RESET; - ///////////////////////// HPS I/O ///////////////////////////////////// @@ -169,7 +217,6 @@ wire io_ss2 = gp_outr[20]; //wire io_sdd = gp_outr[21]; // used only in ST core wire io_osd_hdmi = io_ss1 & ~io_ss0; -wire io_osd_vga = io_ss1 & ~io_ss2; wire io_fpga = ~io_ss1 & io_ss0; wire io_uio = ~io_ss1 & io_ss2; @@ -207,13 +254,16 @@ reg [15:0] cfg; reg cfg_got = 0; reg cfg_set = 0; -wire sog = cfg[9]; wire hdmi_limited = cfg[8]; wire dvi_mode = cfg[7]; wire audio_96k = cfg[6]; -wire ypbpr_en = cfg[5]; -wire csync = cfg[3]; -wire vga_scaler= cfg[2]; +`ifndef DUAL_SDRAM + wire sog = cfg[9]; + wire ypbpr_en = cfg[5]; + wire csync = cfg[3]; + wire vga_scaler= cfg[2]; + wire io_osd_vga= io_ss1 & ~io_ss2; +`endif reg cfg_custom_t = 0; reg [5:0] cfg_custom_p1; @@ -396,7 +446,7 @@ sysmem_lite sysmem .clock(clk_100m), //DE10-nano has no reset signal on GPIO, so core has to emulate cold reset button. - .reset_hps_cold_req(~btn_reset), + .reset_hps_cold_req(btn_r), //64-bit DDR3 RAM access .ram1_clk(ram_clk), @@ -759,60 +809,66 @@ osd hdmi_osd ///////////////////////// VGA output ////////////////////////////////// -wire [23:0] vga_data_sl; +`ifndef DUAL_SDRAM + wire [23:0] vga_data_sl; -scanlines #(0) VGA_scanlines -( - .clk(clk_vid), + scanlines #(0) VGA_scanlines + ( + .clk(clk_vid), - .scanlines(scanlines), - .din(de ? {r_out, g_out, b_out} : 24'd0), - .dout(vga_data_sl), - .hs(hs1), - .vs(vs1) -); + .scanlines(scanlines), + .din(de ? {r_out, g_out, b_out} : 24'd0), + .dout(vga_data_sl), + .hs(hs1), + .vs(vs1) + ); -osd vga_osd -( - .clk_sys(clk_sys), + osd vga_osd + ( + .clk_sys(clk_sys), - .io_osd(io_osd_vga), - .io_strobe(io_strobe), - .io_din(io_din), + .io_osd(io_osd_vga), + .io_strobe(io_strobe), + .io_din(io_din), - .clk_video(clk_vid), - .din(vga_data_sl), - .dout(vga_q), - .de_in(de) -); + .clk_video(clk_vid), + .din(vga_data_sl), + .dout(vga_q), + .de_in(de) + ); -wire [23:0] vga_q; -wire [23:0] vga_o; + wire [23:0] vga_q; + wire [23:0] vga_o; -vga_out vga_out -( - .ypbpr_full(1), - .ypbpr_en(ypbpr_en), - .dout(vga_o), - .din(vga_scaler ? {24{HDMI_TX_DE}} & HDMI_TX_D : vga_q) -); + vga_out vga_out + ( + .ypbpr_full(1), + .ypbpr_en(ypbpr_en), + .dout(vga_o), + .din(vga_scaler ? {24{HDMI_TX_DE}} & HDMI_TX_D : vga_q) + ); -wire vs1 = vga_scaler ? HDMI_TX_VS : vs; -wire hs1 = vga_scaler ? HDMI_TX_HS : hs; + wire vs1 = vga_scaler ? HDMI_TX_VS : vs; + wire hs1 = vga_scaler ? HDMI_TX_HS : hs; -assign VGA_VS = VGA_EN ? 1'bZ : csync ? 1'b1 : ~vs1; -assign VGA_HS = VGA_EN ? 1'bZ : csync ? ~(vs1 ^ hs1) : ~hs1; -assign VGA_R = VGA_EN ? 6'bZZZZZZ : vga_o[23:18]; -assign VGA_G = VGA_EN ? 6'bZZZZZZ : vga_o[15:10]; -assign VGA_B = VGA_EN ? 6'bZZZZZZ : vga_o[7:2]; - -assign VGA_SOG = (~VGA_EN & sog & ~(vs1 ^ hs1)) ? 1'b1 : 1'bZ; + assign VGA_VS = (VGA_EN | SW[3]) ? 1'bZ : csync ? 1'b1 : ~vs1; + assign VGA_HS = (VGA_EN | SW[3]) ? 1'bZ : csync ? ~(vs1 ^ hs1) : ~hs1; + assign VGA_R = (VGA_EN | SW[3]) ? 6'bZZZZZZ : vga_o[23:18]; + assign VGA_G = (VGA_EN | SW[3]) ? 6'bZZZZZZ : vga_o[15:10]; + assign VGA_B = (VGA_EN | SW[3]) ? 6'bZZZZZZ : vga_o[7:2]; +`endif ///////////////////////// Audio output //////////////////////////////// -assign AUDIO_SPDIF = SW[0] ? HDMI_LRCLK : spdif; -assign AUDIO_R = SW[0] ? HDMI_I2S : anr; -assign AUDIO_L = SW[0] ? HDMI_SCLK : anl; +assign SDCD_SPDIF =(SW[3] & spdif) ? 1'b0 : 1'bZ; + +`ifndef DUAL_SDRAM + wire anl,anr; + + assign AUDIO_SPDIF = SW[3] ? 1'bZ : SW[0] ? HDMI_LRCLK : spdif; + assign AUDIO_R = SW[3] ? 1'bZ : SW[0] ? HDMI_I2S : anr; + assign AUDIO_L = SW[3] ? 1'bZ : SW[0] ? HDMI_SCLK : anl; +`endif assign HDMI_MCLK = 0; @@ -848,7 +904,7 @@ aud_mix_top audmix_r .out(audio_r) ); -wire anl,anr,spdif; +wire spdif; audio_out audio_out ( .reset(reset), @@ -859,9 +915,11 @@ audio_out audio_out .i2s_bclk(HDMI_SCLK), .i2s_lrclk(HDMI_LRCLK), .i2s_data(HDMI_I2S), - .spdif(spdif), +`ifndef DUAL_SDRAM .dac_l(anl), - .dac_r(anr) + .dac_r(anr), +`endif + .spdif(spdif) ); wire [28:0] aram_address; @@ -984,12 +1042,6 @@ emu emu .ADC_BUS({ADC_SCK,ADC_SDO,ADC_SDI,ADC_CONVST}), - .SD_SCK(SDIO_CLK), - .SD_MOSI(SDIO_CMD), - .SD_MISO(SDIO_DAT[0]), - .SD_CS(SDIO_DAT[3]), - .SD_CD(VGA_EN ? VGA_HS : SDIO_CD), - .DDRAM_CLK(ram_clk), .DDRAM_ADDR(ram_address), .DDRAM_BURSTCNT(ram_burstcount), @@ -1013,6 +1065,24 @@ emu emu .SDRAM_CLK(SDRAM_CLK), .SDRAM_CKE(SDRAM_CKE), +`ifdef DUAL_SDRAM + .SDRAM2_DQ(SDRAM2_DQ), + .SDRAM2_A(SDRAM2_A), + .SDRAM2_BA(SDRAM2_BA), + .SDRAM2_nCS(SDRAM2_nCS), + .SDRAM2_nWE(SDRAM2_nWE), + .SDRAM2_nRAS(SDRAM2_nRAS), + .SDRAM2_nCAS(SDRAM2_nCAS), + .SDRAM2_CLK(SDRAM2_CLK), + .SDRAM2_EN(SW[3]), +`else + .SD_SCK(SD_CLK), + .SD_MOSI(SD_MOSI), + .SD_MISO(SD_MISO), + .SD_CS(SD_CS), + .SD_CD(SW[0] ? VGA_HS : SW[3] ? 1'b1 : SDCD_SPDIF ), +`endif + .UART_CTS(uart_rts), .UART_RTS(uart_cts), .UART_RXD(uart_txd),