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Update sys.

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This commit is contained in:
sorgelig
2019-01-10 05:45:09 +08:00
parent a35a1646f3
commit 6fa9c5b0fe
2 changed files with 51 additions and 14 deletions
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22
sys/hps_io.v
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@@ -40,8 +40,16 @@ module hps_io #(parameter STRLEN=0, PS2DIV=2000, WIDE=0, VDNUM=1, PS2WE=0)
output reg [15:0] joystick_0,
output reg [15:0] joystick_1,
output reg [15:0] joystick_2,
output reg [15:0] joystick_3,
output reg [15:0] joystick_4,
output reg [15:0] joystick_5,
output reg [15:0] joystick_analog_0,
output reg [15:0] joystick_analog_1,
output reg [15:0] joystick_analog_2,
output reg [15:0] joystick_analog_3,
output reg [15:0] joystick_analog_4,
output reg [15:0] joystick_analog_5,
output [1:0] buttons,
output forced_scandoubler,
@@ -325,6 +333,10 @@ always@(posedge clk_sys) begin
'h01: cfg <= io_din[7:0];
'h02: joystick_0 <= io_din;
'h03: joystick_1 <= io_din;
'h10: joystick_2 <= io_din;
'h11: joystick_3 <= io_din;
'h12: joystick_4 <= io_din;
'h13: joystick_5 <= io_din;
// store incoming ps2 mouse bytes
'h04: begin
@@ -379,8 +391,14 @@ always@(posedge clk_sys) begin
// joystick analog
'h1a: case(byte_cnt)
1: stick_idx <= io_din[2:0]; // first byte is joystick index
2: if(stick_idx == 0) joystick_analog_0 <= io_din;
else if(stick_idx == 1) joystick_analog_1 <= io_din;
2: case(stick_idx)
0: joystick_analog_0 <= io_din;
1: joystick_analog_1 <= io_din;
2: joystick_analog_2 <= io_din;
3: joystick_analog_3 <= io_din;
4: joystick_analog_4 <= io_din;
5: joystick_analog_5 <= io_din;
endcase
endcase
// notify image selection

43
sys/spdif.v
View File

@@ -63,34 +63,27 @@ module spdif
);
reg lpf_ce;
always @(negedge clk_i) begin
reg [3:0] div;
div <= div + 1'd1;
if(div == 13) div <= 0;
always @(posedge clk_i) begin
reg [2:0] div;
if(bit_clk_q) div <= div + 1'd1;
lpf_ce <= !div;
end
wire [15:0] al, ar;
lpf48k #(15) lpf_l
lpf_spdif lpf_l
(
.RESET(rst_i),
.CLK(clk_i),
.CE(lpf_ce),
.ENABLE(1),
.IDATA(audio_l),
.ODATA(al)
);
lpf48k #(15) lpf_r
lpf_spdif lpf_r
(
.RESET(rst_i),
.CLK(clk_i),
.CE(lpf_ce),
.ENABLE(1),
.IDATA(audio_r),
.ODATA(ar)
@@ -424,3 +417,29 @@ else
assign spdif_o = spdif_out_q;
endmodule
module lpf_spdif
(
input CLK,
input CE,
input [15:0] IDATA,
output reg [15:0] ODATA
);
reg [511:0] acc;
reg [20:0] sum;
always @(*) begin
integer i;
sum = 0;
for (i = 0; i < 32; i = i+1) sum = sum + {{5{acc[(i*16)+15]}}, acc[i*16 +:16]};
end
always @(posedge CLK) begin
if(CE) begin
acc <= {acc[495:0], IDATA};
ODATA <= sum[20:5];
end
end
endmodule