mister-devel/Gameboy_MiSTer
1
0
Fork 0
mirror of https://github.com/MiSTer-devel/Gameboy_MiSTer.git synced 2026-05-24 03:03:25 +00:00
Code Issues Packages Projects Releases Wiki Activity

GENERAL: wired clk_sys to the gb module, using ce and ce_2x to generate the needed clocks internally, general code cleanup

Browse Source
This commit is contained in:
Bruno Duarte Gouveia
2019-05-09 22:52:37 +01:00
parent c84c10761d
commit 3ed9bb60e6
2 changed files with 22 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
Gameboy.sv
View File

@@ -529,8 +529,11 @@ always @(posedge clk_sys) if(reset) isGBC <= status[15:14] ? status[15] : !filet
// the gameboy itself
gb gb (
.reset ( reset ),
.clk ( clk_cpu ), // the whole gameboy runs on 4mhnz
.clk2x ( clk_cpu2x ), // ~8MHz in dualspeed mode (GBC)
.clk_sys ( clk_sys ),
.ce ( ce_cpu ), // the whole gameboy runs on 4mhnz
.ce_2x ( ce_cpu2x ), // ~8MHz in dualspeed mode (GBC)
.new_game_load ( cart_download),
.fast_boot ( 0 ),
@@ -644,16 +647,13 @@ dpram_dif #(12,8,11,16) boot_rom_gbc (
///////////////////////// GAME GENIE //////////////////////////////////
reg [34:0] gg_code;
reg [34:0] gg_code=35'd0;
// Code layout:
// {clock bit, enable, compare enable, 15'b address, 8'b compare, 8'b replace}
// 34 33 32 31:16 15:8 7:0
reg [3:0] old_ioctl_addr;
always_ff @(posedge clk_sys) begin
gg_code[34] <= 1'b0;
old_ioctl_addr <= ioctl_addr[3:0];
gg_code[34] <= 1'b0;
if (ioctl_download && type_gg) begin
case (ioctl_addr[3:0])

22
gb.v
View File

@@ -22,8 +22,10 @@
module gb (
input reset,
input new_game_load,
input clk,
input clk2x,
input clk_sys,
input ce,
input ce_2x,
input fast_boot,
input [7:0] joystick,
@@ -135,12 +137,22 @@ wire cpu_iorq_n;
wire cpu_m1_n;
wire cpu_mreq_n;
wire cpu_clken = isGBC ? !hdma_active:1'b1; //when hdma is enabled stop CPU (GBC)
wire clk = clk_sys & ce;
wire clk2x = clk_sys & ce_2x;
wire current_cpu_ce = cpu_speed ? ce_2x:ce;
wire clk_cpu = clk_sys & current_cpu_ce;
wire cpu_clken = isGBC && hdma_active ? 1'b0 :current_cpu_ce; //when hdma is enabled stop CPU (GBC)
wire cpu_stop;
GBse cpu (
.RESET_n ( !reset ),
.CLK_n ( clk_cpu ),
.CLK_n ( clk_sys ),
.CLKEN ( cpu_clken ),
.WAIT_n ( 1'b1 ),
.INT_n ( irq_n ),
@@ -183,8 +195,6 @@ geniecodes codes (
// --------------------------------------------------------------------
// --------------------- Speed Toggle KEY1 (GBC)-----------------------
// --------------------------------------------------------------------
wire clk_cpu = cpu_speed?clk2x:clk;
//wire clk_cpu = clk;
reg cpu_speed; // - 0 Normal mode (4MHz) - 1 Double Speed Mode (8MHz)
reg prepare_switch; // set to 1 to toggle speed
assign speed = cpu_speed;