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66 lines
1.8 KiB
Systemverilog
66 lines
1.8 KiB
Systemverilog
module normalize #(
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parameter MAX_X_SEGMENT = 9,
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parameter MAX_Y_SEGMENT = 16,
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parameter MAX_Z_SEGMENT = 4
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) (
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input wire clk,
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input wire [3:0] cpu_id,
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input wire [15:0] current_segment_a,
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input wire [15:0] current_segment_b,
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input wire [15:0] current_segment_c,
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input wire [15:0] current_segment_bs,
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input wire [3:0] current_w_prime[9],
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input wire [3:0] current_w_main [9],
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input wire [1:0] output_lcd_h_index,
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// Z is used for one hot bit selection, hence the width
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output reg [MAX_Z_SEGMENT-1:0] segments[MAX_X_SEGMENT][MAX_Y_SEGMENT]
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);
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initial begin
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int x, y;
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for (x = 0; x < MAX_X_SEGMENT; x += 1) begin
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for (y = 0; y < MAX_Y_SEGMENT; y += 1) begin
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segments[x][y] = '0;
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end
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end
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end
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always @(posedge clk) begin
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int x, y, z;
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case (cpu_id)
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4: begin
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// SM5a
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for (x = 0; x < MAX_X_SEGMENT; x += 1) begin
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// Only 4 Y segments
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for (y = 0; y < 4; y += 1) begin
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if (output_lcd_h_index[0]) begin
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segments[x][y][0] <= current_w_main[x][y];
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end else begin
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segments[x][y][1] <= current_w_prime[x][y];
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end
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end
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end
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end
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default: begin
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// SM510/SM510 Tiger
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for (y = 0; y < MAX_Y_SEGMENT; y += 1) begin
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segments[0][y][output_lcd_h_index] <= current_segment_a[y];
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segments[1][y][output_lcd_h_index] <= current_segment_b[y];
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segments[3][y][output_lcd_h_index] <= current_segment_c[y];
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// SM510 presents this as one line mirrored across mask columns; SM511/SM512
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// use BS column 0 for L/Y blinking and column 1 for X.
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segments[2][y][output_lcd_h_index] <= current_segment_bs[y];
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end
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end
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endcase
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end
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endmodule
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