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10 lines
246 B
Bash
Executable File
10 lines
246 B
Bash
Executable File
#!/bin/bash
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# This script converts the 6805 VHDL code to Verilog usable by Verilator
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set -e
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cd "$(dirname "$0")/../rtl"
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ghdl -a -fsynopsys -fexplicit 6805.vhd
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ghdl synth --out=verilog -fexplicit -fsynopsys --latches ur6805 > ../sim2/ur6805.v
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