2 Commits

Author SHA1 Message Date
misteraddons
fbebfe94bf Correct SDRAM pinout
SDRAM_DQ[0] = GPIO_0[0] = PIN_V12
SDRAM_DQ[1] = GPIO_0[1] = PIN_E8
2025-12-08 09:50:06 +01:00
Andre Zeps
728714699e Added MiSTer framework
Tested example on real MiSTer
Changed name of core

Copy of a19f0927bb02b0a40c3b14d9fada685dd60d02ea
2024-07-12 19:42:22 +02:00