Files
Atari7800_MiSTer/docs/debug.txt
U-COOKIE\kitri 99ba8c7f08 Initial commit
2019-02-21 19:28:11 -06:00

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create_debug_core u_ila_0_0 ila
set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0_0]
set_property ALL_PROBE_SAME_MU_CNT 2 [get_debug_cores u_ila_0_0]
set_property C_ADV_TRIGGER false [get_debug_cores u_ila_0_0]
set_property C_DATA_DEPTH 16384 [get_debug_cores u_ila_0_0]
set_property C_EN_STRG_QUAL true [get_debug_cores u_ila_0_0]
set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0_0]
set_property C_TRIGIN_EN false [get_debug_cores u_ila_0_0]
set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0_0]
set_property port_width 1 [get_debug_ports u_ila_0_0/clk]
connect_debug_port u_ila_0_0/clk [get_nets [list console/divider/inst/CLOCK_100]]
set_property port_width 8 [get_debug_ports u_ila_0_0/probe0]
connect_debug_port u_ila_0_0/probe0 [get_nets [list {console/maria_inst/memory_map_inst/ctrl_kept[0]} {console/maria_inst/memory_map_inst/ctrl_kept[1]} {console/maria_inst/memory_map_inst/ctrl_kept[2]} {console/maria_inst/memory_map_inst/ctrl_kept[3]} {console/maria_inst/memory_map_inst/ctrl_kept[4]} {console/maria_inst/memory_map_inst/ctrl_kept[5]} {console/maria_inst/memory_map_inst/ctrl_kept[6]} {console/maria_inst/memory_map_inst/ctrl_kept[7]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 9 [get_debug_ports u_ila_0_0/probe1]
connect_debug_port u_ila_0_0/probe1 [get_nets [list {console/maria_inst/timing_ctrl_inst/row[0]} {console/maria_inst/timing_ctrl_inst/row[1]} {console/maria_inst/timing_ctrl_inst/row[2]} {console/maria_inst/timing_ctrl_inst/row[3]} {console/maria_inst/timing_ctrl_inst/row[4]} {console/maria_inst/timing_ctrl_inst/row[5]} {console/maria_inst/timing_ctrl_inst/row[6]} {console/maria_inst/timing_ctrl_inst/row[7]} {console/maria_inst/timing_ctrl_inst/row[8]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 4 [get_debug_ports u_ila_0_0/probe2]
connect_debug_port u_ila_0_0/probe2 [get_nets [list {console/maria_inst/timing_ctrl_inst/state[0]} {console/maria_inst/timing_ctrl_inst/state[1]} {console/maria_inst/timing_ctrl_inst/state[2]} {console/maria_inst/timing_ctrl_inst/state[3]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 8 [get_debug_ports u_ila_0_0/probe3]
connect_debug_port u_ila_0_0/probe3 [get_nets [list {console/cpu_inst/core/DI[0]} {console/cpu_inst/core/DI[1]} {console/cpu_inst/core/DI[2]} {console/cpu_inst/core/DI[3]} {console/cpu_inst/core/DI[4]} {console/cpu_inst/core/DI[5]} {console/cpu_inst/core/DI[6]} {console/cpu_inst/core/DI[7]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 4 [get_debug_ports u_ila_0_0/probe4]
connect_debug_port u_ila_0_0/probe4 [get_nets [list {console/CS[0]} {console/CS[1]} {console/CS[2]} {console/CS[3]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 16 [get_debug_ports u_ila_0_0/probe5]
connect_debug_port u_ila_0_0/probe5 [get_nets [list {console/core_AB_out[0]} {console/core_AB_out[1]} {console/core_AB_out[2]} {console/core_AB_out[3]} {console/core_AB_out[4]} {console/core_AB_out[5]} {console/core_AB_out[6]} {console/core_AB_out[7]} {console/core_AB_out[8]} {console/core_AB_out[9]} {console/core_AB_out[10]} {console/core_AB_out[11]} {console/core_AB_out[12]} {console/core_AB_out[13]} {console/core_AB_out[14]} {console/core_AB_out[15]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 16 [get_debug_ports u_ila_0_0/probe6]
connect_debug_port u_ila_0_0/probe6 [get_nets [list {console/maria_AB_out[0]} {console/maria_AB_out[1]} {console/maria_AB_out[2]} {console/maria_AB_out[3]} {console/maria_AB_out[4]} {console/maria_AB_out[5]} {console/maria_AB_out[6]} {console/maria_AB_out[7]} {console/maria_AB_out[8]} {console/maria_AB_out[9]} {console/maria_AB_out[10]} {console/maria_AB_out[11]} {console/maria_AB_out[12]} {console/maria_AB_out[13]} {console/maria_AB_out[14]} {console/maria_AB_out[15]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 16 [get_debug_ports u_ila_0_0/probe7]
connect_debug_port u_ila_0_0/probe7 [get_nets [list {console/pc_temp[0]} {console/pc_temp[1]} {console/pc_temp[2]} {console/pc_temp[3]} {console/pc_temp[4]} {console/pc_temp[5]} {console/pc_temp[6]} {console/pc_temp[7]} {console/pc_temp[8]} {console/pc_temp[9]} {console/pc_temp[10]} {console/pc_temp[11]} {console/pc_temp[12]} {console/pc_temp[13]} {console/pc_temp[14]} {console/pc_temp[15]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 8 [get_debug_ports u_ila_0_0/probe8]
connect_debug_port u_ila_0_0/probe8 [get_nets [list {console/read_DB[0]} {console/read_DB[1]} {console/read_DB[2]} {console/read_DB[3]} {console/read_DB[4]} {console/read_DB[5]} {console/read_DB[6]} {console/read_DB[7]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 2 [get_debug_ports u_ila_0_0/probe9]
connect_debug_port u_ila_0_0/probe9 [get_nets [list {PBin[0]} {PBin[1]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 4 [get_debug_ports u_ila_0_0/probe10]
connect_debug_port u_ila_0_0/probe10 [get_nets [list {console/maria_inst/dma_ctrl_inst/OFFSET[0]} {console/maria_inst/dma_ctrl_inst/OFFSET[1]} {console/maria_inst/dma_ctrl_inst/OFFSET[2]} {console/maria_inst/dma_ctrl_inst/OFFSET[3]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 16 [get_debug_ports u_ila_0_0/probe11]
connect_debug_port u_ila_0_0/probe11 [get_nets [list {console/maria_inst/dma_ctrl_inst/PP[0]} {console/maria_inst/dma_ctrl_inst/PP[1]} {console/maria_inst/dma_ctrl_inst/PP[2]} {console/maria_inst/dma_ctrl_inst/PP[3]} {console/maria_inst/dma_ctrl_inst/PP[4]} {console/maria_inst/dma_ctrl_inst/PP[5]} {console/maria_inst/dma_ctrl_inst/PP[6]} {console/maria_inst/dma_ctrl_inst/PP[7]} {console/maria_inst/dma_ctrl_inst/PP[8]} {console/maria_inst/dma_ctrl_inst/PP[9]} {console/maria_inst/dma_ctrl_inst/PP[10]} {console/maria_inst/dma_ctrl_inst/PP[11]} {console/maria_inst/dma_ctrl_inst/PP[12]} {console/maria_inst/dma_ctrl_inst/PP[13]} {console/maria_inst/dma_ctrl_inst/PP[14]} {console/maria_inst/dma_ctrl_inst/PP[15]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 16 [get_debug_ports u_ila_0_0/probe12]
connect_debug_port u_ila_0_0/probe12 [get_nets [list {console/maria_inst/dma_ctrl_inst/ZP_saved_next[0]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[1]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[2]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[3]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[4]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[5]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[6]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[7]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[8]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[9]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[10]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[11]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[12]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[13]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[14]} {console/maria_inst/dma_ctrl_inst/ZP_saved_next[15]}]]
create_debug_port u_ila_0_0 probe
set_property port_width 1 [get_debug_ports u_ila_0_0/probe13]
connect_debug_port u_ila_0_0/probe13 [get_nets [list console/maria_inst/dp_dma_start]]
create_debug_port u_ila_0_0 probe
set_property port_width 1 [get_debug_ports u_ila_0_0/probe14]
connect_debug_port u_ila_0_0/probe14 [get_nets [list console/ctrl/lock_out]]
create_debug_port u_ila_0_0 probe
set_property port_width 1 [get_debug_ports u_ila_0_0/probe15]
connect_debug_port u_ila_0_0/probe15 [get_nets [list console/maria_drive_AB]]
create_debug_port u_ila_0_0 probe
set_property port_width 1 [get_debug_ports u_ila_0_0/probe16]
connect_debug_port u_ila_0_0/probe16 [get_nets [list pclk_0]]
create_debug_port u_ila_0_0 probe
set_property port_width 1 [get_debug_ports u_ila_0_0/probe17]
connect_debug_port u_ila_0_0/probe17 [get_nets [list console/maria_inst/RW]]
create_debug_port u_ila_0_0 probe
set_property port_width 1 [get_debug_ports u_ila_0_0/probe18]
connect_debug_port u_ila_0_0/probe18 [get_nets [list console/maria_inst/zp_dma_start]]
create_debug_port u_ila_0_0 probe
set_property port_width 1 [get_debug_ports u_ila_0_0/probe19]
connect_debug_port u_ila_0_0/probe19 [get_nets [list console/maria_inst/VBLANK]]
set_property C_CLK_INPUT_FREQ_HZ 300000000 [get_debug_cores dbg_hub]
set_property C_ENABLE_CLK_DIVIDER false [get_debug_cores dbg_hub]
set_property C_USER_SCAN_CHAIN 1 [get_debug_cores dbg_hub]
connect_debug_port dbg_hub/clk [get_nets u_ila_0_CLOCK_100]