6 Commits

Author	SHA1	Message	Date
sorgelig	6a5f8ee930	Different phases for different SDRAM modules.	2019-09-02 05:29:59 +08:00
sorgelig	497155b80c	Update sys.	2019-07-11 20:21:10 +08:00
sorgelig	ff03bc0ee2	Update SDRAM, increase CPU clock.	2019-04-26 13:56:31 +08:00
sorgelig	79f07b101a	Variable pixel clock.	2019-03-03 05:50:33 +08:00
sorgelig	612f80135f	Update sys: new scaler, linux audio, fixes.	2019-02-06 17:27:51 +08:00
sorgelig	c5c7069d55	Initial port.	2017-10-16 02:07:56 +08:00