234 lines
6.0 KiB
C++
234 lines
6.0 KiB
C++
/* Teensyduino Core Library
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* http://www.pjrc.com/teensy/
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* Copyright (c) 2017 PJRC.COM, LLC.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* 1. The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* 2. If the Software is incorporated into a build system that allows
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* selection among a list of target devices, then similar target
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* devices manufactured by PJRC.COM must be included in the list of
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* target devices and selectable in the same manner.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "DMAChannel.h"
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#if DMA_NUM_CHANNELS <= 16
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#define DMA_MAX_CHANNELS DMA_NUM_CHANNELS
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#else
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#define DMA_MAX_CHANNELS 16
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#endif
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// The channel allocation bitmask is accessible from "C" namespace,
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// so C-only code can reserve DMA channels
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uint16_t dma_channel_allocated_mask = 0;
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/****************************************************************/
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/** Teensy 3.0 & 3.1 **/
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/****************************************************************/
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#if defined(KINETISK)
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void DMAChannel::begin(bool force_initialization)
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{
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uint32_t ch = 0;
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__disable_irq();
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if (!force_initialization && TCD && channel < DMA_MAX_CHANNELS
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&& (dma_channel_allocated_mask & (1 << channel))
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&& (uint32_t)TCD == (uint32_t)(0x40009000 + channel * 32)) {
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// DMA channel already allocated
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__enable_irq();
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return;
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}
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while (1) {
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if (!(dma_channel_allocated_mask & (1 << ch))) {
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dma_channel_allocated_mask |= (1 << ch);
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__enable_irq();
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break;
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}
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if (++ch >= DMA_MAX_CHANNELS) {
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__enable_irq();
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TCD = (TCD_t *)0;
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channel = DMA_MAX_CHANNELS;
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return; // no more channels available
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// attempts to use this object will hardfault
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}
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}
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channel = ch;
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SIM_SCGC7 |= SIM_SCGC7_DMA;
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SIM_SCGC6 |= SIM_SCGC6_DMAMUX;
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#if DMA_NUM_CHANNELS <= 16
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DMA_CR = DMA_CR_EMLM | DMA_CR_EDBG; // minor loop mapping is available
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#else
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DMA_CR = DMA_CR_GRP1PRI| DMA_CR_EMLM | DMA_CR_EDBG;
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#endif
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DMA_CERQ = ch;
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DMA_CERR = ch;
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DMA_CEEI = ch;
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DMA_CINT = ch;
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TCD = (TCD_t *)(0x40009000 + ch * 32);
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uint32_t *p = (uint32_t *)TCD;
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*p++ = 0;
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*p++ = 0;
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*p++ = 0;
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*p++ = 0;
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*p++ = 0;
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*p++ = 0;
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*p++ = 0;
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*p++ = 0;
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}
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void DMAChannel::release(void)
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{
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if (channel >= DMA_MAX_CHANNELS) return;
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DMA_CERQ = channel;
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__disable_irq();
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dma_channel_allocated_mask &= ~(1 << channel);
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__enable_irq();
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channel = DMA_MAX_CHANNELS;
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TCD = (TCD_t *)0;
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}
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static uint32_t priority(const DMAChannel &c)
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{
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uint32_t n;
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n = *(uint32_t *)((uint32_t)&DMA_DCHPRI3 + (c.channel & 0xFC));
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n = __builtin_bswap32(n);
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return (n >> ((c.channel & 0x03) << 3)) & 0x0F;
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}
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static void swap(DMAChannel &c1, DMAChannel &c2)
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{
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uint8_t c;
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DMABaseClass::TCD_t *t;
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c = c1.channel;
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c1.channel = c2.channel;
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c2.channel = c;
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t = c1.TCD;
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c1.TCD = c2.TCD;
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c2.TCD = t;
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}
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/****************************************************************/
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/** Teensy-LC **/
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/****************************************************************/
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#elif defined(KINETISL)
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void DMAChannel::begin(bool force_initialization)
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{
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uint32_t ch = 0;
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__disable_irq();
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if (!force_initialization && CFG && channel < DMA_MAX_CHANNELS
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&& (dma_channel_allocated_mask & (1 << channel))
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&& (uint32_t)CFG == (uint32_t)(0x40008100 + channel * 16)) {
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// DMA channel already allocated
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__enable_irq();
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return;
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}
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while (1) {
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if (!(dma_channel_allocated_mask & (1 << ch))) {
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dma_channel_allocated_mask |= (1 << ch);
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__enable_irq();
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break;
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}
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if (++ch >= DMA_MAX_CHANNELS) {
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__enable_irq();
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CFG = (CFG_t *)0;
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channel = DMA_MAX_CHANNELS;
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return; // no more channels available
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// attempts to use this object will hardfault
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}
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}
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channel = ch;
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SIM_SCGC7 |= SIM_SCGC7_DMA;
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SIM_SCGC6 |= SIM_SCGC6_DMAMUX;
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CFG = (CFG_t *)(0x40008100 + ch * 16);
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CFG->DSR_BCR = DMA_DSR_BCR_DONE;
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CFG->DCR = DMA_DCR_CS;
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CFG->SAR = NULL;
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CFG->DAR = NULL;
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}
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void DMAChannel::release(void)
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{
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if (channel >= DMA_MAX_CHANNELS) return;
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CFG->DSR_BCR = DMA_DSR_BCR_DONE;
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__disable_irq();
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dma_channel_allocated_mask &= ~(1 << channel);
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__enable_irq();
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channel = 16;
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CFG = (CFG_t *)0;
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}
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static uint32_t priority(const DMAChannel &c)
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{
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return 3 - c.channel;
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}
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static void swap(DMAChannel &c1, DMAChannel &c2)
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{
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uint8_t c;
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DMABaseClass::CFG_t *t;
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c = c1.channel;
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c1.channel = c2.channel;
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c2.channel = c;
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t = c1.CFG;
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c1.CFG = c2.CFG;
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c2.CFG = t;
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}
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#endif
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void DMAPriorityOrder(DMAChannel &ch1, DMAChannel &ch2)
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{
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if (priority(ch1) < priority(ch2)) swap(ch1, ch2);
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}
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void DMAPriorityOrder(DMAChannel &ch1, DMAChannel &ch2, DMAChannel &ch3)
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{
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if (priority(ch2) < priority(ch3)) swap(ch2, ch3);
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if (priority(ch1) < priority(ch2)) swap(ch1, ch2);
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if (priority(ch2) < priority(ch3)) swap(ch2, ch3);
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}
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void DMAPriorityOrder(DMAChannel &ch1, DMAChannel &ch2, DMAChannel &ch3, DMAChannel &ch4)
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{
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if (priority(ch3) < priority(ch4)) swap(ch3, ch4);
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if (priority(ch2) < priority(ch3)) swap(ch2, ch3);
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if (priority(ch1) < priority(ch2)) swap(ch1, ch2);
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if (priority(ch3) < priority(ch4)) swap(ch2, ch3);
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if (priority(ch2) < priority(ch3)) swap(ch1, ch2);
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if (priority(ch3) < priority(ch4)) swap(ch2, ch3);
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}
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