Updates for tranZPUter SW-700 v1.3 board under a seperate branch
This commit is contained in:
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include/sharpmz.h
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include/sharpmz.h
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/////////////////////////////////////////////////////////////////////////////////////////////////////////
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//
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// Name: sharpmz.c
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// Created: December 2020
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// Version: v1.0
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// Author(s): Philip Smart
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// Description: The Sharp MZ library.
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// This file contains methods which allow the ZPU to access and control the Sharp MZ
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// series computer hardware. The ZPU is instantiated within a physical Sharp MZ machine
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// or an FPGA hardware emulation and provides either a host CPU running zOS or as an
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// I/O processor providing services.
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//
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// NB. This library is NOT yet thread safe.
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// Credits:
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// Copyright: (c) 2019-2020 Philip Smart <philip.smart@net2net.org>
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//
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// History: v1.0 Dec 2020 - Initial write of the Sharp MZ series hardware interface software.
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//
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// Notes: See Makefile to enable/disable conditional components
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//
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/////////////////////////////////////////////////////////////////////////////////////////////////////////
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// This source file is free software: you can redistribute it and#or modify
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// it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This source file is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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/////////////////////////////////////////////////////////////////////////////////////////////////////////
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#ifndef SHARPMZ_H
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#define SHARPMZ_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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// tranZPUter Memory Modes - select one of the 32 possible memory models using these constants.
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//
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#define TZMM_ORIG 0x00 // Original Sharp MZ80A mode, no tranZPUter features are selected except the I/O control registers (default: 0x60-063).
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#define TZMM_BOOT 0x01 // Original mode but E800-EFFF is mapped to tranZPUter RAM so TZFS can be booted.
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#define TZMM_TZFS 0x02 // TZFS main memory configuration. all memory is in tranZPUter RAM, E800-FFFF is used by TZFS, SA1510 is at 0000-1000 and RAM is 1000-CFFF, 64K Block 0 selected.
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#define TZMM_TZFS2 0x03 // TZFS main memory configuration. all memory is in tranZPUter RAM, E800-EFFF is used by TZFS, SA1510 is at 0000-1000 and RAM is 1000-CFFF, 64K Block 0 selected, F000-FFFF is in 64K Block 1.
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#define TZMM_TZFS3 0x04 // TZFS main memory configuration. all memory is in tranZPUter RAM, E800-EFFF is used by TZFS, SA1510 is at 0000-1000 and RAM is 1000-CFFF, 64K Block 0 selected, F000-FFFF is in 64K Block 2.
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#define TZMM_TZFS4 0x05 // TZFS main memory configuration. all memory is in tranZPUter RAM, E800-EFFF is used by TZFS, SA1510 is at 0000-1000 and RAM is 1000-CFFF, 64K Block 0 selected, F000-FFFF is in 64K Block 3.
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#define TZMM_CPM 0x06 // CPM main memory configuration, all memory on the tranZPUter board, 64K block 4 selected. Special case for F3C0:F3FF & F7C0:F7FF (floppy disk paging vectors) which resides on the mainboard.
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#define TZMM_CPM2 0x07 // CPM main memory configuration, F000-FFFF are on the tranZPUter board in block 4, 0040-CFFF and E800-EFFF are in block 5, mainboard for D000-DFFF (video), E000-E800 (Memory control) selected.
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// Special case for 0000:003F (interrupt vectors) which resides in block 4, F3C0:F3FF & F7C0:F7FF (floppy disk paging vectors) which resides on the mainboard.
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#define TZMM_MZ700_0 0x0a // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the mainboard.
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#define TZMM_MZ700_1 0x0b // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 0, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the tranZPUter in block 6.
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#define TZMM_MZ700_2 0x0c // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the tranZPUter in block 6.
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#define TZMM_MZ700_3 0x0d // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 0, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is inaccessible.
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#define TZMM_MZ700_4 0x0e // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is inaccessible.
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#define TZMM_TZPU0 0x18 // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 0 is selected.
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#define TZMM_TZPU1 0x19 // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 1 is selected.
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#define TZMM_TZPU2 0x1A // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 2 is selected.
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#define TZMM_TZPU3 0x1B // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 3 is selected.
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#define TZMM_TZPU4 0x1C // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 4 is selected.
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#define TZMM_TZPU5 0x1D // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 5 is selected.
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#define TZMM_TZPU6 0x1E // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 6 is selected.
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#define TZMM_TZPU7 0x1F // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 7 is selected.
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#define TZMM_ENIOWAIT 0x20 // Enable wait state generator for Sharp system IO operations in region 0xE0-0xFF.
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// IO addresses on the tranZPUter or mainboard.
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//
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#define IO_TZ_CTRLLATCH 0x60 // Control latch which specifies the Memory Model/mode.
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#define IO_TZ_SETXMHZ 0x62 // Switch to alternate CPU frequency provided by K64F.
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#define IO_TZ_SET2MHZ 0x64 // Switch to system CPU frequency.
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#define IO_TZ_CLKSELRD 0x66 // Read the status of the clock select, ie. which clock is connected to the CPU.
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#define IO_TZ_SVCREQ 0x68 // Service request from the Z80 to be provided by the K64F.
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#define IO_TZ_SYSREQ 0x6A // System request from the Z80 to be provided by the K64F.
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#define IO_TZ_CPUCFG 0x6C // Version 2.2 CPU configuration register.
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#define IO_TZ_CPUSTATUS 0x6C // Version 2.2 CPU runtime status register.
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#define IO_TZ_CPUINFO 0x6D // Version 2.2 CPU information register.
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#define IO_TZ_CPLDCFG 0x6E // Version 2.1 CPLD configuration register.
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#define IO_TZ_CPLDSTATUS 0x6E // Version 2.1 CPLD status register.
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#define IO_TZ_CPLDINFO 0x6F // Version 2.1 CPLD version information register.
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#define IO_TZ_SYSCTRL 0xF0 // System board control register. [2:0] - 000 MZ80A Mode, 2MHz CPU/Bus, 001 MZ80B Mode, 4MHz CPU/Bus, 010 MZ700 Mode, 3.54MHz CPU/Bus.
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#define IO_TZ_GRAMMODE 0xF4 // MZ80B Graphics mode. Bit 0 = 0, Write to Graphics RAM I, Bit 0 = 1, Write to Graphics RAM II. Bit 1 = 1, blend Graphics RAM I output on display, Bit 2 = 1, blend Graphics RAM II output on display.
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#define IO_TZ_VMCTRL 0xF8 // Video Module control register. [2:0] - 000 (default) = MZ80A, 001 = MZ-700, 010 = MZ800, 011 = MZ80B, 100 = MZ80K, 101 = MZ80C, 110 = MZ1200, 111 = MZ2000. [3] = 0 - 40 col, 1 - 80 col.
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#define IO_TZ_VMGRMODE 0xF9 // Video Module graphics mode. 7/6 = Operator (00=OR,01=AND,10=NAND,11=XOR), 5=GRAM Output Enable, 4 = VRAM Output Enable, 3/2 = Write mode (00=Page 1:Red, 01=Page 2:Green, 10=Page 3:Blue, 11=Indirect), 1/0=Read mode (00=Page 1:Red, 01=Page2:Green, 10=Page 3:Blue, 11=Not used).
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#define IO_TZ_VMREDMASK 0xFA // Video Module Red bit mask (1 bit = 1 pixel, 8 pixels per byte).
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#define IO_TZ_VMGREENMASK 0xFB // Video Module Green bit mask (1 bit = 1 pixel, 8 pixels per byte).
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#define IO_TZ_VMBLUEMASK 0xFC // Video Module Blue bit mask (1 bit = 1 pixel, 8 pixels per byte).
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#define IO_TZ_VMPAGE 0xFD // Video Module memory page register. [1:0] switches in 1 16Kb page (3 pages) of graphics ram to C000 - FFFF. Bits [1:0] = page, 00 = off, 01 = Red, 10 = Green, 11 = Blue. This overrides all MZ700/MZ80B page switching functions. [7] 0 - normal, 1 - switches in CGROM for upload at D000:DFFF.
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// IO register constants.
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//
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#define CPUMODE_SET_Z80 0x00 // Set the CPU to the hard Z80.
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#define CPUMODE_SET_T80 0x01 // Set the CPU to the soft T80.
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#define CPUMODE_SET_ZPU_EVO 0x02 // Set the CPU to the soft ZPU Evolution.
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#define CPUMODE_SET_AAA 0x04 // Place holder for a future soft CPU.
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#define CPUMODE_SET_BBB 0x08 // Place holder for a future soft CPU.
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#define CPUMODE_SET_CCC 0x10 // Place holder for a future soft CPU.
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#define CPUMODE_SET_DDD 0x20 // Place holder for a future soft CPU.
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#define CPUMODE_IS_Z80 0x00 // Status value to indicate if the hard Z80 available.
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#define CPUMODE_IS_T80 0x01 // Status value to indicate if the soft T80 available.
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#define CPUMODE_IS_ZPU_EVOL 0x02 // Status value to indicate if the soft ZPU Evolution available.
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#define CPUMODE_IS_AAA 0x04 // Place holder to indicate if a future soft CPU is available.
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#define CPUMODE_IS_BBB 0x08 // Place holder to indicate if a future soft CPU is available.
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#define CPUMODE_IS_CCC 0x10 // Place holder to indicate if a future soft CPU is available.
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#define CPUMODE_IS_DDD 0x20 // Place holder to indicate if a future soft CPU is available.
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#define CPUMODE_RESET_CPU 0x80 // Reset the soft CPU. Active high, when high the CPU is held in RESET, when low the CPU runs.
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#define CPUMODE_IS_SOFT_AVAIL 0x040 // Marker to indicate if the underlying FPGA can support soft CPU's.
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#define CPUMODE_IS_SOFT_MASK 0x0C0 // Mask to filter out the Soft CPU availability flags.
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// Sharp MZ constants.
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//
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#define MZ_MROM_ADDR 0x0000 // Monitor ROM start address.
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#define MZ_MROM_STACK_ADDR 0x1000 // Monitor ROM start stack address.
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#define MZ_MROM_STACK_SIZE 0x0200 // Monitor ROM stack size.
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#define MZ_UROM_ADDR 0xE800 // User ROM start address.
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#define MZ_BANKRAM_ADDR 0xF000 // Floppy API address which is used in TZFS as the paged RAM for additional functionality.
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#define MZ_CMT_ADDR 0x10F0 // Address of the CMT (tape) header record.
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#define MZ_CMT_DEFAULT_LOAD_ADDR 0x1200 // The default load address for a CMT, anything below this is normally illegal.
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#define MZ_VID_RAM_ADDR 0xD000 // Start of Video RAM
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#define MZ_VID_RAM_SIZE 2048 // Size of Video RAM.
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#define MZ_VID_DFLT_BYTE 0x00 // Default character (SPACE) for video RAM.
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#define MZ_ATTR_RAM_ADDR 0xD800 // On machines with the upgrade, the start of the Attribute RAM.
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#define MZ_ATTR_RAM_SIZE 2048 // Size of the attribute RAM.
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#define MZ_ATTR_DFLT_BYTE 0x07 // Default colour (White on Black) for the attribute.
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#define MZ_SCROL_BASE 0xE200 // Base address of the hardware scroll registers.
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#define MZ_SCROL_END 0xE2FF // End address of the hardware scroll registers.
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#define MZ_MEMORY_SWAP 0xE00C // Address when read swaps the memory from 0000-0FFF -> C000-CFFF
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#define MZ_MEMORY_RESET 0xE010 // Address when read resets the memory to the default location 0000-0FFF.
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#define MZ_CRT_NORMAL 0xE014 // Address when read sets the CRT to normal display mode.
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#define MZ_CRT_INVERSE 0xE018 // Address when read sets the CRT to inverted display mode.
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#define MZ_80A_CPU_FREQ 2000000 // CPU Speed of the Sharp MZ-80A
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#define MZ_700_CPU_FREQ 3580000 // CPU Speed of the Sharp MZ-700
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#define MZ_80B_CPU_FREQ 4000000 // CPU Speed of the Sharp MZ-80B
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// Service request constants.
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//
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#define TZSVC_CMD_STRUCT_ADDR_TZFS 0x0ED80 // Address of the command structure within TZFS - exists in 64K Block 0.
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#define TZSVC_CMD_STRUCT_ADDR_CPM 0x4F560 // Address of the command structure within CP/M - exists in 64K Block 4.
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#define TZSVC_CMD_STRUCT_ADDR_MZ700 0x6FD80 // Address of the command structure within MZ700 compatible programs - exists in 64K Block 6.
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#define TZSVC_CMD_STRUCT_SIZE 0x280 // Size of the inter z80/K64 service command memory.
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#define TZSVC_CMD_SIZE (sizeof(t_svcControl)-TZSVC_SECTOR_SIZE)
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#define TZVC_MAX_CMPCT_DIRENT_BLOCK TZSVC_SECTOR_SIZE/TZSVC_CMPHDR_SIZE // Maximum number of directory entries per sector.
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#define TZSVC_MAX_DIR_ENTRIES 255 // Maximum number of files in one directory, any more than this will be ignored.
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#define TZSVC_CMPHDR_SIZE 32 // Compacted header size, contains everything except the comment field, padded out to 32bytes.
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#define MZF_FILLER_LEN 8 // Filler to pad a compacted header entry to a power of 2 length.
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#define TZVC_MAX_DIRENT_BLOCK TZSVC_SECTOR_SIZE/MZF_HEADER_SIZE // Maximum number of directory entries per sector.
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#define TZSVC_CMD_READDIR 0x01 // Service command to open a directory and return the first block of entries.
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#define TZSVC_CMD_NEXTDIR 0x02 // Service command to return the next block of an open directory.
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#define TZSVC_CMD_READFILE 0x03 // Service command to open a file and return the first block.
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#define TZSVC_CMD_NEXTREADFILE 0x04 // Service command to return the next block of an open file.
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#define TZSVC_CMD_WRITEFILE 0x05 // Service command to create a file and save the first block.
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#define TZSVC_CMD_NEXTWRITEFILE 0x06 // Service command to write the next block to the open file.
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#define TZSVC_CMD_CLOSE 0x07 // Service command to close any open file or directory.
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#define TZSVC_CMD_LOADFILE 0x08 // Service command to load a file directly into tranZPUter memory.
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#define TZSVC_CMD_SAVEFILE 0x09 // Service command to save a file directly from tranZPUter memory.
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#define TZSVC_CMD_ERASEFILE 0x0a // Service command to erase a file on the SD card.
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#define TZSVC_CMD_CHANGEDIR 0x0b // Service command to change active directory on the SD card.
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#define TZSVC_CMD_LOAD40ABIOS 0x20 // Service command requesting that the 40 column version of the SA1510 BIOS is loaded.
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#define TZSVC_CMD_LOAD80ABIOS 0x21 // Service command requesting that the 80 column version of the SA1510 BIOS is loaded.
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#define TZSVC_CMD_LOAD700BIOS40 0x22 // Service command requesting that the MZ700 1Z-013A 40 column BIOS is loaded.
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#define TZSVC_CMD_LOAD700BIOS80 0x23 // Service command requesting that the MZ700 1Z-013A 80 column patched BIOS is loaded.
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#define TZSVC_CMD_LOAD80BIPL 0x24 // Service command requesting the MZ-80B IPL is loaded.
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#define TZSVC_CMD_LOADBDOS 0x30 // Service command to reload CPM BDOS+CCP.
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#define TZSVC_CMD_ADDSDDRIVE 0x31 // Service command to attach a CPM disk to a drive number.
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#define TZSVC_CMD_READSDDRIVE 0x32 // Service command to read an attached SD file as a CPM disk drive.
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#define TZSVC_CMD_WRITESDDRIVE 0x33 // Service command to write to a CPM disk drive which is an attached SD file.
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#define TZSVC_CMD_CPU_BASEFREQ 0x40 // Service command to switch to the mainboard frequency.
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#define TZSVC_CMD_CPU_ALTFREQ 0x41 // Service command to switch to the alternate frequency provided by the K64F.
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#define TZSVC_CMD_CPU_CHGFREQ 0x42 // Service command to set the alternate frequency in hertz.
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#define TZSVC_CMD_CPU_SETZ80 0x50 // Service command to switch to the external Z80 hard cpu.
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#define TZSVC_CMD_CPU_SETT80 0x51 // Service command to switch to the internal T80 soft cpu.
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#define TZSVC_CMD_CPU_SETZPUEVO 0x52 // Service command to switch to the internal ZPU Evolution cpu.
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#define TZSVC_CMD_EXIT 0x7F // Service command to terminate TZFS and restart the machine in original mode.
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#define TZSVC_DEFAULT_MZF_DIR "MZF" // Default directory where MZF files are stored.
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#define TZSVC_DEFAULT_CAS_DIR "CAS" // Default directory where BASIC CASsette files are stored.
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#define TZSVC_DEFAULT_BAS_DIR "BAS" // Default directory where BASIC text files are stored.
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#define TZSVC_DEFAULT_MZF_EXT "MZF" // Default file extension for MZF files.
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#define TZSVC_DEFAULT_CAS_EXT "CAS" // Default file extension for CASsette files.
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#define TZSVC_DEFAULT_BAS_EXT "BAS" // Default file extension for BASic script files stored in readable text.
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#define TZSVC_DEFAULT_WILDCARD "*" // Default wildcard file matching.
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#define TZSVC_RESULT_OFFSET 0x01 // Offset into structure of the result byte.
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#define TZSVC_DIRNAME_SIZE 20 // Limit is size of FAT32 directory name.
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#define TZSVC_WILDCARD_SIZE 20 // Very basic pattern matching so small size.
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#define TZSVC_FILENAME_SIZE MZF_FILENAME_LEN // Length of a Sharp MZF filename.
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#define TZSVC_LONG_FNAME_SIZE (sizeof(t_svcCmpDirEnt) - 1) // Length of a standard filename to fit inside a directory entry.
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#define TZSVC_LONG_FMT_FNAME_SIZE 20 // Length of a standard filename formatted in a directory listing.
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#define TZSVC_SECTOR_SIZE 512 // SD Card sector buffer size.
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#define TZSVC_STATUS_OK 0x00 // Flag to indicate the K64F processing completed successfully.
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#define TZSVC_STATUS_FILE_ERROR 0x01 // Flag to indicate a file or directory error.
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#define TZSVC_STATUS_REQUEST 0xFE // Flag to indicate Z80 has posted a request.
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#define TZSVC_STATUS_PROCESSING 0xFF // Flag to indicate the K64F is processing a command.
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#define TZSVC_OPEN 0x00 // Service request to open a directory or file.
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#define TZSVC_NEXT 0x01 // Service request to return the next directory block or file block or write the next file block.
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#define TZSVC_CLOSE 0x02 // Service request to close open dir/file.
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// Constants for the Sharp MZ80A MZF file format.
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#define MZF_HEADER_SIZE 128 // Size of the MZF header.
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#define MZF_ATTRIBUTE 0x00 // Code Type, 01 = Machine Code.
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#define MZF_FILENAME 0x01 // Title/Name (17 bytes).
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#define MZF_FILENAME_LEN 17 // Length of the filename, it is not NULL terminated, generally a CR can be taken as terminator but not guaranteed.
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#define MZF_FILESIZE 0x12 // Size of program.
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#define MZF_LOADADDR 0x14 // Load address of program.
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#define MZF_EXECADDR 0x16 // Exec address of program.
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#define MZF_COMMENT 0x18 // Comment, used for details of the file or startup code.
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#define MZF_COMMENT_LEN 104 // Length of the comment field.
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// Possible machines the tranZPUter can be hosted on and can emulate.
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//
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enum MACHINE_TYPES {
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MZ80K = 0x00, // Machine = MZ-80K.
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MZ80C = 0x01, // Machine = MZ-80C.
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MZ1200 = 0x02, // Machine = MZ-1200.
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MZ80A = 0x03, // Machine = MZ-80A.
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MZ700 = 0x04, // Machine = MZ-700.
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MZ800 = 0x05, // Machine = MZ-800.
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MZ80B = 0x06, // Machine = MZ-80B.
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MZ2000 = 0x07 // Machine = MZ-2000.
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};
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// Get and Set flags within the CPLD config and status registers.
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//
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enum CPLD_FLAGS {
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VIDEO_FPGA = 0x08, // Bit to test for available functionality or enabling of the FPGA video hardware.
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CPLD_VERSION = 0xE0 // CPLD version mask bits.
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};
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// Structure to define a Sharp MZ80A MZF directory structure. This header appears at the beginning of every Sharp MZ80A tape (and more recently archived/emulator) images.
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//
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typedef struct __attribute__((__packed__)) {
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uint8_t attr; // MZF attribute describing the file.
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||||
uint8_t fileName[MZF_FILENAME_LEN]; // Each directory entry is the size of an MZF filename.
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uint16_t fileSize; // Size of file.
|
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uint16_t loadAddr; // Load address for the file.
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uint16_t execAddr; // Execution address where the Z80 starts processing.
|
||||
uint8_t comment[MZF_COMMENT_LEN]; // Text comment field but often contains a startup machine code program.
|
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} t_svcDirEnt;
|
||||
|
||||
// Structure to define a compacted Sharp MZ80A MZF directory structure (no comment) for use in directory listings.
|
||||
// This header appears at the beginning of every Sharp MZ80A tape (and more recently archived/emulator) images.
|
||||
//
|
||||
typedef struct __attribute__((__packed__)) {
|
||||
uint8_t attr; // MZF attribute describing the file.
|
||||
uint8_t fileName[MZF_FILENAME_LEN]; // Each directory entry is the size of an MZF filename.
|
||||
uint16_t fileSize; // Size of file.
|
||||
uint16_t loadAddr; // Load address for the file.
|
||||
uint16_t execAddr; // Execution address where the Z80 starts processing.
|
||||
uint8_t filler[MZF_FILLER_LEN]; // Filler to pad to a power of 2 length.
|
||||
} t_svcCmpDirEnt;
|
||||
|
||||
// Structure to hold the map betwen an SD filename and the Sharp file it contains. The file is an MZF format file with a 128 byte header
|
||||
// and this header contains the name understood on the Sharp MZ80A.
|
||||
//
|
||||
typedef struct __attribute__((__packed__)) {
|
||||
uint8_t *sdFileName; // Name of file on the SD card.
|
||||
t_svcCmpDirEnt mzfHeader; // Compact Sharp header data of this file.
|
||||
} t_sharpToSDMap;
|
||||
|
||||
// Structure to hold a map of an entire directory of files on the SD card and their associated Sharp MZ0A filename.
|
||||
typedef struct __attribute__((__packed__)) {
|
||||
uint8_t valid; // Is this mapping valid?
|
||||
uint8_t entries; // Number of entries in cache.
|
||||
uint8_t type; // Type of file being cached.
|
||||
char directory[TZSVC_DIRNAME_SIZE]; // Directory this mapping is associated with.
|
||||
union {
|
||||
t_sharpToSDMap *mzfFile[TZSVC_MAX_DIR_ENTRIES]; // File mapping of SD file to its Sharp MZ80A name.
|
||||
uint8_t *sdFileName[TZSVC_MAX_DIR_ENTRIES]; // No mapping for SD filenames, just the file name.
|
||||
};
|
||||
} t_dirMap;
|
||||
|
||||
|
||||
// Structure to maintain all MZ700 hardware control information in order to emulate the machine.
|
||||
//
|
||||
typedef struct {
|
||||
uint32_t config; // Compacted control register, 31:19 = reserved, 18 = Inhibit mode, 17 = Upper D000:FFFF is RAM (=1), 16 = Lower 0000:0FFF is RAM (=1), 15:8 = old memory mode, 7:0 = current memory mode.
|
||||
//uint8_t memoryMode; // The memory mode the MZ700 is currently running under, this is determined by the memory control commands from the MZ700.
|
||||
//uint8_t lockMemoryMode; // The preserved memory mode when entering the locked state.
|
||||
//uint8_t inhibit; // The inhibit flag, blocks the upper 0xD000:0xFFFF region from being accessed, affects the memoryMode temporarily.
|
||||
//uint8_t update; // Update flag, indicates to the ISR that a memory mode update is needed.
|
||||
//uint8_t b0000; // Block 0000:0FFF mode.
|
||||
//uint8_t bD000; // Block D000:FFFF mode.
|
||||
} t_mz700;
|
||||
|
||||
// Structure to maintain all MZ-80B hardware control information in oder to emulate the machine as near as possible.
|
||||
typedef struct {
|
||||
uint32_t config; // Compacted control register, 31:19 = reserved, 18 = Inhibit mode, 17 = Upper D000:FFFF is RAM (=1), 16 = Lower 0000:0FFF is RAM (=1), 15:8 = old memory mode, 7:0 = current memory mode.
|
||||
} t_mz80b;
|
||||
|
||||
// Structure to maintain all the control and management variables of the Z80 and underlying hardware so that the state of run is well known by any called method.
|
||||
//
|
||||
typedef struct {
|
||||
#ifndef __APP__
|
||||
uint32_t svcControlAddr; // Address of the service control record within the 512K static RAM bank.
|
||||
uint8_t refreshAddr; // Refresh address for times when the K64F must issue refresh cycles on the Z80 bus.
|
||||
uint8_t disableRefresh; // Disable refresh if the mainboard DRAM isnt being used.
|
||||
uint8_t runCtrlLatch; // Latch value the Z80 is running with.
|
||||
uint8_t curCtrlLatch; // Latch value set during tranZPUter access of the Z80 bus.
|
||||
uint8_t videoRAM[2][2048]; // Two video memory buffer frames, allows for storage of original frame in [0] and working frame in [1].
|
||||
uint8_t attributeRAM[2][2048]; // Two attribute memory buffer frames, allows for storage of original frame in [0] and working frame in [1].
|
||||
|
||||
enum MACHINE_TYPES hostType; // The underlying host machine, 0 = Sharp MZ-80A, 1 = MZ-700, 2 = MZ-80B
|
||||
enum MACHINE_TYPES machineMode; // Machine compatibility, 0 = Sharp MZ-80A, 1 = MZ-700, 2 = MZ-80B
|
||||
t_mz700 mz700; // MZ700 emulation control to detect IO commands and adjust the memory map accordingly.
|
||||
t_mz80b mz80b; // MZ-80B emulation control to detect IO commands and adjust the memory map and I/O forwarding accordingly.
|
||||
|
||||
uint8_t resetEvent; // A Z80_RESET event occurred, probably user pressing RESET button.
|
||||
uint8_t svcRequest; // A service request has been made by the Z80 (1).
|
||||
uint8_t sysRequest; // A system request has been made by the Z80 (1).
|
||||
uint8_t ioAddr; // Address of a Z80 IO instruction.
|
||||
uint8_t ioEvent; // Event flag to indicate that an IO instruction was captured.
|
||||
uint8_t ioData; // Data of a Z80 IO instruction.
|
||||
uint8_t memorySwap; // A memory Swap event has occurred, 0000-0FFF -> C000-CFFF (1), or C000-CFFF -> 0000-0FFF (0)
|
||||
uint8_t crtMode; // A CRT event has occurred, Normal mode (0) or Reverse Mode (1)
|
||||
uint8_t scroll; // Hardware scroll offset.
|
||||
volatile uint32_t portA; // ISR store of GPIO Port A used for signal decoding.
|
||||
volatile uint32_t portB; // ISR store of GPIO Port B used for signal decoding.
|
||||
volatile uint32_t portC; // ISR store of GPIO Port C used for signal decoding.
|
||||
volatile uint32_t portD; // ISR store of GPIO Port D used for signal decoding.
|
||||
volatile uint32_t portE; // ISR store of GPIO Port E used for signal decoding.
|
||||
#endif
|
||||
} t_z80Control;
|
||||
|
||||
// Structure to maintain higher level OS control and management variables typically used for TZFS and CPM.
|
||||
//
|
||||
typedef struct {
|
||||
uint8_t tzAutoBoot; // Autoboot the tranZPUter into TZFS mode.
|
||||
t_dirMap dirMap; // Directory map of SD filenames to Sharp MZ80A filenames.
|
||||
uint8_t *lastFile; // Last file loaded - typically used for CPM to reload itself.
|
||||
} t_osControl;
|
||||
|
||||
// Structure to contain inter CPU communications memory for command service processing and results.
|
||||
// Typically the z80 places a command into the structure in it's memory space and asserts an I/O request,
|
||||
// the K64F detects the request and reads the lower portion of the struct from z80 memory space,
|
||||
// determines the command and then either reads the remainder or writes to the remainder. This struct
|
||||
// exists in both the z80 and K64F domains and data is sync'd between them as needed.
|
||||
//
|
||||
typedef struct __attribute__((__packed__)) {
|
||||
uint8_t cmd; // Command request.
|
||||
uint8_t result; // Result code. 0xFE - set by Z80, command available, 0xFE - set by K64F, command ack and processing. 0x00-0xF0 = cmd complete and result of processing.
|
||||
union {
|
||||
uint8_t dirSector; // Virtual directory sector number.
|
||||
uint8_t fileSector; // Sector within open file to read/write.
|
||||
};
|
||||
uint16_t trackNo; // For virtual drives with track and sector this is the track number
|
||||
uint16_t sectorNo; // For virtual drives with tracl and sector this is the sector number.
|
||||
uint8_t fileNo; // File number of a file within the last directory listing to open/update.
|
||||
uint8_t fileType; // Type of file being processed.
|
||||
union {
|
||||
uint16_t loadAddr; // Load address for ROM/File images which need to be dynamic.
|
||||
uint16_t saveAddr; // Save address for ROM/File images which need to be dynamic.
|
||||
uint16_t cpuFreq; // CPU Frequency in KHz - used for setting of the alternate CPU clock frequency.
|
||||
};
|
||||
union {
|
||||
uint16_t loadSize; // Size for ROM/File to be loaded.
|
||||
uint16_t saveSize; // Size for ROM/File to be saved.
|
||||
};
|
||||
uint8_t directory[TZSVC_DIRNAME_SIZE]; // Directory in which to look for a file. If no directory is given default to MZF.
|
||||
uint8_t filename[TZSVC_FILENAME_SIZE]; // File to open or create.
|
||||
uint8_t wildcard[TZSVC_WILDCARD_SIZE]; // A basic wildcard pattern match filter to be applied to a directory search.
|
||||
uint8_t sector[TZSVC_SECTOR_SIZE]; // Sector buffer generally for disk read/write.
|
||||
} t_svcControl;
|
||||
|
||||
// Structure to define all the directory entries which are packed into a single SD sector which is used between the Z80<->K64F.
|
||||
//
|
||||
typedef struct __attribute__((__packed__)) {
|
||||
t_svcDirEnt dirEnt[TZVC_MAX_DIRENT_BLOCK]; // Fixed number of directory entries per sector/block.
|
||||
} t_svcDirBlock;
|
||||
|
||||
// Structure to hold compacted directory entries which are packed into a single SD sector which is used between the Z80<->K64F.
|
||||
//
|
||||
typedef struct __attribute__((__packed__)) {
|
||||
t_svcCmpDirEnt dirEnt[TZVC_MAX_CMPCT_DIRENT_BLOCK];// Fixed number of compacted directory entries per sector/block.
|
||||
} t_svcCmpDirBlock;
|
||||
|
||||
// Mapping table from Sharp MZ80A Ascii to real Ascii.
|
||||
//
|
||||
typedef struct {
|
||||
uint8_t asciiCode;
|
||||
} t_asciiMap;
|
||||
|
||||
// Mapping table from Ascii to Sharp MZ display code.
|
||||
//
|
||||
typedef struct {
|
||||
uint8_t dispCode;
|
||||
} t_dispCodeMap;
|
||||
|
||||
// Application execution constants.
|
||||
//
|
||||
|
||||
// Prototypes.
|
||||
//
|
||||
int mzPrintChar(char, FILE *);
|
||||
int mzGetChar(FILE *);
|
||||
|
||||
// Getter/Setter methods!
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif // SHARPMZ_H
|
||||
@@ -109,6 +109,7 @@ extern "C" {
|
||||
#define CMD_TZ_CLEAR 153 // tranZPUter memory clear tool.
|
||||
#define CMD_TZ_CLK 154 // tranZPUter secondary frequency set tool.
|
||||
#define CMD_TZ_RESET 155 // tranZPUter memory reset tool.
|
||||
#define CMD_TZ_IO 156 // tranZPUter memory IO read/write tool.
|
||||
#define CMD_BADKEY -1
|
||||
#define CMD_NOKEY 0
|
||||
#define CMD_GROUP_DISK 1
|
||||
@@ -393,6 +394,7 @@ static t_cmdstruct cmdTable[] = {
|
||||
{ "tzclear", BUILTIN_DEFAULT, CMD_TZ_CLEAR, CMD_GROUP_TZ },
|
||||
{ "tzclk", BUILTIN_DEFAULT, CMD_TZ_CLK, CMD_GROUP_TZ },
|
||||
{ "tzreset", BUILTIN_DEFAULT, CMD_TZ_RESET, CMD_GROUP_TZ },
|
||||
{ "tzio", BUILTIN_DEFAULT, CMD_TZ_IO, CMD_GROUP_TZ },
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
@@ -502,6 +504,7 @@ static t_helpstruct helpTable[] = {
|
||||
{ CMD_TZ_CLEAR, "--help", "Memory clearing tool" },
|
||||
{ CMD_TZ_CLK, "--help", "CPU Freq set tool" },
|
||||
{ CMD_TZ_RESET, "--help", "Remote reset tool" },
|
||||
{ CMD_TZ_IO, "--help", "I/O read/write tool" },
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
@@ -59,6 +59,9 @@
|
||||
#define TZMM_MZ700_2 0x0c // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is on the tranZPUter in block 6.
|
||||
#define TZMM_MZ700_3 0x0d // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 0, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is inaccessible.
|
||||
#define TZMM_MZ700_4 0x0e // MZ700 Mode - 0000:0FFF is on the tranZPUter board in block 6, 1000:CFFF is on the tranZPUter board in block 0, D000:FFFF is inaccessible.
|
||||
#define TZMM_FPGA 0x15 // Open up access for the K64F to the FPGA resources such as memory. All other access to RAM or mainboard is blocked.
|
||||
#define TZMM_TZPUM 0x16 // Everything is on mainboard, no access to tranZPUter memory.
|
||||
#define TZMM_TZPU 0x17 // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory. K64F drives A18-A16 allowing full access to RAM.
|
||||
#define TZMM_TZPU0 0x18 // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 0 is selected.
|
||||
#define TZMM_TZPU1 0x19 // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 1 is selected.
|
||||
#define TZMM_TZPU2 0x1A // Everything is in tranZPUter domain, no access to underlying Sharp mainboard unless memory management mode is switched. tranZPUter RAM 64K block 2 is selected.
|
||||
@@ -77,6 +80,9 @@
|
||||
#define IO_TZ_CLKSELRD 0x66 // Read the status of the clock select, ie. which clock is connected to the CPU.
|
||||
#define IO_TZ_SVCREQ 0x68 // Service request from the Z80 to be provided by the K64F.
|
||||
#define IO_TZ_SYSREQ 0x6A // System request from the Z80 to be provided by the K64F.
|
||||
#define IO_TZ_CPUCFG 0x6C // Version 2.2 CPU configuration register.
|
||||
#define IO_TZ_CPUSTATUS 0x6C // Version 2.2 CPU runtime status register.
|
||||
#define IO_TZ_CPUINFO 0x6D // Version 2.2 CPU information register.
|
||||
#define IO_TZ_CPLDCFG 0x6E // Version 2.1 CPLD configuration register.
|
||||
#define IO_TZ_CPLDSTATUS 0x6E // Version 2.1 CPLD status register.
|
||||
#define IO_TZ_CPLDINFO 0x6F // Version 2.1 CPLD version information register.
|
||||
@@ -89,6 +95,26 @@
|
||||
#define IO_TZ_VMBLUEMASK 0xFC // Video Module Blue bit mask (1 bit = 1 pixel, 8 pixels per byte).
|
||||
#define IO_TZ_VMPAGE 0xFD // Video Module memory page register. [1:0] switches in 1 16Kb page (3 pages) of graphics ram to C000 - FFFF. Bits [1:0] = page, 00 = off, 01 = Red, 10 = Green, 11 = Blue. This overrides all MZ700/MZ80B page switching functions. [7] 0 - normal, 1 - switches in CGROM for upload at D000:DFFF.
|
||||
|
||||
// IO register constants.
|
||||
//
|
||||
#define CPUMODE_SET_Z80 0x00 // Set the CPU to the hard Z80.
|
||||
#define CPUMODE_SET_T80 0x01 // Set the CPU to the soft T80.
|
||||
#define CPUMODE_SET_ZPU_EVO 0x02 // Set the CPU to the soft ZPU Evolution.
|
||||
#define CPUMODE_SET_AAA 0x04 // Place holder for a future soft CPU.
|
||||
#define CPUMODE_SET_BBB 0x08 // Place holder for a future soft CPU.
|
||||
#define CPUMODE_SET_CCC 0x10 // Place holder for a future soft CPU.
|
||||
#define CPUMODE_SET_DDD 0x20 // Place holder for a future soft CPU.
|
||||
#define CPUMODE_IS_Z80 0x00 // Status value to indicate if the hard Z80 available.
|
||||
#define CPUMODE_IS_T80 0x01 // Status value to indicate if the soft T80 available.
|
||||
#define CPUMODE_IS_ZPU_EVOL 0x02 // Status value to indicate if the soft ZPU Evolution available.
|
||||
#define CPUMODE_IS_AAA 0x04 // Place holder to indicate if a future soft CPU is available.
|
||||
#define CPUMODE_IS_BBB 0x08 // Place holder to indicate if a future soft CPU is available.
|
||||
#define CPUMODE_IS_CCC 0x10 // Place holder to indicate if a future soft CPU is available.
|
||||
#define CPUMODE_IS_DDD 0x20 // Place holder to indicate if a future soft CPU is available.
|
||||
#define CPUMODE_RESET_CPU 0x80 // Reset the soft CPU. Active high, when high the CPU is held in RESET, when low the CPU runs.
|
||||
#define CPUMODE_IS_SOFT_AVAIL 0x040 // Marker to indicate if the underlying FPGA can support soft CPU's.
|
||||
#define CPUMODE_IS_SOFT_MASK 0x0C0 // Mask to filter out the Soft CPU availability flags.
|
||||
|
||||
// Sharp MZ constants.
|
||||
//
|
||||
#define MZ_MROM_ADDR 0x0000 // Monitor ROM start address.
|
||||
@@ -165,6 +191,9 @@
|
||||
#define TZSVC_CMD_CPU_BASEFREQ 0x40 // Service command to switch to the mainboard frequency.
|
||||
#define TZSVC_CMD_CPU_ALTFREQ 0x41 // Service command to switch to the alternate frequency provided by the K64F.
|
||||
#define TZSVC_CMD_CPU_CHGFREQ 0x42 // Service command to set the alternate frequency in hertz.
|
||||
#define TZSVC_CMD_CPU_SETZ80 0x50 // Service command to switch to the external Z80 hard cpu.
|
||||
#define TZSVC_CMD_CPU_SETT80 0x51 // Service command to switch to the internal T80 soft cpu.
|
||||
#define TZSVC_CMD_CPU_SETZPUEVO 0x52 // Service command to switch to the internal ZPU Evolution cpu.
|
||||
#define TZSVC_CMD_EXIT 0x7F // Service command to terminate TZFS and restart the machine in original mode.
|
||||
#define TZSVC_DEFAULT_MZF_DIR "MZF" // Default directory where MZF files are stored.
|
||||
#define TZSVC_DEFAULT_CAS_DIR "CAS" // Default directory where BASIC CASsette files are stored.
|
||||
@@ -254,9 +283,9 @@
|
||||
#define CTL_HALT_PIN 26 // 51
|
||||
#define CTL_M1_PIN 3 // 20
|
||||
#define CTL_BUSRQ_PIN 2
|
||||
#define CTL_BUSACK_PIN 21
|
||||
#define CTL_MBSEL_PIN 21
|
||||
#define CTL_CLK_PIN 14
|
||||
#define CTL_CLKSLCT_PIN 32 // 47
|
||||
#define CTL_BUSACK_PIN 32 // 47
|
||||
#define TZ_BUSACK_PIN 52
|
||||
#define TZ_SVCREQ_PIN 33 // 56
|
||||
|
||||
@@ -271,8 +300,6 @@
|
||||
// Customised pin manipulation methods implemented as stripped down macros. The original had too much additional overhead with procedure call and validation tests,
|
||||
// speed is of the essence for this project as pins change mode and value constantly.
|
||||
//
|
||||
// Studying the Teensyduino code these macros could be stripped down further and go direct to the BITBAND registers if more speed is needed.
|
||||
//
|
||||
#define STR(x) #x
|
||||
#define XSTR(s) STR(s)
|
||||
#define pinLow(a) *portClearRegister(pinMap[a]) = 1
|
||||
@@ -283,10 +310,10 @@
|
||||
#define pinOutput(a) { *portModeRegister(pinMap[a]) = 1;\
|
||||
*ioPin[a] = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);\
|
||||
*ioPin[a] &= ~PORT_PCR_ODE; }
|
||||
#define pinOutputSet(a,b) { *portModeRegister(pinMap[a]) = 1;\
|
||||
#define pinOutputSet(a,b) { if(b) { *portSetRegister(pinMap[a]) = 1; } else { *portClearRegister(pinMap[a]) = 1; }\
|
||||
*portModeRegister(pinMap[a]) = 1;\
|
||||
*ioPin[a] = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);\
|
||||
*ioPin[a] &= ~PORT_PCR_ODE;\
|
||||
if(b) { *portSetRegister(pinMap[a]) = 1; } else { *portClearRegister(pinMap[a]) = 1; } }
|
||||
*ioPin[a] &= ~PORT_PCR_ODE; }
|
||||
#define installIRQ(a, mask) { uint32_t cfg;\
|
||||
cfg = *ioPin[a];\
|
||||
cfg &= ~0x000F0000;\
|
||||
@@ -300,26 +327,31 @@
|
||||
#define pinIndex(a) getPinIndex(pinMap[a])
|
||||
|
||||
#define setZ80Data(a) { GPIOB_PDOR = (GPIOB_PDOR & 0xff00ffff) | ((a << 16) & 0x00ff0000); }
|
||||
#define setZ80Addr(a) { GPIOC_PDOR = (GPIOC_PDOR & 0xffff0000) | (a & 0x0000ffff); }
|
||||
#define setZ80DataAsOutput() { GPIOB_PDDR = (GPIOB_PDDR & 0x0000ffff) | 0x00ff0000; }
|
||||
#define setZ80DataAsInput() { GPIOB_PDDR = (GPIOB_PDDR & 0x0000ffff); }
|
||||
#define setZ80Addr(a) { GPIOC_PDOR = (GPIOC_PDOR & 0xfff80000) | (a & 0x0007ffff); }
|
||||
#define setZ80AddrAsOutput() { GPIOC_PDDR = 0x0007ffff; }
|
||||
#define setZ80AddrAsInput() { GPIOC_PDDR = 0x00000000; }
|
||||
#define setZ80AddrLower(a) { GPIOC_PDOR = (GPIOC_PDOR & 0xffffff00) | (a & 0x000000ff); }
|
||||
#define setZ80RefreshAddr(a) { GPIOC_PDOR = (GPIOC_PDOR & 0xffffff80) | (a & 0x0000007f); }
|
||||
#define readZ80AddrLower() ( GPIOC_PDIR & 0x000000ff )
|
||||
#define readZ80Addr() ( (GPIOC_PDIR & 0x0000ffff) )
|
||||
#define readZ80DataBus() ( (GPIOB_PDIR >> 16) & 0x000000ff )
|
||||
#define readCtrlLatch() ( ((GPIOB_PDIR & 0x00000200) >> 5) | (GPIOB_PDIR & 0x0000000f) )
|
||||
#define writeCtrlLatch(a) { writeZ80IO(IO_TZ_CTRLLATCH, a); }
|
||||
#define setZ80Direction(a) { for(uint8_t idx=Z80_D0; idx <= Z80_D7; idx++) { if(a == WRITE) { pinOutput(idx); } else { pinInput(idx); } }; z80Control.busDir = a; }
|
||||
#define writeCtrlLatch(a) { outZ80IO(IO_TZ_CTRLLATCH, a); }
|
||||
//#define setZ80Direction(a) { for(uint8_t idx=Z80_D0; idx <= Z80_D7; idx++) { if(a == WRITE) { pinOutput(idx); } else { pinInput(idx); } }; z80Control.busDir = a; }
|
||||
#define setZ80Direction(a) {{ if(a == WRITE) { setZ80DataAsOutput(); } else { setZ80DataAsInput(); } }; z80Control.busDir = a; }
|
||||
#define reqZ80BusChange(a) { if(a == MAINBOARD_ACCESS && z80Control.ctrlMode == TRANZPUTER_ACCESS) \
|
||||
{\
|
||||
pinHigh(CTL_BUSACK);\
|
||||
pinHigh(CTL_MBSEL);\
|
||||
z80Control.ctrlMode = MAINBOARD_ACCESS;\
|
||||
z80Control.curCtrlLatch = TZMM_ORIG | TZMM_ENIOWAIT;\
|
||||
writeCtrlLatch(z80Control.curCtrlLatch);\
|
||||
} else if(a == TRANZPUTER_ACCESS && z80Control.ctrlMode == MAINBOARD_ACCESS)\
|
||||
{\
|
||||
pinLow(CTL_BUSACK);\
|
||||
pinLow(CTL_MBSEL);\
|
||||
z80Control.ctrlMode = TRANZPUTER_ACCESS;\
|
||||
z80Control.curCtrlLatch = TZMM_TZPU7 | TZMM_ENIOWAIT;\
|
||||
z80Control.curCtrlLatch = TZMM_TZPU | TZMM_ENIOWAIT;\
|
||||
writeCtrlLatch(z80Control.curCtrlLatch);\
|
||||
} }
|
||||
// Lower level macro without pin mapping as this is called in the ResetHandler to halt the Z80 whilst the K64F starts up and is able to load up tranZPUter software.
|
||||
@@ -387,13 +419,13 @@ enum pinIdxToPinNumMap {
|
||||
TZ_BUSACK = 42,
|
||||
TZ_SVCREQ = 43,
|
||||
|
||||
CTL_BUSACK = 44,
|
||||
CTL_MBSEL = 44,
|
||||
CTL_BUSRQ = 45,
|
||||
CTL_RFSH = 46,
|
||||
CTL_HALT = 47,
|
||||
CTL_M1 = 48,
|
||||
CTL_CLK = 49,
|
||||
CTL_CLKSLCT = 50
|
||||
CTL_BUSACK = 50
|
||||
};
|
||||
|
||||
// Possible control modes that the K64F can be in, do nothing where the Z80 runs normally, control the Z80 and mainboard, or control the Z80 and tranZPUter.
|
||||
@@ -403,6 +435,13 @@ enum CTRL_MODE {
|
||||
MAINBOARD_ACCESS = 2
|
||||
};
|
||||
|
||||
// Possible targets the K64F can read from/write to.
|
||||
enum TARGETS {
|
||||
MAINBOARD = 0,
|
||||
TRANZPUTER = 1,
|
||||
FPGA = 2
|
||||
};
|
||||
|
||||
// Possible bus directions that the K64F can setup for controlling the Z80.
|
||||
enum BUS_DIRECTION {
|
||||
READ = 0,
|
||||
@@ -645,28 +684,30 @@ void setupZ80Pins(uint8_t, volatile uint32_t *);
|
||||
void resetZ80(uint8_t);
|
||||
uint8_t reqZ80Bus(uint32_t);
|
||||
uint8_t reqMainboardBus(uint32_t);
|
||||
uint8_t reqTranZPUterBus(uint32_t);
|
||||
uint8_t reqTranZPUterBus(uint32_t, enum TARGETS);
|
||||
void setupSignalsForZ80Access(enum BUS_DIRECTION);
|
||||
void releaseZ80(void);
|
||||
void refreshZ80(void);
|
||||
void setCtrlLatch(uint8_t);
|
||||
uint32_t setZ80CPUFrequency(float, uint8_t);
|
||||
uint8_t copyFromZ80(uint8_t *, uint32_t, uint32_t, uint8_t);
|
||||
uint8_t copyToZ80(uint32_t, uint8_t *, uint32_t, uint8_t);
|
||||
uint8_t writeZ80Memory(uint16_t, uint8_t);
|
||||
uint8_t readZ80Memory(uint16_t);
|
||||
uint8_t writeZ80IO(uint16_t, uint8_t);
|
||||
uint8_t readZ80IO(uint16_t);
|
||||
void fillZ80Memory(uint32_t, uint32_t, uint8_t, uint8_t);
|
||||
uint8_t copyFromZ80(uint8_t *, uint32_t, uint32_t, enum TARGETS);
|
||||
uint8_t copyToZ80(uint32_t, uint8_t *, uint32_t, enum TARGETS);
|
||||
uint8_t writeZ80Memory(uint32_t, uint8_t);
|
||||
uint8_t readZ80Memory(uint32_t);
|
||||
uint8_t outZ80IO(uint32_t, uint8_t);
|
||||
uint8_t inZ80IO(uint32_t);
|
||||
uint8_t writeZ80IO(uint32_t, uint8_t, enum TARGETS);
|
||||
uint8_t readZ80IO(uint32_t, enum TARGETS);
|
||||
void fillZ80Memory(uint32_t, uint32_t, uint8_t, enum TARGETS);
|
||||
void captureVideoFrame(enum VIDEO_FRAMES, uint8_t);
|
||||
void refreshVideoFrame(enum VIDEO_FRAMES, uint8_t, uint8_t);
|
||||
FRESULT loadVideoFrameBuffer(char *, enum VIDEO_FRAMES);
|
||||
FRESULT saveVideoFrameBuffer(char *, enum VIDEO_FRAMES);
|
||||
char *getVideoFrame(enum VIDEO_FRAMES);
|
||||
char *getAttributeFrame(enum VIDEO_FRAMES);
|
||||
FRESULT loadZ80Memory(const char *, uint32_t, uint32_t, uint32_t, uint32_t *, uint8_t, uint8_t);
|
||||
FRESULT saveZ80Memory(const char *, uint32_t, uint32_t, t_svcDirEnt *, uint8_t);
|
||||
FRESULT loadMZFZ80Memory(const char *, uint32_t, uint32_t *, uint8_t, uint8_t);
|
||||
FRESULT loadZ80Memory(const char *, uint32_t, uint32_t, uint32_t, uint32_t *, enum TARGETS, uint8_t);
|
||||
FRESULT saveZ80Memory(const char *, uint32_t, uint32_t, t_svcDirEnt *, enum TARGETS);
|
||||
FRESULT loadMZFZ80Memory(const char *, uint32_t, uint32_t *, enum TARGETS, uint8_t);
|
||||
|
||||
// Getter/Setter methods!
|
||||
uint8_t isZ80Reset(void);
|
||||
@@ -701,7 +742,7 @@ void setHost(void);
|
||||
void setupTranZPUter(void);
|
||||
|
||||
#if defined __APP__
|
||||
int memoryDumpZ80(uint32_t, uint32_t, uint32_t, uint8_t, uint8_t);
|
||||
int memoryDumpZ80(uint32_t, uint32_t, uint32_t, uint8_t, enum TARGETS);
|
||||
#endif
|
||||
|
||||
// Debug methods.
|
||||
|
||||
Reference in New Issue
Block a user