Files
u-boot/drivers/clk
Patrice Chotard e8fb9ed254 clk: clk_stm32f: Configure SAI PLL to generate LTDC pixel clock
Configure SAI PLL configuration to generate LTDC pixel clock on
the PLLSAIR output.

PLLSAI is enabled only if CONFIG_VIDEO_STM32 flag is set.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
..
2017-06-01 07:03:01 -06:00
2017-06-01 07:03:01 -06:00
2018-01-28 17:12:36 +01:00