maxims@google.com defb184904 aspeed: Refactor SCU to use consistent mask & shift ...

Refactor SCU header to use consistent Mask & Shift values.
Now, consistently, to read value from SCU register, mask needs
to be applied before shift.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

2017-05-08 11:57:35 -04:00

..

arc

board_f: Rename initdram() to dram_init()

2017-04-13 09:40:57 -04:00

arm

aspeed: Refactor SCU to use consistent mask & shift

2017-05-08 11:57:35 -04:00

avr32

Remove various unused interrupt related code

2017-04-06 20:42:18 -04:00

m68k

spi: Zap cf_qspi driver and related code

2017-01-15 18:29:04 +01:00

microblaze

spl: make image arg or fdt blob address reconfigurable

2017-05-08 11:38:40 -04:00

mips

board_f: Rename initdram() to dram_init()

2017-04-13 09:40:57 -04:00

nds32

Remove various unused interrupt related code

2017-04-06 20:42:18 -04:00

nios2

fdt: Move fdt_fixup_ethernet to a common place

2017-05-01 09:11:59 -04:00

powerpc

spl: make image arg or fdt blob address reconfigurable

2017-05-08 11:38:40 -04:00

sandbox

dm: Simple Watchdog uclass

2017-05-08 11:57:30 -04:00

sh

sh: generate position independent code for all platforms

2016-12-02 21:32:54 -05:00

x86

fs: Kconfig: Add a separate config for FS_CBFS

2017-04-30 13:40:57 -04:00

xtensa

board_f: Rename initdram() to dram_init()

2017-04-13 09:40:57 -04:00

.gitignore

…

Kconfig

OpenRISC: Remove

2017-04-05 13:52:34 -04:00