Files
u-boot/arch/arm/include/asm
Stefan Agner 52c2c97e7c ARM: vf610: ddrmc: fix initialization completion detection
The CR80 register has multiple interrupt bits, the code is supposed
to check bit 8 but instead uses a logical and. In most cases this
probably did not affect real operations since at that stage typically
none of the other bits are set.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2019-01-09 16:27:23 +01:00
..
2018-07-26 13:15:30 -07:00
2018-05-07 15:53:29 -04:00
2018-09-25 21:49:18 -04:00
2018-01-19 15:49:26 -05:00