u-boot

eaw/u-boot

Files

Thierry Reding bca7910b7d ARM: tegra: Fix mux type for disp1 and disp2 clocks on Tegra210

On Tegra210 the parents for the disp1 and disp2 clocks are slightly
different from earlier chips. Only pll_p, pll_d_out0, pll_d2_out0 and
clk_m are valid parents (technically pll_d_out is as well, but U-Boot
doesn't know anything about it). Fix up the type name and the mux
definition.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

2019-06-05 09:16:32 -07:00

arc

CONFIG_SPL_SYS_[DI]CACHE_OFF: add

2019-05-18 08:15:35 -04:00

arm

ARM: tegra: Fix mux type for disp1 and disp2 clocks on Tegra210

2019-06-05 09:16:32 -07:00

m68k

m68k: add dspi chip-select support

2019-05-24 08:11:59 -04:00

microblaze

spl: fix linker size check off-by-one errors