Vikas Manocha b5be8f5ea8 stm32f7: clk: remove usart1 clock enable from board init ...

Before clock driver availability it was required to enable usart1 clock
for serial init but now with clock driver is taking care of usart1 clock.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>

2017-03-17 14:15:14 -04:00

..

aspeed

aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation

2017-02-08 15:56:30 -05:00

at91

dm: core: Replace of_offset with accessor

2017-02-08 06:12:14 -07:00

exynos

clk: convert API to match reset/mailbox style

2016-06-19 17:05:55 -06:00

rockchip

rockchip: clk: Support setting ACLK

2016-11-25 17:59:31 -07:00

tegra

clock: implement a driver for the Tegra CAR

2016-09-27 09:11:02 -07:00

uniphier

clk: uniphier: fix compatible strings for Pro5, PXs2, LD20 SD clock

2017-01-29 20:59:08 +09:00

clk_boston.c

clk: boston: Providea simple driver for Boston board clocks

2016-09-21 15:04:32 +02:00

clk_fixed_rate.c

dm: core: Replace of_offset with accessor

2017-02-08 06:12:14 -07:00

clk_pic32.c

dm: core: Replace of_offset with accessor

2017-02-08 06:12:14 -07:00

clk_sandbox_test.c

clk: convert API to match reset/mailbox style

2016-06-19 17:05:55 -06:00

clk_sandbox.c

clk: sandbox: don't check clk ID against 0

2016-06-24 17:24:35 -04:00

clk_stm32f7.c

stm32f7: clk: remove usart1 clock enable from board init

2017-03-17 14:15:14 -04:00

clk_zynq.c

clk: zynq: Add optional ethernet emio clock source support

2017-02-17 10:22:46 +01:00

clk_zynqmp.c

clk: zynqmp: Add clock driver support for zynqmp

2017-01-10 10:18:12 +01:00

clk-uclass.c

dm: core: Replace of_offset with accessor

2017-02-08 06:12:14 -07:00

Kconfig

clk: zynq: Add zynq clock framework driver

2017-02-17 10:22:46 +01:00

Makefile

clk: stm32f7: add clock driver for stm32f7 family

2017-03-17 14:15:12 -04:00