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Andy Yan afe18f205e rockchip: px5: enable spl-fifo-mode for emmc for px5-evb 
We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
..
arc
common: Move enable/disable_interrupts out of common.h
2019-12-02 18:25:01 -05:00
arm
rockchip: px5: enable spl-fifo-mode for emmc for px5-evb
2019-12-05 23:53:07 +08:00
m68k
common: Move trap_init() out of common.h
2019-12-02 18:25:25 -05:00
microblaze
common: Move enable/disable_interrupts out of common.h
2019-12-02 18:25:01 -05:00
mips
Merge branch '2019-12-02-master-imports'
2019-12-02 22:05:35 -05:00
nds32
common: Move enable/disable_interrupts out of common.h
2019-12-02 18:25:01 -05:00
nios2
common: Move enable/disable_interrupts out of common.h
2019-12-02 18:25:01 -05:00
powerpc
common: Move some board functions out of common.h
2019-12-02 18:25:21 -05:00
riscv
common: Move board_get_usable_ram_top() out of common.h
2019-12-02 18:25:04 -05:00
sandbox
common: Move command functions out of common.h
2019-12-02 18:25:02 -05:00
sh
common: Move enable/disable_interrupts out of common.h
2019-12-02 18:25:01 -05:00
x86
common: Move board_get_usable_ram_top() out of common.h
2019-12-02 18:25:04 -05:00
xtensa
common: Move interrupt functions into a new header
2019-12-02 18:25:00 -05:00
.gitignore
…
Kconfig
sh: r2dplus: Enable OF control
2019-09-02 17:38:43 +02:00