Sricharan R f9b814a8e9 ARM: DRA7xx: Correct the SYS_CLK to 20MHZ ...

The sys_clk on the dra evm board is 20MHZ.
Changing the configuration for the same.
And also moving V_SCLK, V_OSCK defines to
arch/clock.h for OMAP4+ boards.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

2013-06-10 08:43:10 -04:00

..

clock.h

ARM: DRA7xx: Correct the SYS_CLK to 20MHZ

2013-06-10 08:43:10 -04:00

cpu.h

ARM: OMAP4+: Cleanup header files

2013-06-10 08:43:09 -04:00

ehci.h

ehci-omap: Clean up added ehci-omap.c

2012-02-12 10:11:31 +01:00

gpio.h

omap: fix gpio related build breaks

2011-09-04 11:33:36 +02:00

i2c.h

omap4 i2c: add support for i2c bus 4

2012-09-06 06:01:09 +02:00

mmc_host_def.h

omap: consolidate common mmc definitions

2013-03-08 16:41:12 -05:00

mux_omap4.h

omap4+: Avoid using __attribute__ ((__packed__))

2012-05-15 08:31:26 +02:00

omap.h

ARM: OMAP4+: Cleanup header files

2013-06-10 08:43:09 -04:00

spl.h

OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMC

2013-04-08 11:29:34 -04:00

sys_proto.h

ARM: DRA7xx: power Add support for tps659038 PMIC

2013-06-10 08:43:09 -04:00