Files
u-boot/drivers/clk
Michal Simek 58afff43e3 clk: zynq: Show watchdog clock rate properly
watchdog clock is also connected to cpu 1X clocksource.

Zynq> clk dump
...

Before:
      swdt          4294967290
After:
      swdt           111111110

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
..
2017-06-01 07:03:01 -06:00
2017-06-01 07:03:01 -06:00
2018-01-28 17:12:36 +01:00
2018-03-19 16:14:22 -04:00
2018-03-19 16:14:22 -04:00