Takahiro Kuwano a4aa9b7522 mtd: spi-nor-core: Add support for volatile QE bit ...

Some of Spansion/Cypress chips support volatile version of configuration
registers and it is recommended to update volatile registers in the field
application due to a risk of the non-volatile registers corruption by
power interrupt. This patch adds a function to set Quad Enable bit in CFR1
volatile.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

2021-06-29 19:16:54 +05:30

..

fsl_espi_spl.c

common: Move hang() to the same header as panic()

2020-01-17 17:53:40 -05:00

Kconfig

mtd: spi-nor-core: Allow using Micron mt35xu512aba in Octal DTR mode

2021-06-28 12:06:57 +05:30

Makefile

spi: Allow separate control of SPI_FLASH_TINY for SPL/TPL

2020-08-03 22:19:54 -04:00

sandbox.c

dm: Avoid accessing seq directly

2020-12-18 20:32:21 -07:00

sf_dataflash.c

dm: treewide: Rename auto_alloc_size members to be shorter

2020-12-13 08:00:25 -07:00

sf_internal.h

mtd: spi-nor-core: Add support for DTR protocol

2021-06-28 12:00:32 +05:30

sf_mtd.c

mtd: spi-nor: fill-in mtd->dev member

2021-06-24 11:53:50 +05:30

sf_probe.c

mtd: spi-nor-core: Perform a Soft Reset on shutdown

2021-06-28 12:04:53 +05:30

sf-uclass.c

sf: Support querying write-protect

2021-03-27 15:04:31 +13:00

spi-nor-core.c

mtd: spi-nor-core: Add support for volatile QE bit

2021-06-29 19:16:54 +05:30

spi-nor-ids.c

mtd: spi-nor-ids: Add Cypress s25hl-t/s25hs-t

2021-06-29 19:16:54 +05:30

spi-nor-tiny.c

mtd: spi-nor-core: Add a ->setup() hook

2021-06-28 11:58:10 +05:30