Aneesh V 882f80b993 armv7: stronger barrier for cache-maintenance operations ...

set-way operations need a DSB after them to ensure the
operation is complete. DMB may not be enough. Use DSB
after all operations instead of DMB.

Signed-off-by: Aneesh V <aneesh@ti.com>

2011-09-04 11:36:16 +02:00

..

arm

armv7: stronger barrier for cache-maintenance operations

2011-09-04 11:36:16 +02:00

avr32

Unify timer_init() and cpu_init() prototypes

2011-08-01 15:10:15 +02:00

blackfin

Merge branch 'master' of git://git.denx.de/u-boot-blackfin

2011-08-02 21:46:53 +02:00

m68k

cleanup: Fix typos and misspellings in various files.

2011-07-28 21:27:36 +02:00

microblaze

unify version_string

2011-07-28 17:22:53 +02:00

mips

MIPS: make cache operation mode configurable

2011-07-31 23:26:41 +09:00

nios2

unify version_string

2011-07-28 17:22:53 +02:00

powerpc

Convert ISO-8859 files to UTF-8

2011-08-04 23:34:02 +02:00

sh

sh: add calling mmc_initialize in board.c

2011-08-22 13:16:09 +09:00

sparc

Convert ISO-8859 files to UTF-8

2011-08-04 23:34:02 +02:00

x86

Convert ISO-8859 files to UTF-8

2011-08-04 23:34:02 +02:00

.gitignore

update include/asm/ gitignore after move

2010-05-07 00:17:30 +02:00