Simon Glass 7e4a6ae62c x86: Move common PCH code into a common place ...

The SATA indexed register write functions are common to several Intel PCHs.
Move this into a common location.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

2016-03-17 10:27:27 +08:00

..

arc

arc: cache - utilize IO coherency (AKA IOC) engine

2016-02-20 11:20:05 +03:00

arm

arm: Add a 64-bit division routine to the private library

2016-03-17 10:27:27 +08:00

avr32

avr32: Use the generic bitops headers

2015-11-05 10:52:31 -05:00

blackfin

Use correct spelling of "U-Boot"

2016-02-06 12:00:59 +01:00

m68k

m68k: M54418TWR: drop board/freescale/m54418twr/config.mk

2016-01-20 10:19:34 -05:00

microblaze

Kconfig: Move CONFIG_FIT and related options to Kconfig

2016-03-14 19:18:07 -04:00

mips

MIPS: fix mips_cache fallback without __builtin_mips_cache

2016-03-09 11:00:40 +01:00

nds32

Use correct spelling of "U-Boot"

2016-02-06 12:00:59 +01:00

nios2

dm: Use uclass_first_device_err() where it is useful

2016-03-14 15:34:50 -06:00

openrisc

openrisc: Fix build errors

2016-01-25 10:40:01 -05:00

powerpc

Kconfig: Move CONFIG_FIT and related options to Kconfig

2016-03-14 19:18:07 -04:00

sandbox

sandbox: Fix building with LLVM

2016-03-08 15:01:46 -05:00

sh

Add more SPDX-License-Identifier tags

2016-01-19 08:31:21 -05:00

sparc

Use correct spelling of "U-Boot"

2016-02-06 12:00:59 +01:00

x86

x86: Move common PCH code into a common place

2016-03-17 10:27:27 +08:00

.gitignore

…

Kconfig

MIPS: add initial infrastructure for device-tree files

2016-01-16 21:06:45 +01:00