Simon Glass 4ff3591988 x86: Correct handling of MADT table CPUs ...

At present if hyperthreading is disabled the CPU numbering is not
sequential. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>

2020-09-25 11:27:23 +08:00

..

arc

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

2020-08-06 14:26:35 -04:00

arm

binman: sunxi: Add help message for missing sunxi ATF BL31

2020-09-22 12:54:13 -06:00

m68k

board_f: m68k: Factor out m68k-specific bdinfo setup

2020-08-06 14:26:35 -04:00

microblaze

efi_loader: use CONFIG_STACK_SIZE in the UEFI sub-system

2020-08-01 11:58:23 +02:00

mips

global: Move from bi_memstart/memsize -> gd->ram_base/ram_size

2020-08-26 09:19:34 +02:00

nds32

treewide: convert bd_t to struct bd_info by coccinelle

2020-07-17 09:30:13 -04:00

nios2

cpu: Convert the methods to use a const udevice *

2020-07-25 14:46:57 -06:00

powerpc

board/freescale: Remove P5020DS board support

2020-09-24 08:27:44 -04:00

riscv

fdtdec: optionally add property no-map to created reserved memory node

2020-09-22 12:54:13 -06:00

sandbox

pci: pci-uclass: Add multi entry support for memory regions

2020-08-25 08:01:16 +02:00

sh

sh: r2dplus: Add SCIF1 to the basic DT

2020-08-02 19:58:27 +02:00

x86

x86: Correct handling of MADT table CPUs

2020-09-25 11:27:23 +08:00

xtensa

xtensa: Remove arch_setup_bdinfo()

2020-08-26 09:19:40 +02:00

.gitignore

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Kconfig

arc: Kconfig: Add missing DM dependency

2020-08-27 11:26:58 -04:00

u-boot-elf.lds

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