Hou Zhiqiang 3fbe8f0f44 armv8: fsl-layerscpae: correct the PCIe controllers' region size ...

The LS2080A has 8GB region for each PCIe controller, while the
other platforms have 32GB.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

2019-05-22 12:24:24 +05:30

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arc

CONFIG_SPL_SYS_[DI]CACHE_OFF: add

2019-05-18 08:15:35 -04:00

arm

armv8: fsl-layerscpae: correct the PCIe controllers' region size

2019-05-22 12:24:24 +05:30

m68k

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microblaze

spl: fix linker size check off-by-one errors

2019-05-05 08:48:50 -04:00

mips

net: mscc: ocelot: Update DTS for Luton pcb90

2019-05-03 16:46:36 +02:00

nds32

CONFIG_SPL_SYS_[DI]CACHE_OFF: add

2019-05-18 08:15:35 -04:00

nios2

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powerpc

mpc83xx: Add gazerbeam board

2019-05-21 08:03:38 +02:00

riscv

CONFIG_SPL_SYS_[DI]CACHE_OFF: add

2019-05-18 08:15:35 -04:00

sandbox

Merge tag 'pull-24apr19' of git://git.denx.de/u-boot-dm

2019-04-24 12:27:29 -04:00

sh

sh: sh3: Remove CPU support

2019-05-10 22:43:18 +02:00

x86

x86: coreboot: make it possible to process unhandled tags

2019-05-19 16:17:33 +08:00

xtensa

CONFIG_SPL_SYS_[DI]CACHE_OFF: add

2019-05-18 08:15:35 -04:00

.gitignore

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Kconfig

Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip

2019-05-09 12:36:17 -04:00