Files
u-boot/drivers/clk
Kever Yang 1960b01034 rockchip: clock: rk3036: some fix according TRM
- hclk/pclk_div range should use '<=' instead of '<'
- use GPLL for pd_bus clock source
- pd_bus HCLK/PCLK clock rate should not bigger than ACLK

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:20 -06:00
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2017-06-01 07:03:01 -06:00
2017-06-01 07:03:01 -06:00
2017-05-10 16:16:09 +02:00
2017-05-10 16:16:09 +02:00