Files
u-boot/arch
Troy Kisky d5b069ecb4 DaVinci: fix ddr2 vtp i/o calibration
Previously, only the low 5 bits (NCH) were being transfered
from DDRVTPR to DDRVTPIOCR, the bits 5-9 where zeroed.

VTP_RECAL should be bit 15, not 18.

The only mainline board affected by this change is davinci_sonata.
The other Davinci boards define CONFIG_SKIP_LOWLEVEL_INIT.

However, if the program that loads u-boot on these boards
copied the code from u-boot, they will need fixed as well.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

Please get tested by acks before applying, where tested by
means an overnight memory test.

Thanks
Troy
2012-07-07 14:07:22 +02:00
..
2012-07-07 14:07:22 +02:00
2012-06-04 09:21:34 +02:00
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2012-05-15 17:32:05 -05:00
2012-06-07 23:29:19 +02:00
2012-05-15 17:32:05 -05:00