Wolfgang Denk 66356b4c06 WS cleanup: remove trailing empty lines ...

Signed-off-by: Wolfgang Denk <wd@denx.de>

2021-09-30 08:08:56 -04:00

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ACEX1K.c

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altera.c

fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox

2020-10-09 17:53:12 +08:00

cyclon2.c

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fpga.c

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intel_sdm_mb.c

arm: socfpga: soc64: Add ATF support for FPGA reconfig driver

2021-01-15 17:48:37 +08:00

ivm_core.c

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Kconfig

arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64

2021-03-08 10:59:10 +08:00

lattice.c

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Makefile

fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox

2020-10-09 17:53:12 +08:00

socfpga_arria10.c

image: Adjust the workings of fit_check_format()

2021-02-15 22:31:52 -05:00

socfpga_gen5.c

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socfpga.c

WS cleanup: remove trailing empty lines

2021-09-30 08:08:56 -04:00

spartan2.c

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spartan3.c

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stratixII.c

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stratixv.c

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versalpl.c

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virtex2.c

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xilinx.c

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zynqmppl.c

common: Drop asm/global_data.h from common header

2021-02-02 15:33:42 -05:00

zynqpl.c

fpga: zynqpl: fix buffer alignment

2021-02-23 14:56:55 +01:00