Files
u-boot/arch
Peng Fan 0e81982de0 imx: mx6: fix mmdc ch0 clk for 6SL
>From RM, per_periph2_clk_sel option3 is:
"derive clock from 198MHz clock (divided 392MHz PLL2 PFD)."

So fix it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-12-16 11:38:24 +01:00
..
2016-12-16 11:38:24 +01:00
2016-10-19 09:01:53 +02:00
2016-10-19 09:01:53 +02:00
2016-09-29 15:38:10 +08:00
2016-10-19 09:01:53 +02:00
2016-10-19 09:01:53 +02:00
2016-10-19 09:01:53 +02:00