eaw/u-boot
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

mpc83xx: Get rid of CONFIG_83XX_CLKIN

Browse Source 
MPC83xx uses CONFIG_83XX_CLKIN instead of CONFIG_SYS_CLK_FREQ to set the
system clock. To migrate the architecture, we can replace
CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ.

To do this
* replace all occurrences of CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ
* set CONFIG_SYS_CLK_FREQ to the old value of CONFIG_83XX_CLKIN in all
  MPC83xx config files

Signed-off-by: Mario Six <mario.six@gdsys.cc>
This commit is contained in:
Mario Six
2019-01-21 09:17:53 +01:00
parent 0f06f57c28
commit ff3bb0c435
74 changed files with 119 additions and 208 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
include/configs/MPC8308RDB.h
View File

@@ -27,12 +27,6 @@
#define CONFIG_TSEC1
#define CONFIG_VSC7385_ENET
/*
* System Clock Setup
*/
#define CONFIG_83XX_CLKIN 33333333 /* in Hz */
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
/*
* Hardware Reset Configuration Word
* if CLKIN is 66.66MHz, then

17
include/configs/MPC8313ERDB_NAND.h
View File

@@ -54,16 +54,6 @@
#define CONFIG_VSC7385_ENET
#define CONFIG_TSEC2
#ifdef CONFIG_SYS_66MHZ
#define CONFIG_83XX_CLKIN 66666667 /* in Hz */
#elif defined(CONFIG_SYS_33MHZ)
#define CONFIG_83XX_CLKIN 33333333 /* in Hz */
#else
#error Unknown oscillator frequency.
#endif
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
#define CONFIG_SYS_IMMR 0xE0000000
#if !defined(CONFIG_SPL_BUILD)
@@ -445,9 +435,6 @@
HRCWL_DDR_TO_SCB_CLK_2X1 |\
HRCWL_CSB_TO_CLKIN_2X1 |\
HRCWL_CORE_TO_CSB_2X1)
#define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 2)
#elif defined(CONFIG_SYS_33MHZ)
/* 33MHz IN, 165MHz CSB, 330 DDR, 330 CORE */
@@ -459,9 +446,6 @@
HRCWL_DDR_TO_SCB_CLK_2X1 |\
HRCWL_CSB_TO_CLKIN_5X1 |\
HRCWL_CORE_TO_CSB_2X1)
#define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 5)
#endif
#define CONFIG_SYS_HRCW_HIGH_BASE (\
@@ -478,6 +462,7 @@
HRCWH_FROM_0XFFF00100 |\
HRCWH_ROM_LOC_NAND_SP_8BIT |\
HRCWH_RL_EXT_NAND)
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
/* System IO Config */
#define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */

15
include/configs/MPC8313ERDB_NOR.h
View File

@@ -30,16 +30,6 @@
#define CONFIG_VSC7385_ENET
#define CONFIG_TSEC2
#ifdef CONFIG_SYS_66MHZ
#define CONFIG_83XX_CLKIN 66666667 /* in Hz */
#elif defined(CONFIG_SYS_33MHZ)
#define CONFIG_83XX_CLKIN 33333333 /* in Hz */
#else
#error Unknown oscillator frequency.
#endif
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
#define CONFIG_SYS_IMMR 0xE0000000
#define CONFIG_SYS_MEMTEST_START 0x00001000
@@ -420,8 +410,6 @@
HRCWL_CSB_TO_CLKIN_2X1 |\
HRCWL_CORE_TO_CSB_2X1)
#define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 2)
#elif defined(CONFIG_SYS_33MHZ)
/* 33MHz IN, 165MHz CSB, 330 DDR, 330 CORE */
@@ -434,8 +422,6 @@
HRCWL_CSB_TO_CLKIN_5X1 |\
HRCWL_CORE_TO_CSB_2X1)
#define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 5)
#endif
#define CONFIG_SYS_HRCW_HIGH_BASE (\
@@ -452,6 +438,7 @@
HRCWH_FROM_0X00000100 |\
HRCWH_ROM_LOC_LOCAL_16BIT |\
HRCWH_RL_EXT_LEGACY)
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
/* System IO Config */
#define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */

6
include/configs/MPC8315ERDB.h
View File

@@ -23,12 +23,6 @@
*/
#define CONFIG_E300 1 /* E300 family */
/*
* System Clock Setup
*/
#define CONFIG_83XX_CLKIN 66666667 /* in Hz */
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
/*
* Hardware Reset Configuration Word
* if CLKIN is 66.66MHz, then

9
include/configs/MPC8323ERDB.h
View File

@@ -15,15 +15,6 @@
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_QE 1 /* Has QE */
/*
* System Clock Setup
*/
#define CONFIG_83XX_CLKIN 66666667 /* in Hz */
#ifndef CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
#endif
/*
* Hardware Reset Configuration Word
*/

13
include/configs/MPC832XEMDS.h
View File

@@ -12,19 +12,6 @@
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_QE 1 /* Has QE */
/*
* System Clock Setup
*/
#ifdef CONFIG_PCISLAVE
#define CONFIG_83XX_PCICLK 66000000 /* in HZ */
#else
#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
#endif
#ifndef CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_CLK_FREQ 66000000
#endif
/*
* Hardware Reset Configuration Word
*/

19
include/configs/MPC8349EMDS.h
View File

@@ -17,26 +17,11 @@
*/
#define CONFIG_E300 1 /* E300 Family */
#define CONFIG_PCI_66M
#ifdef CONFIG_PCI_66M
#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
#else
#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
#endif
#ifdef CONFIG_PCISLAVE
#define CONFIG_83XX_PCICLK 66666666 /* in Hz */
#endif /* CONFIG_PCISLAVE */
#ifndef CONFIG_SYS_CLK_FREQ
#ifdef CONFIG_PCI_66M
#define CONFIG_SYS_CLK_FREQ 66000000
#if CONFIG_SYS_CLK_FREQ == 66000000 || CONFIG_SYS_CLK_FREQ == 66666666
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
#else
#define CONFIG_SYS_CLK_FREQ 33000000
#elif CONFIG_SYS_CLK_FREQ == 33000000
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1
#endif
#endif
#define CONFIG_SYS_IMMR 0xE0000000

19
include/configs/MPC8349EMDS_SDRAM.h
View File

@@ -17,26 +17,11 @@
*/
#define CONFIG_E300 1 /* E300 Family */
#define CONFIG_PCI_66M
#ifdef CONFIG_PCI_66M
#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
#else
#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
#endif
#ifdef CONFIG_PCISLAVE
#define CONFIG_83XX_PCICLK 66666666 /* in Hz */
#endif /* CONFIG_PCISLAVE */
#ifndef CONFIG_SYS_CLK_FREQ
#ifdef CONFIG_PCI_66M
#define CONFIG_SYS_CLK_FREQ 66000000
#if CONFIG_SYS_CLK_FREQ == 66000000 || CONFIG_SYS_CLK_FREQ == 66666666
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
#else
#define CONFIG_SYS_CLK_FREQ 33000000
#elif CONFIG_SYS_CLK_FREQ == 33000000
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1
#endif
#endif
#define CONFIG_SYS_IMMR 0xE0000000

7
include/configs/MPC8349ITX.h
View File

@@ -391,13 +391,6 @@ boards, we say we have two, but don't display a message if we find only one. */
#endif
#define CONFIG_PCI_66M
#ifdef CONFIG_PCI_66M
#define CONFIG_83XX_CLKIN 66666666 /* in Hz */
#else
#define CONFIG_83XX_CLKIN 33333333 /* in Hz */
#endif
/* TSEC */
#ifdef CONFIG_TSEC_ENET

13
include/configs/MPC837XEMDS.h
View File

@@ -12,19 +12,6 @@
*/
#define CONFIG_E300 1 /* E300 family */
/*
* System Clock Setup
*/
#ifdef CONFIG_PCISLAVE
#define CONFIG_83XX_PCICLK 66000000 /* in HZ */
#else
#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
#endif
#ifndef CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_CLK_FREQ 66000000
#endif
/*
* Hardware Reset Configuration Word
* if CLKIN is 66MHz, then

14
include/configs/MPC837XERDB.h
View File

@@ -20,20 +20,6 @@
*/
#define CONFIG_VSC7385_ENET
/*
* System Clock Setup
*/
#ifdef CONFIG_PCISLAVE
#define CONFIG_83XX_PCICLK 66666667 /* in HZ */
#else
#define CONFIG_83XX_CLKIN 66666667 /* in Hz */
#define CONFIG_PCIE
#endif
#ifndef CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
#endif
/*
* Hardware Reset Configuration Word
*/

3
include/configs/TQM834x.h
View File

@@ -19,9 +19,6 @@
/* IMMR Base Address Register, use Freescale default: 0xff400000 */
#define CONFIG_SYS_IMMR 0xff400000
/* System clock. Primary input clock when in PCI host mode */
#define CONFIG_83XX_CLKIN 66666000 /* 66,666 MHz */
/*
* Local Bus LCRR
* LCRR: DLL bypass, Clock divider is 8

11
include/configs/caddy2.h
View File

@@ -25,22 +25,11 @@
/* Don't enable PCI2 on vme834x - it doesn't exist physically. */
#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
#define CONFIG_PCI_66M
#ifdef CONFIG_PCI_66M
#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
#else
#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
#endif
#ifndef CONFIG_SYS_CLK_FREQ
#ifdef CONFIG_PCI_66M
#define CONFIG_SYS_CLK_FREQ 66000000
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
#else
#define CONFIG_SYS_CLK_FREQ 33000000
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1
#endif
#endif
#define CONFIG_SYS_IMMR 0xE0000000

6
include/configs/hrcon.h
View File

@@ -16,12 +16,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
/*
* System Clock Setup
*/
#define CONFIG_83XX_CLKIN 33333333 /* in Hz */
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
/*
* Hardware Reset Configuration Word
* if CLKIN is 66.66MHz, then

3
include/configs/ids8313.h
View File

@@ -20,9 +20,6 @@
#define CONFIG_BOOT_RETRY_MIN 30
#define CONFIG_RESET_TO_RETRY
#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
#define CONFIG_SYS_IMMR 0xF0000000
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */

7
include/configs/kmeter1.h
View File

@@ -25,13 +25,6 @@
#include "km/keymile-common.h"
#include "km/km-powerpc.h"
/*
* System Clock Setup
*/
#define CONFIG_83XX_CLKIN 66000000
#define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000
/*
* IMMR new address
*/

6
include/configs/mpc8308_p1m.h
View File

@@ -21,12 +21,6 @@
#define CONFIG_TSEC1
#define CONFIG_TSEC2
/*
* System Clock Setup
*/
#define CONFIG_83XX_CLKIN 33333333 /* in Hz */
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
/*
* Hardware Reset Configuration Word
* if CLKIN is 66.66MHz, then

16
include/configs/sbc8349.h
View File

@@ -22,27 +22,11 @@
/* Don't enable PCI2 on sbc834x - it doesn't exist physically. */
#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
/*
* The default if PCI isn't enabled, or if no PCI clk setting is given
* is 66MHz; this is what the board defaults to when the PCI slot is
* physically empty. The board will automatically (i.e w/o jumpers)
* clock down to 33MHz if you insert a 33MHz PCI card.
*/
#ifdef CONFIG_PCI_33M
#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
#else /* 66M */
#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
#endif
#ifndef CONFIG_SYS_CLK_FREQ
#ifdef CONFIG_PCI_33M
#define CONFIG_SYS_CLK_FREQ 33000000
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1
#else /* 66M */
#define CONFIG_SYS_CLK_FREQ 66000000
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
#endif
#endif
#define CONFIG_SYS_IMMR 0xE0000000

6
include/configs/strider.h
View File

@@ -16,12 +16,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
/*
* System Clock Setup
*/
#define CONFIG_83XX_CLKIN 33333333 /* in Hz */
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
/*
* Hardware Reset Configuration Word
* if CLKIN is 66.66MHz, then

4
include/configs/ve8313.h
View File

@@ -24,10 +24,6 @@
* On-board devices
*
*/
#define CONFIG_83XX_CLKIN 32000000 /* in Hz */
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
#define CONFIG_SYS_IMMR 0xE0000000
#define CONFIG_SYS_MEMTEST_START 0x00001000

9
include/configs/vme8349.h
View File

@@ -26,21 +26,12 @@
#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
#define CONFIG_PCI_66M
#ifdef CONFIG_PCI_66M
#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
#else
#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
#endif
#ifndef CONFIG_SYS_CLK_FREQ
#ifdef CONFIG_PCI_66M
#define CONFIG_SYS_CLK_FREQ 66000000
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
#else
#define CONFIG_SYS_CLK_FREQ 33000000
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1
#endif
#endif
#define CONFIG_SYS_IMMR 0xE0000000