From 71672b784cb6b3175d3849d28eebc2f3ed3c9d3c Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Sun, 2 Aug 2020 23:09:01 -0700 Subject: [PATCH 01/13] riscv: Call spl_board_init_f() in the generic SPL board_init_f() The generic SPL version of board_init_f() should give a call to board specific codes to initialize board in the SPL phase. Signed-off-by: Bin Meng Reviewed-by: Rick Chen Reviewed-by: Pragnesh Patel Tested-by: Pragnesh Patel --- arch/riscv/include/asm/spl.h | 7 +++++++ arch/riscv/lib/spl.c | 9 +++++++++ 2 files changed, 16 insertions(+) diff --git a/arch/riscv/include/asm/spl.h b/arch/riscv/include/asm/spl.h index 45c03fb9b6..1487f2d910 100644 --- a/arch/riscv/include/asm/spl.h +++ b/arch/riscv/include/asm/spl.h @@ -28,4 +28,11 @@ enum { BOOT_DEVICE_NONE }; +/** + * spl_board_init_f() - initialize board in the SPL phase + * + * @return 0 if succeeded, -ve on error + */ +int spl_board_init_f(void); + #endif diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c index c47dcd46ce..e24ec5a46c 100644 --- a/arch/riscv/lib/spl.c +++ b/arch/riscv/lib/spl.c @@ -13,6 +13,11 @@ DECLARE_GLOBAL_DATA_PTR; +__weak int spl_board_init_f(void) +{ + return 0; +} + __weak void board_init_f(ulong dummy) { int ret; @@ -24,6 +29,10 @@ __weak void board_init_f(ulong dummy) arch_cpu_init_dm(); preloader_console_init(); + + ret = spl_board_init_f(); + if (ret) + panic("spl_board_init_f() failed: %d\n", ret); } void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) From c4295ec849b387d039719c024afb465a4ca5cedb Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Sun, 2 Aug 2020 23:09:02 -0700 Subject: [PATCH 02/13] riscv: sifive/fu540: spl: Drop our own version of board_init_f() Use the generic board_init_f() provided by the RISC-V library codes. Signed-off-by: Bin Meng Reviewed-by: Rick Chen Reviewed-by: Pragnesh Patel Tested-by: Pragnesh Patel --- board/sifive/fu540/spl.c | 19 +------------------ 1 file changed, 1 insertion(+), 18 deletions(-) diff --git a/board/sifive/fu540/spl.c b/board/sifive/fu540/spl.c index 55325cf99d..31d315d5fd 100644 --- a/board/sifive/fu540/spl.c +++ b/board/sifive/fu540/spl.c @@ -17,7 +17,7 @@ #define GEM_PHY_RESET SIFIVE_GENERIC_GPIO_NR(0, 12) -int init_clk_and_ddr(void) +int spl_board_init_f(void) { int ret; @@ -55,20 +55,3 @@ int init_clk_and_ddr(void) return 0; } - -void board_init_f(ulong dummy) -{ - int ret; - - ret = spl_early_init(); - if (ret) - panic("spl_early_init() failed: %d\n", ret); - - arch_cpu_init_dm(); - - preloader_console_init(); - - ret = init_clk_and_ddr(); - if (ret) - panic("init_clk_and_ddr() failed: %d\n", ret); -} From d6a01704b06b5ffe4b90366b15525389c54582ba Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Sun, 2 Aug 2020 23:09:03 -0700 Subject: [PATCH 03/13] riscv: sifive/fu540: spl: Rename soc_spl_init() spl_soc_init() seems to be a better name, as all SPL functions names start from the spl_ prefix. Signed-off-by: Bin Meng Reviewed-by: Rick Chen Reviewed-by: Pragnesh Patel Tested-by: Pragnesh Patel --- arch/riscv/cpu/fu540/spl.c | 2 +- arch/riscv/include/asm/arch-fu540/spl.h | 2 +- board/sifive/fu540/spl.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/cpu/fu540/spl.c b/arch/riscv/cpu/fu540/spl.c index a2034e933f..45657b7909 100644 --- a/arch/riscv/cpu/fu540/spl.c +++ b/arch/riscv/cpu/fu540/spl.c @@ -7,7 +7,7 @@ #include #include -int soc_spl_init(void) +int spl_soc_init(void) { int ret; struct udevice *dev; diff --git a/arch/riscv/include/asm/arch-fu540/spl.h b/arch/riscv/include/asm/arch-fu540/spl.h index 0c188be747..4697279f43 100644 --- a/arch/riscv/include/asm/arch-fu540/spl.h +++ b/arch/riscv/include/asm/arch-fu540/spl.h @@ -9,6 +9,6 @@ #ifndef _SPL_SIFIVE_H #define _SPL_SIFIVE_H -int soc_spl_init(void); +int spl_soc_init(void); #endif /* _SPL_SIFIVE_H */ diff --git a/board/sifive/fu540/spl.c b/board/sifive/fu540/spl.c index 31d315d5fd..135e118617 100644 --- a/board/sifive/fu540/spl.c +++ b/board/sifive/fu540/spl.c @@ -21,7 +21,7 @@ int spl_board_init_f(void) { int ret; - ret = soc_spl_init(); + ret = spl_soc_init(); if (ret) { debug("FU540 SPL init failed: %d\n", ret); return ret; From ff8e88a6d7e2497f74ebd3779eac6a9c7793950d Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Sun, 2 Aug 2020 23:09:04 -0700 Subject: [PATCH 04/13] riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC level All FU540 driver related options should be in the SoC level Kconfig. Signed-off-by: Bin Meng Reviewed-by: Rick Chen Reviewed-by: Pragnesh Patel Tested-by: Pragnesh Patel --- arch/riscv/cpu/fu540/Kconfig | 22 ++++++++++++++++++++++ board/sifive/fu540/Kconfig | 22 ---------------------- 2 files changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/riscv/cpu/fu540/Kconfig b/arch/riscv/cpu/fu540/Kconfig index 2dcad8e27f..53e19635c8 100644 --- a/arch/riscv/cpu/fu540/Kconfig +++ b/arch/riscv/cpu/fu540/Kconfig @@ -5,6 +5,9 @@ config SIFIVE_FU540 bool select ARCH_EARLY_INIT_R + select SUPPORT_SPL + select RAM + select SPL_RAM if SPL imply CPU imply CPU_RISCV imply RISCV_TIMER @@ -13,6 +16,25 @@ config SIFIVE_FU540 imply SPL_CPU_SUPPORT imply SPL_OPENSBI imply SPL_LOAD_FIT + imply SMP + imply CLK_SIFIVE + imply CLK_SIFIVE_FU540_PRCI + imply SIFIVE_SERIAL + imply MACB + imply MII + imply SPI + imply SPI_SIFIVE + imply MMC + imply MMC_SPI + imply MMC_BROKEN_CD + imply CMD_MMC + imply DM_GPIO + imply SIFIVE_GPIO + imply CMD_GPIO + imply MISC + imply SIFIVE_OTP + imply DM_PWM + imply PWM_SIFIVE if ENV_IS_IN_SPI_FLASH diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig index f3217f62c4..fc281209eb 100644 --- a/board/sifive/fu540/Kconfig +++ b/board/sifive/fu540/Kconfig @@ -26,10 +26,7 @@ config SPL_OPENSBI_LOAD_ADDR config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select SIFIVE_FU540 - select SUPPORT_SPL select ENV_IS_IN_SPI_FLASH - select RAM - select SPL_RAM if SPL imply CMD_DHCP imply CMD_EXT2 imply CMD_EXT4 @@ -40,34 +37,15 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply CMD_NET imply CMD_PING imply CMD_SF - imply CLK_SIFIVE - imply CLK_SIFIVE_FU540_PRCI imply DOS_PARTITION imply EFI_PARTITION imply IP_DYN imply ISO_PARTITION - imply MACB - imply MII imply NET_RANDOM_ETHADDR imply PHY_LIB imply PHY_MSCC - imply SIFIVE_SERIAL - imply SPI - imply SPI_SIFIVE imply SPI_FLASH imply SPI_FLASH_ISSI - imply MMC - imply MMC_SPI - imply MMC_BROKEN_CD - imply CMD_MMC - imply DM_GPIO - imply SIFIVE_GPIO - imply CMD_GPIO - imply SMP - imply MISC - imply SIFIVE_OTP - imply DM_PWM - imply PWM_SIFIVE imply SYSRESET imply SYSRESET_GPIO From 50856c3f0f0d14da97634e9cdef2f0380210f9cc Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Sun, 2 Aug 2020 23:09:05 -0700 Subject: [PATCH 05/13] riscv: sifive/fu540: Drop NET_RANDOM_ETHADDR This option was enabled during the earlier U-Boot porting time. Now we already have the OTP driver in place and the unique MAC address is read from the OTP, there is no need to turn on this option. Signed-off-by: Bin Meng Reviewed-by: Leo Liang Reviewed-by: Rick Chen Reviewed-by: Pragnesh Patel Tested-by: Pragnesh Patel --- board/sifive/fu540/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig index fc281209eb..e70d1e53f9 100644 --- a/board/sifive/fu540/Kconfig +++ b/board/sifive/fu540/Kconfig @@ -41,7 +41,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply EFI_PARTITION imply IP_DYN imply ISO_PARTITION - imply NET_RANDOM_ETHADDR imply PHY_LIB imply PHY_MSCC imply SPI_FLASH From 3581811dc26fdf9eef05a7de9f654dc6a7a2596a Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Sun, 2 Aug 2020 23:09:06 -0700 Subject: [PATCH 06/13] riscv: sifive/fu540: Move SPL related functions to spl.c It's better to keep all SPL related functions in the same spl.c. Signed-off-by: Bin Meng Reviewed-by: Leo Liang Reviewed-by: Rick Chen Reviewed-by: Pragnesh Patel Tested-by: Pragnesh Patel --- board/sifive/fu540/fu540.c | 33 --------------------------------- board/sifive/fu540/spl.c | 33 ++++++++++++++++++++++++++++++++- 2 files changed, 32 insertions(+), 34 deletions(-) diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c index 57753ba50b..54e5a4c167 100644 --- a/board/sifive/fu540/fu540.c +++ b/board/sifive/fu540/fu540.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -127,35 +126,3 @@ int board_init(void) return 0; } - -#ifdef CONFIG_SPL -#define MODE_SELECT_REG 0x1000 -#define MODE_SELECT_QSPI 0x6 -#define MODE_SELECT_SD 0xb -#define MODE_SELECT_MASK GENMASK(3, 0) - -u32 spl_boot_device(void) -{ - u32 mode_select = readl((void *)MODE_SELECT_REG); - u32 boot_device = mode_select & MODE_SELECT_MASK; - - switch (boot_device) { - case MODE_SELECT_QSPI: - return BOOT_DEVICE_SPI; - case MODE_SELECT_SD: - return BOOT_DEVICE_MMC1; - default: - debug("Unsupported boot device 0x%x but trying MMC1\n", - boot_device); - return BOOT_DEVICE_MMC1; - } -} -#endif - -#ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) -{ - /* boot using first FIT config */ - return 0; -} -#endif diff --git a/board/sifive/fu540/spl.c b/board/sifive/fu540/spl.c index 135e118617..fe27316b2d 100644 --- a/board/sifive/fu540/spl.c +++ b/board/sifive/fu540/spl.c @@ -11,11 +11,17 @@ #include #include #include +#include #include #include #include -#define GEM_PHY_RESET SIFIVE_GENERIC_GPIO_NR(0, 12) +#define GEM_PHY_RESET SIFIVE_GENERIC_GPIO_NR(0, 12) + +#define MODE_SELECT_REG 0x1000 +#define MODE_SELECT_QSPI 0x6 +#define MODE_SELECT_SD 0xb +#define MODE_SELECT_MASK GENMASK(3, 0) int spl_board_init_f(void) { @@ -55,3 +61,28 @@ int spl_board_init_f(void) return 0; } + +u32 spl_boot_device(void) +{ + u32 mode_select = readl((void *)MODE_SELECT_REG); + u32 boot_device = mode_select & MODE_SELECT_MASK; + + switch (boot_device) { + case MODE_SELECT_QSPI: + return BOOT_DEVICE_SPI; + case MODE_SELECT_SD: + return BOOT_DEVICE_MMC1; + default: + debug("Unsupported boot device 0x%x but trying MMC1\n", + boot_device); + return BOOT_DEVICE_MMC1; + } +} + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* boot using first FIT config */ + return 0; +} +#endif From 023dba13668756e54ac4522543d91840f8f34db5 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Mon, 3 Aug 2020 23:33:42 +0200 Subject: [PATCH 07/13] riscv: remove redundant logical constraint. After if (ret) return ret; we know that ret is zero. Don't check it again. Signed-off-by: Heinrich Schuchardt Reviewed-by: Bin Meng Reviewed-by: Rick Chen --- arch/riscv/lib/andes_plic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c index 5cf29df670..c2a8fe4d9e 100644 --- a/arch/riscv/lib/andes_plic.c +++ b/arch/riscv/lib/andes_plic.c @@ -52,7 +52,7 @@ static int init_plic(void) if (ret) return ret; - if (ret == 0 && dev) { + if (dev) { ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) { const char *device_type; From 6a43e3a16743e5fc5b765bf897691b630e3e1edb Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Mon, 3 Aug 2020 23:09:49 +0200 Subject: [PATCH 08/13] riscv: sifive: fu540: redundant initialization We should not initialize a variable if the value is overwritten before being read. Signed-off-by: Heinrich Schuchardt Reviewed-by: Bin Meng Reviewed-by: Pragnesh Patel Tested-by: Pragnesh Patel Reviewed-by: Rick Chen --- arch/riscv/cpu/fu540/cache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/cpu/fu540/cache.c b/arch/riscv/cpu/fu540/cache.c index 9ee364b509..54de14238c 100644 --- a/arch/riscv/cpu/fu540/cache.c +++ b/arch/riscv/cpu/fu540/cache.c @@ -22,7 +22,7 @@ DECLARE_GLOBAL_DATA_PTR; int cache_enable_ways(void) { const void *blob = gd->fdt_blob; - int node = (-FDT_ERR_NOTFOUND); + int node; fdt_addr_t base; u32 config; u32 ways; From 137dc153fda936d81b3372061987255056a528d3 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Tue, 28 Jul 2020 20:05:30 +0200 Subject: [PATCH 09/13] doc: riscv: Update documentation for Sipeed MAIX boards The MAIXDUINO runs fine with the sipeed_maix_bitm_defconfig but a different board id parameter should be passed to kflash. Signed-off-by: Heinrich Schuchardt Reviewed-by: Sean Anderson --- doc/board/sipeed/maix.rst | 75 ++++++++++++++++++++++++++++++++++----- 1 file changed, 66 insertions(+), 9 deletions(-) diff --git a/doc/board/sipeed/maix.rst b/doc/board/sipeed/maix.rst index 06e0008b9f..c235cb44a8 100644 --- a/doc/board/sipeed/maix.rst +++ b/doc/board/sipeed/maix.rst @@ -1,8 +1,8 @@ .. SPDX-License-Identifier: GPL-2.0+ .. Copyright (C) 2020 Sean Anderson -Maix Bit -======== +MAIX +==== Several of the Sipeed Maix series of boards cotain the Kendryte K210 processor, a 64-bit RISC-V CPU. This processor contains several peripherals to accelerate @@ -13,8 +13,10 @@ peripherals include 8M of SRAM (accessible with and without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256 accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix peripherals vary, but include spi flash; on-board usb-serial bridges; ports for cameras, displays, and sd cards; and -ESP32 chips. Currently, only the Sipeed Maix Bit V2.0 (bitm) is supported, but -the boards are fairly similar. +ESP32 chips. + +Currently, only the Sipeed MAIX BiT V2.0 (bitm) and Sipeed MAIXDUINO are +supported, but the boards are fairly similar. Documentation for Maix boards is available from `Sipeed's website `_. @@ -26,20 +28,42 @@ details are rather lacking, so most technical reference has been taken from the Build and boot steps -------------------- -To build u-boot, run +To build U-Boot, run .. code-block:: none - make sipeed_maix_bitm_defconfig + make make CROSS_COMPILE= -To flash u-boot to a maix bit, run +To flash U-Boot, run .. code-block:: none - kflash -tp /dev/ -B bit_mic u-boot-dtb.bin + kflash -tp /dev/ -B u-boot-dtb.bin -Boot output should look like the following: +The board provides two serial devices, e.g. + +* /dev/serial/by-id/usb-Kongou_Hikari_Sipeed-Debug_12345678AB-if00-port0 +* /dev/serial/by-id/usb-Kongou_Hikari_Sipeed-Debug_12345678AB-if01-port0 + +Which one is used for flashing depends on the board. + +Currently only a small subset of the board features are supported. So we can +use the same default configuration and device tree. In the long run we may need +separate settings. + +======================== ========================== ========== ========== +Board defconfig board_id TTY device +======================== ========================== ========== ========== +Sipeed MAIX BiT sipeed_maix_bitm_defconfig bit first +Sipeed MAIX BiT with Mic sipeed_maix_bitm_defconfig bit_mic first +Sipeed MAIXDUINO sipeed_maix_bitm_defconfig maixduino first +Sipeed MAIX GO goE second +Sipeed MAIX ONE DOCK goD first +======================== ========================== ========== ========== + +Flashing causes a reboot of the device. Parameter -t specifies that the serial +console shall be opened immediately. Boot output should look like the following: .. code-block:: none @@ -238,6 +262,39 @@ Boot Sequence stage. 8. The boot hart jumps to ``0x80000000``. +Resetting the board +^^^^^^^^^^^^^^^^^^^ + +The MAIX boards can be reset using the DTR and RTS lines of the serial console. +How the lines are used depends on the specific board. See the code of kflash.py +for details. + +This is the reset sequence for the MAXDUINO and MAIX BiT with Mic: + +.. code-block:: python + + def reset(self): + self.device.setDTR(False) + self.device.setRTS(False) + time.sleep(0.1) + self.device.setDTR(True) + time.sleep(0.1) + self.device.setDTR(False) + time.sleep(0.1) + +and this for the MAIX Bit: + +.. code-block:: python + + def reset(self): + self.device.setDTR(False) + self.device.setRTS(False) + time.sleep(0.1) + self.device.setRTS(True) + time.sleep(0.1) + self.device.setRTS(False) + time.sleep(0.1) + Memory Map ^^^^^^^^^^ From 3a85e03f83e979e431e86c2d6394a5e4770dad1f Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Wed, 29 Jul 2020 19:23:38 +0200 Subject: [PATCH 10/13] doc: riscv: debug UART for MAIX Provide the required settings for the debug UART. Signed-off-by: Heinrich Schuchardt Reviewed-by: Sean Anderson --- doc/board/sipeed/maix.rst | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/doc/board/sipeed/maix.rst b/doc/board/sipeed/maix.rst index c235cb44a8..b1894f3a6f 100644 --- a/doc/board/sipeed/maix.rst +++ b/doc/board/sipeed/maix.rst @@ -262,6 +262,16 @@ Boot Sequence stage. 8. The boot hart jumps to ``0x80000000``. +Debug UART +^^^^^^^^^^ + +The Debug UART is provided with the following settings:: + + CONFIG_DEBUG_UART=y + CONFIG_DEBUG_UART_SIFIVE=y + CONFIG_DEBUG_UART_BASE=0x38000000 + CONFIG_DEBUG_UART_CLOCK=390000000 + Resetting the board ^^^^^^^^^^^^^^^^^^^ From db3585d181221dd025fcdece9d56b02da63cfe96 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Thu, 6 Aug 2020 12:34:59 +0200 Subject: [PATCH 11/13] cmd: exception: unaligned data access on RISC-V The command 'exception' can be used to test the handling of exceptions. Currently the exception command only allows to create an illegal instruction exception on RISC-V. Provide a sub-command 'exception unaligned' to cause a misaligned load address exception. Adjust the online help for 'exception undefined'. Signed-off-by: Heinrich Schuchardt Reviewed-by: Rick Chen --- cmd/riscv/exception.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/cmd/riscv/exception.c b/cmd/riscv/exception.c index 3c8dbbec0e..9687cec812 100644 --- a/cmd/riscv/exception.c +++ b/cmd/riscv/exception.c @@ -8,6 +8,18 @@ #include #include +static int do_unaligned(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + asm volatile ( + "auipc a1, 0\n" + "ori a1, a1, 3\n" + "lw a2, (0)(a1)\n" + ); + printf("The system supports unaligned access.\n"); + return CMD_RET_SUCCESS; +} + static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -16,6 +28,8 @@ static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc, } static struct cmd_tbl cmd_sub[] = { + U_BOOT_CMD_MKENT(unaligned, CONFIG_SYS_MAXARGS, 1, do_unaligned, + "", ""), U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined, "", ""), }; @@ -23,7 +37,8 @@ static struct cmd_tbl cmd_sub[] = { static char exception_help_text[] = "\n" " The following exceptions are available:\n" - " undefined - undefined instruction\n" + " undefined - illegal instruction\n" + " unaligned - load address misaligned\n" ; #include From 7c6ca03eaed0035ca6676e9bc7f5f1dfcaae7e8f Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 1 Aug 2020 15:15:39 +0000 Subject: [PATCH 12/13] riscv: additional crash information If an exception occurs, the relocated program counter and return address are required for an analysis. With this patch you get: => exception undefined Unhandled exception: Illegal instruction EPC: 0000000080595908 RA: 000000008059c0c6 TVAL: 000000008030c01e EPC: 0000000080007908 RA: 000000008000e0c6 reloc adjusted We can use the relocated addresses to find the involved functions in u.boot.map: .text.do_undefined 0x0000000080007908 0x8 cmd/built-in.o .text.cmd_process 0x000000008000dfcc 0x11a common/built-in.o 0x000000008000dfcc cmd_process If an exception occurs in an UEFI binary additionally the load addresses of the UEFI binaries are needed. With this patch: => setenv efi_selftest exception => bootefi selftest Unhandled exception: Illegal instruction EPC: 000000008042e18a RA: 000000008042e18a TVAL: 000000008030c01e EPC: 000000007fea018a RA: 000000007fea018a reloc adjusted UEFI image [0x0000000000000000:0xffffffffffffffff] '/\selftest' UEFI image [0x000000008042e000:0x000000008042e43f] pc=0x18a '/bug.efi' The value pc=0x18a matches the position of the illegal instruction in efi_selftest_miniapp_exception.efi (loaded as /bug.efi); asm volatile (".word 0xffffffff\n"); 00000180 93 85 C5 11 1C 64 22 85 82 97 FF FF FF FF 1C 64 Signed-off-by: Heinrich Schuchardt Reviewed-by: Sean Anderson Tested-by: Sean Anderson Reviewed-by: Bin Meng Reviewed-by: Rick Chen --- arch/riscv/lib/interrupts.c | 57 +++++++++++++++++++++++-------------- 1 file changed, 35 insertions(+), 22 deletions(-) diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c index 074c70ee77..cd47e64487 100644 --- a/arch/riscv/lib/interrupts.c +++ b/arch/riscv/lib/interrupts.c @@ -10,36 +10,43 @@ */ #include +#include #include #include #include #include #include +DECLARE_GLOBAL_DATA_PTR; + +static void show_efi_loaded_images(uintptr_t epc) +{ + efi_print_image_infos((void *)epc); +} + static void show_regs(struct pt_regs *regs) { #ifdef CONFIG_SHOW_REGS - printf("RA: " REG_FMT " SP: " REG_FMT " GP: " REG_FMT "\n", - regs->ra, regs->sp, regs->gp); - printf("TP: " REG_FMT " T0: " REG_FMT " T1: " REG_FMT "\n", - regs->tp, regs->t0, regs->t1); - printf("T2: " REG_FMT " S0: " REG_FMT " S1: " REG_FMT "\n", - regs->t2, regs->s0, regs->s1); - printf("A0: " REG_FMT " A1: " REG_FMT " A2: " REG_FMT "\n", - regs->a0, regs->a1, regs->a2); - printf("A3: " REG_FMT " A4: " REG_FMT " A5: " REG_FMT "\n", - regs->a3, regs->a4, regs->a5); - printf("A6: " REG_FMT " A7: " REG_FMT " S2: " REG_FMT "\n", - regs->a6, regs->a7, regs->s2); - printf("S3: " REG_FMT " S4: " REG_FMT " S5: " REG_FMT "\n", - regs->s3, regs->s4, regs->s5); - printf("S6: " REG_FMT " S7: " REG_FMT " S8: " REG_FMT "\n", - regs->s6, regs->s7, regs->s8); - printf("S9: " REG_FMT " S10: " REG_FMT " S11: " REG_FMT "\n", - regs->s9, regs->s10, regs->s11); - printf("T3: " REG_FMT " T4: " REG_FMT " T5: " REG_FMT "\n", - regs->t3, regs->t4, regs->t5); - printf("T6: " REG_FMT "\n", regs->t6); + printf("SP: " REG_FMT " GP: " REG_FMT " TP: " REG_FMT "\n", + regs->sp, regs->gp, regs->tp); + printf("T0: " REG_FMT " T1: " REG_FMT " T2: " REG_FMT "\n", + regs->t0, regs->t1, regs->t2); + printf("S0: " REG_FMT " S1: " REG_FMT " A0: " REG_FMT "\n", + regs->s0, regs->s1, regs->a0); + printf("A1: " REG_FMT " A2: " REG_FMT " A3: " REG_FMT "\n", + regs->a1, regs->a2, regs->a3); + printf("A4: " REG_FMT " A5: " REG_FMT " A6: " REG_FMT "\n", + regs->a4, regs->a5, regs->a6); + printf("A7: " REG_FMT " S2: " REG_FMT " S3: " REG_FMT "\n", + regs->a7, regs->s2, regs->s3); + printf("S4: " REG_FMT " S5: " REG_FMT " S6: " REG_FMT "\n", + regs->s4, regs->s5, regs->s6); + printf("S7: " REG_FMT " S8: " REG_FMT " S9: " REG_FMT "\n", + regs->s7, regs->s8, regs->s9); + printf("S10: " REG_FMT " S11: " REG_FMT " T3: " REG_FMT "\n", + regs->s10, regs->s11, regs->t3); + printf("T4: " REG_FMT " T5: " REG_FMT " T6: " REG_FMT "\n\n", + regs->t4, regs->t5, regs->t6); #endif } @@ -69,8 +76,14 @@ static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs) else printf("Unhandled exception code: %ld\n", code); - printf("EPC: " REG_FMT " TVAL: " REG_FMT "\n", epc, tval); + printf("EPC: " REG_FMT " RA: " REG_FMT " TVAL: " REG_FMT "\n", + epc, regs->ra, tval); + if (gd->flags & GD_FLG_RELOC) + printf("EPC: " REG_FMT " RA: " REG_FMT " reloc adjusted\n\n", + epc - gd->reloc_off, regs->ra - gd->reloc_off); + show_regs(regs); + show_efi_loaded_images(epc); hang(); } From 313981c2d9437f31b2a0f3838591a5fb0e5d8ebe Mon Sep 17 00:00:00 2001 From: Pragnesh Patel Date: Thu, 13 Aug 2020 10:12:26 +0530 Subject: [PATCH 13/13] common/board_f: make sure to call fix_fdt() before reserve_fdt() There may be a chance that board specific fix_fdt() will change the size of FDT blob so it's safe to call reserve_fdt() after fix_fdt() otherwise global data (gd) will overwrite with FDT blob values. Fixes: a8492e25ac71 ("riscv: Expand the DT size before copy reserved memory node") Signed-off-by: Pragnesh Patel Reviewed-by: Bin Meng Reviewed-by: Rick Chen Reviewed-by: Atish Patra --- common/board_f.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/common/board_f.c b/common/board_f.c index 79532f4365..3932e0c69d 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -919,6 +919,9 @@ static const init_fnc_t init_sequence_f[] = { * - board info struct */ setup_dest_addr, +#ifdef CONFIG_OF_BOARD_FIXUP + fix_fdt, +#endif #ifdef CONFIG_PRAM reserve_pram, #endif @@ -941,9 +944,6 @@ static const init_fnc_t init_sequence_f[] = { INIT_FUNC_WATCHDOG_RESET setup_bdinfo, display_new_sp, -#ifdef CONFIG_OF_BOARD_FIXUP - fix_fdt, -#endif INIT_FUNC_WATCHDOG_RESET reloc_fdt, reloc_bootstage,