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Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2022-01-10 14:01:57 -05:00
parent d637294e26 0dadad6d7c
commit fe04d885fb
1624 changed files with 25243 additions and 10873 deletions
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12
include/asm-generic/global_data.h
View File

@@ -244,6 +244,10 @@ struct global_data {
* @fdt_size: space reserved for relocated device space
*/
unsigned long fdt_size;
/**
* @fdt_src: Source of FDT
*/
enum fdt_source_t fdt_src;
#if CONFIG_IS_ENABLED(OF_LIVE)
/**
* @of_root: root node of the live tree
@@ -512,6 +516,14 @@ static_assert(sizeof(struct global_data) == GD_SIZE);
#define gd_acpi_ctx() NULL
#endif
#if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
#define gd_multi_dtb_fit() gd->multi_dtb_fit
#define gd_set_multi_dtb_fit(_dtb) gd->multi_dtb_fit = _dtb
#else
#define gd_multi_dtb_fit() NULL
#define gd_set_multi_dtb_fit(_dtb)
#endif
/**
* enum gd_flags - global data flags
*

11
include/clock_legacy.h
View File

@@ -22,4 +22,15 @@ unsigned long get_board_ddr_clk(void);
#define get_board_ddr_clk() CONFIG_DDR_CLK_FREQ
#endif
/*
* If we have CONFIG_DYNAMIC_SYS_CLK_FREQ then there will be an
* implentation of get_board_sys_clk() somewhere. Otherwise we have
* a static value to use now.
*/
#ifdef CONFIG_DYNAMIC_SYS_CLK_FREQ
unsigned long get_board_sys_clk(void);
#else
#define get_board_sys_clk() CONFIG_SYS_CLK_FREQ
#endif
#endif

2
include/command.h
View File

@@ -45,7 +45,7 @@ struct cmd_tbl {
char *const argv[]);
char *usage; /* Usage message (short) */
#ifdef CONFIG_SYS_LONGHELP
char *help; /* Help message (long) */
const char *help; /* Help message (long) */
#endif
#ifdef CONFIG_AUTO_COMPLETE
/* do auto completion on the arguments */

4
include/config_distro_bootcmd.h
View File

@@ -498,8 +498,4 @@
"run bootcmd_${target}; " \
"done\0"
#ifndef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND "run distro_bootcmd"
#endif
#endif /* _CONFIG_CMD_DISTRO_BOOTCMD_H */

2
include/configs/M5208EVBE.h
View File

@@ -15,7 +15,6 @@
*/
#define CONFIG_SYS_UART_PORT (0)
#undef CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 5000
#ifdef CONFIG_MCFFEC
@@ -39,7 +38,6 @@
#define CONFIG_MCFTMR
/* I2C */
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_UDP_CHECKSUM

2
include/configs/M5235EVB.h
View File

@@ -20,7 +20,6 @@
#define CONFIG_SYS_UART_PORT (0)
#undef CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
/*
@@ -48,7 +47,6 @@
#define CONFIG_MCFTMR
/* I2C */
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi)
#define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK)
#define CONFIG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA)

2
include/configs/M5249EVB.h
View File

@@ -21,8 +21,6 @@
#define CONFIG_SYS_UART_PORT (0)
#undef CONFIG_WATCHDOG
#undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */
/*

3
include/configs/M5253DEMO.h
View File

@@ -12,8 +12,6 @@
#define CONFIG_SYS_UART_PORT (0)
#undef CONFIG_WATCHDOG /* disable watchdog */
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
@@ -69,7 +67,6 @@
#define CONFIG_HOSTNAME "M5253DEMO"
/* I2C */
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_SYS_I2C_PINMUX_REG (*(u32 *) (CONFIG_SYS_MBAR+0x19C))
#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF)
#define CONFIG_SYS_I2C_PINMUX_SET (0)

21
include/configs/M5272C3.h
View File

@@ -20,7 +20,6 @@
#define CONFIG_SYS_UART_PORT (0)
#undef CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
@@ -145,26 +144,6 @@
CF_CACR_CEIB | CF_CACR_DCM | \
CF_CACR_EUSP)
/*-----------------------------------------------------------------------
* Memory bank definitions
*/
#define CONFIG_SYS_BR0_PRELIM 0xFFE00201
#define CONFIG_SYS_OR0_PRELIM 0xFFE00014
#define CONFIG_SYS_BR1_PRELIM 0
#define CONFIG_SYS_OR1_PRELIM 0
#define CONFIG_SYS_BR2_PRELIM 0x30000001
#define CONFIG_SYS_OR2_PRELIM 0xFFF80000
#define CONFIG_SYS_BR3_PRELIM 0
#define CONFIG_SYS_OR3_PRELIM 0
#define CONFIG_SYS_BR4_PRELIM 0
#define CONFIG_SYS_OR4_PRELIM 0
#define CONFIG_SYS_BR5_PRELIM 0
#define CONFIG_SYS_OR5_PRELIM 0
#define CONFIG_SYS_BR6_PRELIM 0
#define CONFIG_SYS_OR6_PRELIM 0
#define CONFIG_SYS_BR7_PRELIM 0x00000701
#define CONFIG_SYS_OR7_PRELIM 0xFFC0007C
/*-----------------------------------------------------------------------
* Port configuration
*/

3
include/configs/M5275EVB.h
View File

@@ -58,13 +58,10 @@
#endif
/* I2C */
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
#define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
#define CONFIG_BOOTCOMMAND "bootm ffe40000"
#ifdef CONFIG_MCFFEC
# define CONFIG_NET_RETRY_COUNT 5
# define CONFIG_OVERWRITE_ETHADDR_ONCE

2
include/configs/M53017EVB.h
View File

@@ -20,7 +20,6 @@
#define CONFIG_SYS_UART_PORT (0)
#undef CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 5000
#define CONFIG_SYS_UNIFY_CACHE
@@ -54,7 +53,6 @@
#define CONFIG_MCFTMR
/* I2C */
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_UDP_CHECKSUM

6
include/configs/M5329EVB.h
View File

@@ -20,7 +20,6 @@
#define CONFIG_SYS_UART_PORT (0)
#undef CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
#define CONFIG_SYS_UNIFY_CACHE
@@ -48,7 +47,6 @@
#define CONFIG_MCFTMR
/* I2C */
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_UDP_CHECKSUM
@@ -137,10 +135,6 @@
# define CONFIG_SYS_NAND_SIZE 1
# define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
# define NAND_ALLOW_ERASE_ALL 1
# define CONFIG_JFFS2_NAND 1
# define CONFIG_JFFS2_DEV "nand0"
# define CONFIG_JFFS2_PART_SIZE (CONFIG_SYS_CS2_MASK & ~1)
# define CONFIG_JFFS2_PART_OFFSET 0x00000000
#endif
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE

6
include/configs/M5373EVB.h
View File

@@ -22,7 +22,6 @@
#define CONFIG_SYS_UART_PORT (0)
#undef CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */
#define CONFIG_SYS_UNIFY_CACHE
@@ -50,7 +49,6 @@
#define CONFIG_MCFTMR
/* I2C */
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_UDP_CHECKSUM
@@ -139,10 +137,6 @@
# define CONFIG_SYS_NAND_SIZE 1
# define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
# define NAND_ALLOW_ERASE_ALL 1
# define CONFIG_JFFS2_NAND 1
# define CONFIG_JFFS2_DEV "nand0"
# define CONFIG_JFFS2_PART_SIZE (CONFIG_SYS_CS2_MASK & ~1)
# define CONFIG_JFFS2_PART_OFFSET 0x00000000
#endif
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE

19
include/configs/MPC837XERDB.h
View File

@@ -302,8 +302,6 @@
*/
#define CONFIG_BOOTP_BOOTFILESIZE
#undef CONFIG_WATCHDOG /* watchdog disabled */
#ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC_PIN_MUX
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
@@ -326,7 +324,6 @@
*/
#define CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_NETDEV "eth1"
@@ -365,20 +362,4 @@
"$netdev:off " \
"root=$rootdev rw console=$console,$baudrate $othbootargs\0"
#define NFSBOOTCOMMAND \
"setenv rootdev /dev/nfs;" \
"run setbootargs;" \
"run setipargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define RAMBOOTCOMMAND \
"setenv rootdev /dev/ram;" \
"run setbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#endif /* __CONFIG_H */

35
include/configs/MPC8540ADS.h
View File

@@ -26,8 +26,6 @@
#define CONFIG_HAS_FEC 1 /* 8540 has FEC */
#endif
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
/*
* sysclk for MPC85xx
*
@@ -46,10 +44,6 @@
* Note that PCI-X won't work at 33MHz.
*/
#ifndef CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_CLK_FREQ 33000000
#endif
/*
* These can be toggled for performance analysis, otherwise use default.
*/
@@ -90,9 +84,7 @@
#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */
#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH 16M */
#define CONFIG_SYS_BR0_PRELIM 0xff001801 /* port size 32bit */
#define CONFIG_SYS_OR0_PRELIM 0xff006ff7 /* 16MB Flash */
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */
#undef CONFIG_SYS_FLASH_CHECKSUM
@@ -131,8 +123,6 @@
* FIXME: the top 17 bits of BR2.
*/
#define CONFIG_SYS_BR2_PRELIM 0xf0001861
/*
* The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64.
*
@@ -147,8 +137,6 @@
* 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901
*/
#define CONFIG_SYS_OR2_PRELIM 0xfc006901
#define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */
#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */
#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
@@ -176,8 +164,6 @@
/*
* 32KB, 8-bit wide for ADS config reg
*/
#define CONFIG_SYS_BR4_PRELIM 0xf8000801
#define CONFIG_SYS_OR4_PRELIM 0xffffe1f1
#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000)
#define CONFIG_SYS_INIT_RAM_LOCK 1
@@ -274,8 +260,6 @@
*/
#define CONFIG_BOOTP_BOOTFILESIZE
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
@@ -317,23 +301,4 @@
"fdtaddr=400000\0" \
"fdtfile=your.fdt.dtb\0"
#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND NFSBOOTCOMMAND
#endif /* __CONFIG_H */

41
include/configs/MPC8548CDS.h
View File

@@ -19,15 +19,12 @@
#define CONFIG_PCI1 /* PCI controller 1 */
#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
#undef CONFIG_PCI2
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
#ifndef __ASSEMBLY__
#include <linux/stringify.h>
extern unsigned long get_clock_freq(void);
#endif
#define CONFIG_SYS_CLK_FREQ get_clock_freq() /* sysclk for MPC85xx */
/*
* These can be toggled for performance analysis, otherwise use default.
@@ -134,14 +131,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
#endif
#define CONFIG_SYS_BR0_PRELIM \
(BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x800000) | BR_PS_16 | BR_V)
#define CONFIG_SYS_BR1_PRELIM \
(BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)
#define CONFIG_SYS_OR0_PRELIM 0xff806e65
#define CONFIG_SYS_OR1_PRELIM 0xff806e65
#define CONFIG_SYS_FLASH_BANKS_LIST \
{CONFIG_SYS_FLASH_BASE_PHYS + 0x800000, CONFIG_SYS_FLASH_BASE_PHYS}
#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */
@@ -185,10 +174,6 @@ extern unsigned long get_clock_freq(void);
* FIXME: the top 17 bits of BR2.
*/
#define CONFIG_SYS_BR2_PRELIM \
(BR_PHYS_ADDR(CONFIG_SYS_LBC_SDRAM_BASE_PHYS) \
| BR_PS_32 | (3<<BR_MSEL_SHIFT) | BR_V)
/*
* The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64.
*
@@ -203,8 +188,6 @@ extern unsigned long get_clock_freq(void);
* 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901
*/
#define CONFIG_SYS_OR2_PRELIM 0xfc006901
#define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */
#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */
#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
@@ -263,9 +246,6 @@ extern unsigned long get_clock_freq(void);
#else
#define CADMUS_BASE_ADDR_PHYS CADMUS_BASE_ADDR
#endif
#define CONFIG_SYS_BR3_PRELIM \
(BR_PHYS_ADDR(CADMUS_BASE_ADDR_PHYS) | BR_PS_8 | BR_V)
#define CONFIG_SYS_OR3_PRELIM 0xfff00ff7
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
@@ -401,8 +381,6 @@ extern unsigned long get_clock_freq(void);
*/
#define CONFIG_BOOTP_BOOTFILESIZE
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
@@ -457,23 +435,4 @@ extern unsigned long get_clock_freq(void);
"fdtaddr=1e00000\0" \
"fdtfile=mpc8548cds.dtb\0"
#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND NFSBOOTCOMMAND
#endif /* __CONFIG_H */

34
include/configs/MPC8560ADS.h
View File

@@ -27,7 +27,6 @@
* assume U-Boot is less than 0.5MB
*/
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
/*
@@ -44,10 +43,6 @@
* in the README.mpc85xxads.
*/
#ifndef CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_CLK_FREQ 33000000
#endif
/*
* These can be toggled for performance analysis, otherwise use default.
*/
@@ -90,9 +85,7 @@
#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */
#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH 16M */
#define CONFIG_SYS_BR0_PRELIM 0xff001801 /* port size 32bit */
#define CONFIG_SYS_OR0_PRELIM 0xff006ff7 /* 16MB Flash */
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */
#undef CONFIG_SYS_FLASH_CHECKSUM
@@ -131,8 +124,6 @@
* FIXME: the top 17 bits of BR2.
*/
#define CONFIG_SYS_BR2_PRELIM 0xf0001861
/*
* The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64.
*
@@ -147,8 +138,6 @@
* 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901
*/
#define CONFIG_SYS_OR2_PRELIM 0xfc006901
#define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */
#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */
#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
@@ -176,8 +165,6 @@
/*
* 32KB, 8-bit wide for ADS config reg
*/
#define CONFIG_SYS_BR4_PRELIM 0xf8000801
#define CONFIG_SYS_OR4_PRELIM 0xffffe1f1
#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000)
#define CONFIG_SYS_INIT_RAM_LOCK 1
@@ -261,8 +248,6 @@
*/
#define CONFIG_BOOTP_BOOTFILESIZE
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
@@ -305,23 +290,4 @@
"fdtaddr=400000\0" \
"fdtfile=mpc8560ads.dtb\0"
#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND NFSBOOTCOMMAND
#endif /* __CONFIG_H */

23
include/configs/P1010RDB.h
View File

@@ -63,19 +63,16 @@
#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000)
#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE)
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0
#else
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_NAND_INIT
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SPL_MAX_SIZE (128 << 10)
#define CONFIG_TPL_TEXT_BASE 0xD0001000
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000)
#define CONFIG_SYS_NAND_U_BOOT_START (0x11000000)
#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10)
#elif defined(CONFIG_SPL_BUILD)
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_NAND_MINIMAL
@@ -84,7 +81,6 @@
#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0xD0000000
#define CONFIG_SYS_NAND_U_BOOT_START 0xD0000000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (128 << 10)
#endif
#define CONFIG_SPL_PAD_TO 0x20000
#define CONFIG_TPL_PAD_TO 0x20000
@@ -102,7 +98,7 @@
#endif
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SYS_MONITOR_BASE CONFIG_TPL_TEXT_BASE
#define CONFIG_SYS_MONITOR_BASE 0xD0001000
#elif defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
#else
@@ -110,12 +106,10 @@
#endif
/* High Level Configuration Options */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */
#if defined(CONFIG_PCI)
#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
/*
* PCI Windows
@@ -152,8 +146,6 @@
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif
#define CONFIG_SYS_CLK_FREQ 66666666 /* SYSCLK for P1010 RDB */
#define CONFIG_HWCONFIG
/*
* These can be toggled for performance analysis, otherwise use default.
@@ -573,7 +565,6 @@ extern unsigned long get_sdram_size(void);
#if defined(CONFIG_HAS_FSL_DR_USB)
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_EHCI_FSL
#endif
#endif
@@ -597,8 +588,6 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
#undef CONFIG_WATCHDOG /* watchdog disabled */
#if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI_HCD) \
|| defined(CONFIG_FSL_SATA)
#endif
@@ -681,16 +670,6 @@ extern unsigned long get_sdram_size(void);
"i2c mw 19 1 4; i2c mw 19 3 f3; reset\0"
#endif
#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs; " \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND RAMBOOTCOMMAND
#include <asm/fsl_secure_boot.h>
#endif /* __CONFIG_H */

48
include/configs/P2041RDB.h
View File

@@ -36,7 +36,6 @@
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
#define CONFIG_SYS_SRIO
#define CONFIG_SRIO1 /* SRIO port 1 */
@@ -50,10 +49,8 @@
#endif
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(unsigned long dummy);
#include <linux/stringify.h>
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0)
/*
* These can be toggled for performance analysis, otherwise use default.
@@ -137,9 +134,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CPLD_BASE_PHYS CPLD_BASE
#endif
#define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(CPLD_BASE_PHYS) | BR_PS_8 | BR_V)
#define CONFIG_SYS_OR3_PRELIM 0xffffeff7 /* 32KB but only 4k mapped */
#define PIXIS_LBMAP_SWITCH 7
#define PIXIS_LBMAP_MASK 0xf0
#define PIXIS_LBMAP_SHIFT 4
@@ -185,21 +179,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
| OR_FCM_SCY_1 \
| OR_FCM_TRLX \
| OR_FCM_EHTR)
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */
#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */
#else
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */
#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
#endif
#else
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */
#endif /* CONFIG_NAND_FSL_ELBC */
#define CONFIG_SYS_FLASH_EMPTY_INFO
@@ -413,7 +392,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_HAS_FSL_MPH_USB
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif
@@ -464,32 +442,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
"fdtfile=p2041rdb/p2041rdb.dtb\0" \
"bdev=sda3\0"
#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND HDBOOT
#include <asm/fsl_secure_boot.h>
#endif /* __CONFIG_H */

10
include/configs/SBx81LIFKW.h
View File

@@ -6,25 +6,16 @@
#ifndef _CONFIG_SBX81LIFKW_H
#define _CONFIG_SBX81LIFKW_H
/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
#define CONFIG_KW88F6281 1 /* SOC Name */
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
/* additions for new ARM relocation support */
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
#define CONFIG_KIRKWOOD_GPIO 1
/*
* NS16550 Configuration
*/
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
@@ -61,7 +52,6 @@
* Ethernet Driver configuration
*/
#ifdef CONFIG_CMD_NET
#define CONFIG_MVGBE /* Enable kirkwood Gbe Controller Driver */
#define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */
#define CONFIG_PHY_BASE_ADR 0x01
#endif /* CONFIG_CMD_NET */

10
include/configs/SBx81LIFXCAT.h
View File

@@ -6,25 +6,16 @@
#ifndef _CONFIG_SBX81LIFXCAT_H
#define _CONFIG_SBX81LIFXCAT_H
/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
#define CONFIG_KW88F6281 1 /* SOC Name */
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
/* additions for new ARM relocation support */
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
#define CONFIG_KIRKWOOD_GPIO 1
/*
* NS16550 Configuration
*/
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
@@ -66,7 +57,6 @@
* Ethernet Driver configuration
*/
#ifdef CONFIG_CMD_NET
#define CONFIG_MVGBE /* Enable kirkwood Gbe Controller Driver */
#define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */
#define CONFIG_PHY_BASE_ADR 0x01
#endif /* CONFIG_CMD_NET */

29
include/configs/T102xRDB.h
View File

@@ -41,7 +41,6 @@
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
#endif
#ifdef CONFIG_SPIFLASH
@@ -116,12 +115,6 @@
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#endif
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
/*
* These can be toggled for performance analysis, otherwise use default.
*/
@@ -380,7 +373,6 @@ unsigned long get_board_sys_clk(void);
#undef CONFIG_FSL_DIU_FB /* RDB doesn't support DIU */
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000)
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
/*
@@ -416,7 +408,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
#ifdef CONFIG_PCI
/* controller 1, direct to uli, tgtid 3, Base address 20000 */
@@ -452,7 +443,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_HAS_FSL_DR_USB
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif
@@ -580,25 +570,6 @@ unsigned long get_board_sys_clk(void);
"fdtaddr=1e00000\0" \
"bdev=sda3\0"
#define LINUXBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"setenv ramdiskaddr 0x02000000;" \
"setenv fdtaddr 0x00c00000;" \
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND
#include <asm/fsl_secure_boot.h>
#endif /* __T1024RDB_H */

43
include/configs/T104xRDB.h
View File

@@ -40,7 +40,6 @@
#endif
#define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
#endif
#ifdef CONFIG_SPIFLASH
@@ -85,8 +84,6 @@
#define CONFIG_PCIE3 /* PCIE controller 3 */
#define CONFIG_PCIE4 /* PCIE controller 4 */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
#if defined(CONFIG_SPIFLASH)
#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_NXP_ESBC
@@ -95,8 +92,6 @@
#endif
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
/*
* These can be toggled for performance analysis, otherwise use default.
*/
@@ -367,7 +362,6 @@
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_FSL_DIU_CH7301
#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000)
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#endif
#endif
@@ -460,7 +454,6 @@
#ifdef CONFIG_HAS_FSL_DR_USB
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif
#endif
@@ -499,8 +492,6 @@
#define CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_DPAA_PME
#define CONFIG_U_QE
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif /* CONFIG_NOBQFMAN */
@@ -609,40 +600,6 @@
"fdtfile=" __stringify(FDTFILE) "\0" \
"bdev=sda3\0"
#define LINUXBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"setenv ramdiskaddr 0x02000000;" \
"setenv fdtaddr 0x00c00000;" \
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND
#include <asm/fsl_secure_boot.h>
#endif /* __CONFIG_H */

49
include/configs/T208xQDS.h
View File

@@ -44,7 +44,6 @@
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
#endif
#ifdef CONFIG_SPIFLASH
@@ -94,12 +93,6 @@
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
/*
* Config the L3 Cache as L3 SRAM
*/
@@ -360,12 +353,6 @@ unsigned long get_board_sys_clk(void);
#define I2C_VOL_MONITOR_BUS_V_OVF 0x1
#define I2C_VOL_MONITOR_BUS_V_SHIFT 3
#define CONFIG_VID_FLS_ENV "t208xqds_vdd_mv"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_VID
#endif
#define CONFIG_VOL_MONITOR_IR36021_SET
#define CONFIG_VOL_MONITOR_IR36021_READ
/* The lowest and highest voltage allowed for T208xQDS */
#define VDD_MV_MIN 819
#define VDD_MV_MAX 1212
@@ -420,7 +407,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
#define CONFIG_PCIE4 /* PCIE controller 4 */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
/* controller 1, direct to uli, tgtid 3, Base address 20000 */
#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000
#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull
@@ -517,7 +503,6 @@ unsigned long get_board_sys_clk(void);
* USB
*/
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_HAS_FSL_DR_USB
#endif
@@ -614,40 +599,6 @@ unsigned long get_board_sys_clk(void);
"cpu 7 release 0x01000000 - - -;" \
"go 0x01000000"
#define LINUXBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"setenv ramdiskaddr 0x02000000;" \
"setenv fdtaddr 0x00c00000;" \
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND
#include <asm/fsl_secure_boot.h>
#endif /* __T208xQDS_H */

49
include/configs/T208xRDB.h
View File

@@ -39,7 +39,6 @@
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
#endif
#ifdef CONFIG_SPIFLASH
@@ -89,12 +88,6 @@
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ 66660000
/*
* Config the L3 Cache as L3 SRAM
*/
@@ -312,12 +305,6 @@ unsigned long get_board_sys_clk(void);
#define I2C_MUX_CH_VOL_MONITOR 0xa
#define CONFIG_VID_FLS_ENV "t208xrdb_vdd_mv"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_VID
#endif
#define CONFIG_VOL_MONITOR_IR36021_SET
#define CONFIG_VOL_MONITOR_IR36021_READ
/* The lowest and highest voltage allowed for T208xRDB */
#define VDD_MV_MIN 819
#define VDD_MV_MAX 1212
@@ -372,7 +359,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
#define CONFIG_PCIE4 /* PCIE controller 4 */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
/* controller 1, direct to uli, tgtid 3, Base address 20000 */
#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000
#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull
@@ -472,7 +458,6 @@ unsigned long get_board_sys_clk(void);
* USB
*/
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_HAS_FSL_DR_USB
#endif
@@ -567,40 +552,6 @@ unsigned long get_board_sys_clk(void);
"cpu 7 release 0x01000000 - - -;" \
"go 0x01000000"
#define LINUXBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"setenv ramdiskaddr 0x02000000;" \
"setenv fdtaddr 0x00c00000;" \
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND
#include <asm/fsl_secure_boot.h>
#endif /* __T2080RDB_H */

48
include/configs/T4240RDB.h
View File

@@ -60,7 +60,6 @@
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
/*
* These can be toggled for performance analysis, otherwise use default.
@@ -225,12 +224,6 @@
"setenv bootargs config-addr=0x60000000; " \
"bootm 0x01000000 - 0x00f00000"
#define CONFIG_SYS_CLK_FREQ 66666666
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
#endif
/*
* DDR Setup
*/
@@ -408,12 +401,6 @@ unsigned long get_board_sys_clk(void);
#define I2C_VOL_MONITOR_BUS_V_OVF 0x1
#define I2C_VOL_MONITOR_BUS_V_SHIFT 3
#define CONFIG_VID_FLS_ENV "t4240rdb_vdd_mv"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_VID
#endif
#define CONFIG_VOL_MONITOR_IR36021_SET
#define CONFIG_VOL_MONITOR_IR36021_READ
/* The lowest and highest voltage allowed for T4240RDB */
#define VDD_MV_MIN 819
#define VDD_MV_MAX 1212
@@ -498,7 +485,6 @@ unsigned long get_board_sys_clk(void);
/*
* USB
*/
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_HAS_FSL_DR_USB
@@ -547,40 +533,6 @@ unsigned long get_board_sys_clk(void);
"setenv bootargs config-addr=0x60000000; " \
"bootm 0x01000000 - 0x00f00000"
#define LINUXBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"setenv ramdiskaddr 0x02000000;" \
"setenv fdtaddr 0x00c00000;" \
"setenv loadaddr 0x1000000;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND LINUXBOOTCOMMAND
#include <asm/fsl_secure_boot.h>
#endif /* __CONFIG_H */

5
include/configs/adp-ae3xx.h
View File

@@ -17,8 +17,6 @@
#define CONFIG_SKIP_TRUNOFF_WATCHDOG
#define CONFIG_ARCH_MAP_SYSMEM
#define CONFIG_BOOTP_SERVERIP
#ifdef CONFIG_SKIP_LOWLEVEL_INIT
@@ -30,8 +28,7 @@
/*
* Timer
*/
#define CONFIG_SYS_CLK_FREQ 39062500
#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ
#define VERSION_CLOCK get_board_sys_clk()
/*
* Use Externel CLOCK or PCLK

5
include/configs/adp-ag101p.h
View File

@@ -15,8 +15,6 @@
*/
#define CONFIG_USE_INTERRUPT
#define CONFIG_ARCH_MAP_SYSMEM
#define CONFIG_BOOTP_SERVERIP
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
@@ -32,8 +30,7 @@
/*
* Timer
*/
#define CONFIG_SYS_CLK_FREQ 39062500
#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ
#define VERSION_CLOCK get_board_sys_clk()
/*
* Use Externel CLOCK or PCLK

2
include/configs/alt.h
View File

@@ -34,8 +34,6 @@
#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootm_size=0x10000000\0" \

6
include/configs/am335x_igep003x.h
View File

@@ -91,12 +91,6 @@
"echo WARNING: Could not determine device tree to use; fi; \0"
#endif
#define CONFIG_BOOTCOMMAND \
"run findfdt;" \
"run mmcboot;" \
"run nandboot;" \
"run netboot;"
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */

49
include/configs/am335x_shc.h
View File

@@ -139,64 +139,15 @@
#if defined CONFIG_SHC_NETBOOT
/* Network Boot */
# define CONFIG_BOOTCOMMAND \
"run fusecmd; " \
"if run netboot; then " \
"echo Booting from network; " \
"else " \
"echo ERROR: Cannot boot from network!; " \
"panic; " \
"fi; "
#elif defined CONFIG_SHC_SDBOOT /* !defined CONFIG_SHC_NETBOOT */
/* SD-Card Boot */
# define CONFIG_BOOTCOMMAND \
"if mmc dev 0; mmc rescan; then " \
"run sd_setup; " \
"else " \
"echo ERROR: SD/MMC-Card not detected!; " \
"panic; " \
"fi; " \
"if run loaduimage; then " \
"echo Bootable SD/MMC-Card inserted, booting from it!; " \
"run mmcboot; " \
"else " \
"echo ERROR: Unable to load uImage from SD/MMC-Card!; " \
"panic; " \
"fi; "
#elif defined CONFIG_SHC_ICT
/* ICT adapter boots only u-boot and does HW partitioning */
# define CONFIG_BOOTCOMMAND \
"if mmc dev 0; mmc rescan; then " \
"run sd_setup; " \
"else " \
"echo ERROR: SD/MMC-Card not detected!; " \
"panic; " \
"fi; " \
"run fusecmd; "
#else /* !defined CONFIG_SHC_NETBOOT, !defined CONFIG_SHC_SDBOOT */
/* Regular Boot from internal eMMC */
# define CONFIG_BOOTCOMMAND \
"if mmc dev 1; mmc rescan; then " \
"run emmc_setup; " \
"else " \
"echo ERROR: eMMC device not detected!; " \
"panic; " \
"fi; " \
"if run loaduimage; then " \
"run mmcboot; " \
"else " \
"echo ERROR Unable to load uImage from eMMC!; " \
"echo Performing Rollback!; " \
"setenv _active_ ${active_root}; " \
"setenv _inactive_ ${inactive_root}; " \
"setenv active_root ${_inactive_}; " \
"setenv inactive_root ${_active_}; " \
"saveenv; " \
"reset; " \
"fi; "
#endif /* Regular Boot */

19
include/configs/am3517_evm.h
View File

@@ -90,25 +90,6 @@
"nand read ${fdtaddr} aa0000 80000; " \
"bootm ${loadaddr} - ${fdtaddr}\0" \
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"echo SD/MMC found on device $mmcdev; " \
"if run loadbootenv; then " \
"run importbootenv; " \
"fi; " \
"echo Checking if uenvcmd is set ...; " \
"if test -n $uenvcmd; then " \
"echo Running uenvcmd ...; " \
"run uenvcmd; " \
"fi; " \
"echo Running default loadimage ...; " \
"setenv bootfile zImage; " \
"if run loadimage; then " \
"run loadfdt; " \
"run mmcboot; " \
"fi; " \
"else run nandboot; fi"
/* Miscellaneous configurable options */
/* We set the max number of command args high to avoid HUSH bugs. */

1
include/configs/amcore.h
View File

@@ -13,7 +13,6 @@
#define CONFIG_MCFTMR
#define CONFIG_SYS_UART_PORT 0
#define CONFIG_BOOTCOMMAND "bootm ffc20000"
#define CONFIG_EXTRA_ENV_SETTINGS \
"upgrade_uboot=loady; " \
"protect off 0xffc00000 0xffc1ffff; " \

4
include/configs/ap121.h
View File

@@ -20,10 +20,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1)
#define CONFIG_BOOTCOMMAND "sf probe;" \
"mtdparts default;" \
"bootm 0x9f650000"
/* Miscellaneous configurable options */
/*

4
include/configs/ap143.h
View File

@@ -25,10 +25,6 @@
*/
#define CONFIG_SYS_NS16550_CLK 25000000
#define CONFIG_BOOTCOMMAND "sf probe;" \
"mtdparts default;" \
"bootm 0x9f680000"
/* Miscellaneous configurable options */
/*

6
include/configs/ap152.h
View File

@@ -25,12 +25,6 @@
*/
#define CONFIG_SYS_NS16550_CLK 25000000
#define CONFIG_BOOTCOMMAND "sf probe;" \
"mtdparts default;" \
"bootm 0x9f060000"
#define CONFIG_ENV_SPI_MAX_HZ 25000000
/* Miscellaneous configurable options */
/*

4
include/configs/apalis-imx8.h
View File

@@ -50,7 +50,7 @@
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=PARTUUID=${uuid} rootwait " \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"mmcpart=1\0" \
"netargs=setenv bootargs console=${console},${baudrate} " \
"root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \
"\0" \
@@ -68,8 +68,6 @@
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
/* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */
#define CONFIG_SYS_FSL_USDHC_NUM 3

4
include/configs/apalis-imx8x.h
View File

@@ -77,7 +77,7 @@
"mmcargs=setenv bootargs ${consoleargs} " \
"root=PARTUUID=${uuid} rootwait " \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"mmcpart=1\0" \
"netargs=setenv bootargs ${consoleargs} " \
"root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \
"${vidargs}\0" \
@@ -99,8 +99,6 @@
/* Environment in eMMC, before config block at the end of 1st "boot sector" */
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
/* On Apalis iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */
#define CONFIG_SYS_FSL_USDHC_NUM 2

2
include/configs/apalis_imx6.h
View File

@@ -45,8 +45,6 @@
#define CONFIG_USBD_HS
/* Framebuffer and LCD */
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP

4
include/configs/apple.h
View File

@@ -3,10 +3,6 @@
#include <linux/sizes.h>
#define CONFIG_SYS_SDRAM_BASE 0x880000000
#define CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE CONFIG_SYS_TEXT_BASE
/* Environment */
#define ENV_DEVICE_SETTINGS \
"stdin=serial,usbkbd\0" \

1
include/configs/aristainetos2.h
View File

@@ -443,7 +443,6 @@
/* Framebuffer */
/* check this console not needed, after test remove it */
#define CONFIG_IMX_VIDEO_SKIP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IMX6_PWM_PER_CLK 66000000

5
include/configs/armadillo-800eva.h
View File

@@ -17,7 +17,7 @@
#define CONFIG_TMU_TIMER
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4)
#define CONFIG_SYS_TIMER_RATE (get_board_sys_clk() / 4)
/* STACK */
#define CONFIG_SYS_INIT_SP_ADDR 0xE8083000
@@ -72,7 +72,6 @@
#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 50000000
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ get_board_sys_clk()
#endif /* __ARMADILLO_800EVA_H */

9
include/configs/aspeed-common.h
View File

@@ -38,13 +38,4 @@
*/
#define CONFIG_BOOTP_BOOTFILESIZE
/*
* Miscellaneous configurable options
*/
#define CONFIG_EXTRA_ENV_SETTINGS \
"verify=yes\0" \
"spi_dma=yes\0" \
""
#endif /* __AST_COMMON_CONFIG_H */

14
include/configs/astro_mcf5373l.h
View File

@@ -58,7 +58,6 @@
#define CONFIG_MCFTMR
/* I2C */
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/*
* Defines processor clock - important for correct timings concerning serial
@@ -91,7 +90,6 @@
*/
#ifndef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */
#endif
@@ -140,18 +138,6 @@
* by external update.c; This is not included in mainline because
* it needs non-blocking CFI routines.
*/
#ifdef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */
#else
#if ASTRO_V532
#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
"run xilinxload&&run alteraload&&bootm 0x80000;"\
"update;reset"
#else
#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
"run xilinxload&&bootm 0x80000;update;reset"
#endif
#endif
#define CONFIG_FPGA_COUNT 1
#define CONFIG_SYS_FPGA_PROG_FEEDBACK

19
include/configs/at91-sama5_common.h
View File

@@ -21,31 +21,12 @@
#define CONFIG_BOOTP_BOOTFILESIZE
#ifdef CONFIG_SD_BOOT
#define CONFIG_BOOTCOMMAND "if test ! -n ${dtb_name}; then " \
"setenv dtb_name at91-${board_name}.dtb; " \
"fi; " \
"fatload mmc 0:1 0x21000000 ${dtb_name}; " \
"fatload mmc 0:1 0x22000000 zImage; " \
"bootz 0x22000000 - 0x21000000"
#else
#ifdef CONFIG_NAND_BOOT
/* u-boot env in nand flash */
#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \
"nand read 0x22000000 0x200000 0x600000;" \
"bootz 0x22000000 - 0x21000000"
#elif CONFIG_SPI_BOOT
/* u-boot env in serial flash, by default is bus 0 and cs 0 */
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x21000000 0x60000 0xc000; " \
"sf read 0x22000000 0x6c000 0x394000; " \
"bootz 0x22000000 - 0x21000000"
#elif CONFIG_QSPI_BOOT
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x21000000 0x180000 0x80000; " \
"sf read 0x22000000 0x200000 0x600000; " \
"bootz 0x22000000 - 0x21000000"
#endif
#endif

14
include/configs/at91sam9260ek.h
View File

@@ -87,27 +87,13 @@
#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_BOOTCOMMAND "sf probe 0:0; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
#elif CONFIG_SYS_USE_DATAFLASH_CS1
#define CONFIG_BOOTCOMMAND "sf probe 0:1; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
#elif defined(CONFIG_SYS_USE_NANDFLASH)
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
#else /* CONFIG_SYS_USE_MMC */
/* bootstrap + u-boot + env + linux in mmc */
/* For FAT system, most cases it should be in the reserved sector */
#define CONFIG_BOOTCOMMAND \
"fatload mmc 0:1 0x22000000 uImage; bootm"
#endif
#endif

7
include/configs/at91sam9261ek.h
View File

@@ -90,21 +90,14 @@
#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
#elif CONFIG_SYS_USE_DATAFLASH_CS3
/* bootstrap + u-boot + env + linux in dataflash on CS3 */
#define CONFIG_BOOTCOMMAND "sf probe 0:3; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
#else /* CONFIG_SYS_USE_NANDFLASH */
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
#endif
#endif

4
include/configs/at91sam9263ek.h
View File

@@ -207,14 +207,10 @@
#ifdef CONFIG_SYS_USE_DATAFLASH
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
#elif CONFIG_SYS_USE_NANDFLASH
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
#endif
#endif

8
include/configs/at91sam9m10g45ek.h
View File

@@ -64,16 +64,8 @@
#ifdef CONFIG_NAND_BOOT
/* bootstrap + u-boot + env in nandflash */
#define CONFIG_BOOTCOMMAND \
"nand read 0x70000000 0x200000 0x300000;" \
"bootm 0x70000000"
#elif CONFIG_SD_BOOT
/* bootstrap + u-boot + env + linux in mmc */
#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \
"fatload mmc 0:1 0x72000000 zImage; " \
"bootz 0x72000000 - 0x71000000"
#endif
/* Defines for SPL */

18
include/configs/at91sam9n12ek.h
View File

@@ -71,28 +71,10 @@
#ifdef CONFIG_SPI_BOOT
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_BOOTCOMMAND \
"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
"sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
"bootm 0x22000000"
#elif defined(CONFIG_NAND_BOOT)
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_BOOTCOMMAND \
"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
"nand read 0x21000000 0x180000 0x080000;" \
"nand read 0x22000000 0x200000 0x400000;" \
"bootm 0x22000000 - 0x21000000"
#else /* CONFIG_SD_BOOT */
#define CONFIG_BOOTCOMMAND \
"setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
"fatload mmc 0:1 0x21000000 dtb;" \
"fatload mmc 0:1 0x22000000 uImage;" \
"bootm 0x22000000 - 0x21000000"
#endif
/* SPL */

9
include/configs/at91sam9rlek.h
View File

@@ -59,22 +59,13 @@
#ifdef CONFIG_SYS_USE_DATAFLASH
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
#elif CONFIG_SYS_USE_NANDFLASH
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \
"nand read 0x21000000 0x180000 0x80000; " \
"bootz 0x22000000 - 0x21000000"
#else /* CONFIG_SYS_USE_MMC */
/* bootstrap + u-boot + env + linux in mmc */
#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
"fatload mmc 0:1 0x22000000 zImage; " \
"bootz 0x22000000 - 0x21000000"
#endif
#endif

10
include/configs/at91sam9x5ek.h
View File

@@ -62,20 +62,10 @@
#ifdef CONFIG_NAND_BOOT
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_BOOTCOMMAND "nand read " \
"0x22000000 0x200000 0x600000; " \
"nand read 0x21000000 0x180000 0x20000; " \
"bootz 0x22000000 - 0x21000000"
#elif defined(CONFIG_SPI_BOOT)
/* bootstrap + u-boot + env + linux in spi flash */
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x100000 0x300000; " \
"bootm 0x22000000"
#elif defined(CONFIG_SYS_USE_DATAFLASH)
/* bootstrap + u-boot + env + linux in data flash */
#define CONFIG_BOOTCOMMAND "sf probe 0; " \
"sf read 0x22000000 0x84000 0x294000; " \
"bootm 0x22000000"
#endif
/* SPL */

9
include/configs/baltos.h
View File

@@ -185,15 +185,6 @@
/*DFUARGS*/
#endif
#define CONFIG_BOOTCOMMAND \
"run findfdt; " \
"run usbboot;" \
"run mmcboot;" \
"setenv mmcdev 1; " \
"setenv bootpart 1:2; " \
"run mmcboot;" \
"run nandboot;"
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */

7
include/configs/bcm_ns3.h
View File

@@ -44,7 +44,6 @@
/* Access eMMC Boot_1 and Boot_2 partitions */
/* enable 64-bit PCI resources */
#define CONFIG_SYS_PCI_64BIT 1
#define CONSOLE_ARGS "console_args=console=ttyS0,115200n8\0"
#define MAX_CPUS "max_cpus=maxcpus=8\0"
@@ -277,12 +276,6 @@
"setenv bl_flash_pending_rfs_imgs;" \
"fi; \0"
#define CONFIG_BOOTCOMMAND "run flash_pending_rfs_imgs;" \
"run fastboot_nitro && "\
"run bootcmd_mmc_fits || "\
"run bootcmd_usb || "\
"run bootcmd_pxe"
/* Flashing commands */
#define TFTP_QSPI_PARAM \
"fip_qspi_addr=0x0\0"\

4
include/configs/bcmstb.h
View File

@@ -90,7 +90,6 @@ extern phys_addr_t prior_stage_fdt_address;
/*
* CONFIG_SYS_LOAD_ADDR - 1 MiB.
*/
#define CONFIG_SYS_FDT_SAVE_ADDRESS 0x1f00000
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 32
@@ -104,7 +103,6 @@ extern phys_addr_t prior_stage_fdt_address;
*/
#define V_NS16550_CLK 81000000
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
@@ -126,8 +124,6 @@ extern phys_addr_t prior_stage_fdt_address;
/*
* Flash configuration.
*/
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_MACRONIX
/*
* Filesystem configuration.

14
include/configs/beacon-rzg2m.h
View File

@@ -67,18 +67,4 @@
"booti; " \
"fi;\0"
#undef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
"if run loadimage; then " \
"run mmcboot; " \
"else run netboot; " \
"fi; " \
"fi; " \
"else booti ${loadaddr} - ${fdt_addr}; fi"
#endif /* __BEACON_RZG2M_H */

5
include/configs/bk4r1.h
View File

@@ -32,10 +32,6 @@
"preboot=" BK4_NET_INIT \
"if ${ncenable}; then run if_netconsole start_netconsole; fi\0"
/* BK4r1 boot command sets GPIO103/PTC30 to force USB hub out of reset*/
#define BK4_BOOTCOMMAND "run set_gpio122; run set_gpio96; sf probe; " \
"run manage_userdata; "
/* Enable PREBOOT variable */
/* Set ARP_TIMEOUT to 500ms */
@@ -76,7 +72,6 @@
#define CONFIG_BOARD_SIZE_LIMIT 520192
/* boot command, including the target-defined one if any */
#define CONFIG_BOOTCOMMAND BK4_BOOTCOMMAND "run bootcmd_nand"
/* Extra env settings (including the target-defined ones if any) */
#define CONFIG_EXTRA_ENV_SETTINGS \

2
include/configs/blanche.h
View File

@@ -45,8 +45,6 @@
#endif
/* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
/* ENV setting */

1
include/configs/broadcom_bcm963158.h
View File

@@ -28,7 +28,6 @@
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_SELF_INIT
#endif /* CONFIG_MTD_RAW_NAND */
/*

1
include/configs/broadcom_bcm968360bg.h
View File

@@ -27,7 +27,6 @@
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_SELF_INIT
#endif /* CONFIG_MTD_RAW_NAND */
/*

1
include/configs/broadcom_bcm968380gerg.h
View File

@@ -8,5 +8,4 @@
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_SELF_INIT
#endif /* CONFIG_MTD_RAW_NAND */

1
include/configs/broadcom_bcm968580xref.h
View File

@@ -27,7 +27,6 @@
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_SELF_INIT
#endif /* CONFIG_MTD_RAW_NAND */
/*

2
include/configs/brxre1.h
View File

@@ -53,8 +53,6 @@ BUR_COMMON_ENV \
" do run b_${target}; if test ${b_break} = 1; then; exit; fi; done\0"
#endif /* !CONFIG_SPL_BUILD*/
#define CONFIG_BOOTCOMMAND "mmc dev 1; run b_default"
/* Environment */
#endif /* __CONFIG_BRXRE1_H__ */

15
include/configs/capricorn-common.h
View File

@@ -11,15 +11,12 @@
#include <asm/arch/imx-regs.h>
#include "siemens-env-common.h"
#include "siemens-ccp-common.h"
/* SPL config */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_MAX_SIZE (124 * 1024)
#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800
#define CONFIG_SPL_STACK 0x013E000
#define CONFIG_SPL_BSS_START_ADDR 0x00128000
@@ -35,9 +32,6 @@
#define CONFIG_FACTORYSET
#undef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING GENERATE_CCP_VERSION("01", "07")
#define CONFIG_REMAKE_ELF
/* ENET Config */
@@ -117,20 +111,11 @@
ENV_EMMC \
ENV_NET
#define CONFIG_BOOTCOMMAND \
"if usrbutton; then " \
"run flash_self_test; " \
"reset; " \
"fi;" \
"run flash_self;" \
"reset;"
/* Default location for tftp and bootm */
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
/* On CCP board, USDHC1 is for eMMC */
#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* eMMC */
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define PHYS_SDRAM_1 0x80000000

19
include/configs/cgtqmx8.h
View File

@@ -14,8 +14,6 @@
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_MAX_SIZE (124 * 1024)
#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800
#define CONFIG_SPL_STACK 0x013E000
#define CONFIG_SPL_BSS_START_ADDR 0x00128000
@@ -33,7 +31,6 @@
#define CONFIG_REMAKE_ELF
/* Flat Device Tree Definitions */
#define CONFIG_OF_BOARD_SETUP
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
@@ -82,7 +79,7 @@
"boot_fdt=try\0" \
"fdt_file=imx8qm-cgt-qmx8.dtb\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"mmcpart=1\0" \
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
"mmcautodetect=yes\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
@@ -123,24 +120,10 @@
"booti; " \
"fi;\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
"if run loadimage; then " \
"run mmcboot; " \
"else run netboot; " \
"fi; " \
"fi; " \
"else booti ${loadaddr} - ${fdt_addr}; fi"
/* Link Definitions */
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
#define CONFIG_SYS_FSL_USDHC_NUM 3

5
include/configs/chiliboard.h
View File

@@ -31,11 +31,6 @@
"nand read ${loadaddr} NAND.kernel; " \
"bootz ${loadaddr} - ${fdt_addr}\0"
#define CONFIG_BOOTCOMMAND \
"run mmcboot; " \
"run nandboot; " \
"run netboot"
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x82000000\0" \
"fdt_addr=0x87800000\0" \

15
include/configs/chromebook_coral.h
View File

@@ -10,19 +10,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_BOOTCOMMAND \
"tpm init; tpm startup TPM2_SU_CLEAR; " \
"read mmc 0:2 100000 0 80; setexpr loader *001004f0; " \
"setexpr size *00100518; setexpr blocks $size / 200; " \
"read mmc 0:2 100000 80 $blocks; setexpr setup $loader - 1000; " \
"setexpr cmdline_ptr $loader - 2000; " \
"setexpr.s cmdline *$cmdline_ptr; " \
"setexpr cmdline gsub %U \\\\${uuid}; " \
"if part uuid mmc 0:2 uuid; then " \
"zboot start 100000 0 0 0 $setup cmdline; " \
"zboot load; zboot setup; zboot dump; zboot go;" \
"fi"
#include <configs/x86-common.h>
#include <configs/x86-chromebook.h>
@@ -31,8 +18,6 @@
"stdout=vidconsole,serial\0" \
"stderr=vidconsole,serial\0"
#define CONFIG_TPL_TEXT_BASE 0xffff8000
#define CONFIG_SYS_NS16550_MEM32
#undef CONFIG_SYS_NS16550_PORT_MAPPED

2
include/configs/chromebook_samus.h
View File

@@ -23,6 +23,4 @@
"stdout=vidconsole,serial\0" \
"stderr=vidconsole,serial\0"
#define CONFIG_TPL_TEXT_BASE 0xfffd8000
#endif /* __CONFIG_H */

3
include/configs/ci20.h
View File

@@ -35,7 +35,6 @@
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
/* Miscellaneous configuration options */
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
@@ -50,6 +49,4 @@
#define CONFIG_SPL_START_S_PATH "arch/mips/mach-jz47xx"
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1c /* 14 KiB offset */
#endif /* __CONFIG_CI20_H__ */

8
include/configs/cl-som-imx7.h
View File

@@ -30,7 +30,6 @@
#undef CONFIG_SYS_AUTOLOAD
#undef CONFIG_EXTRA_ENV_SETTINGS
#undef CONFIG_BOOTCOMMAND
#define CONFIG_SYS_AUTOLOAD "no"
@@ -50,7 +49,7 @@
"fdtaddr=0x83000000\0" \
"mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \
"usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"mmcpart=1\0" \
"usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \
"doboot=bootz ${loadaddr} - ${fdtaddr}\0" \
"mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \
@@ -86,11 +85,6 @@
"emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \
"emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \
#define CONFIG_BOOTCOMMAND \
"echo SD boot attempt ...; run sdbootscript; run sdboot; " \
"echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \
"echo USB boot attempt ...; run usbbootscript; "
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR

2
include/configs/cm_fx6.h
View File

@@ -13,7 +13,6 @@
#include "mx6_common.h"
/* Machine config */
#define CONFIG_SYS_LITTLE_ENDIAN
/* MMC */
#define CONFIG_SYS_FSL_USDHC_NUM 3
@@ -177,7 +176,6 @@
/* Display */
#define CONFIG_IMX_HDMI
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
/* EEPROM */

12
include/configs/cm_t335.h
View File

@@ -55,18 +55,6 @@
"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
MMCARGS \
NANDARGS
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
"if run loaduimage; then " \
"run mmcboot; " \
"else run nandboot; " \
"fi; " \
"fi; " \
"else run nandboot; fi"
#endif /* CONFIG_SPL_BUILD */
#define CONFIG_TIMESTAMP

12
include/configs/cm_t43.h
View File

@@ -78,18 +78,6 @@
"load mmc 1 ${fdtaddr} ${fdtfile} && " \
"bootz ${loadaddr} - ${fdtaddr}\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev 0; " \
"if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"fi; " \
"fi; " \
"mmc dev 1; " \
"if mmc rescan; then " \
"run emmcboot; " \
"fi;"
/* SPL defines. */
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20))
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)

32
include/configs/cobra5272.h
View File

@@ -54,7 +54,6 @@
*/
#if 0
#define CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
#endif
@@ -124,7 +123,6 @@ u-boot: 'set' command */
#if 0
#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
enter a valid image address in flash */
/* User network settings */
@@ -246,36 +244,6 @@ enter a valid image address in flash */
CF_CACR_CEIB | CF_CACR_DCM | \
CF_CACR_EUSP)
/*-----------------------------------------------------------------------
* Memory bank definitions
*
* Please refer also to Motorola Coldfire user manual - Chapter XXX
* <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
*/
#define CONFIG_SYS_BR0_PRELIM 0xFFE00201
#define CONFIG_SYS_OR0_PRELIM 0xFFE00014
#define CONFIG_SYS_BR1_PRELIM 0
#define CONFIG_SYS_OR1_PRELIM 0
#define CONFIG_SYS_BR2_PRELIM 0
#define CONFIG_SYS_OR2_PRELIM 0
#define CONFIG_SYS_BR3_PRELIM 0
#define CONFIG_SYS_OR3_PRELIM 0
#define CONFIG_SYS_BR4_PRELIM 0
#define CONFIG_SYS_OR4_PRELIM 0
#define CONFIG_SYS_BR5_PRELIM 0
#define CONFIG_SYS_OR5_PRELIM 0
#define CONFIG_SYS_BR6_PRELIM 0
#define CONFIG_SYS_OR6_PRELIM 0
#define CONFIG_SYS_BR7_PRELIM 0x00000701
#define CONFIG_SYS_OR7_PRELIM 0xFF00007C
/*-----------------------------------------------------------------------
* LED config
*/

2
include/configs/colibri-imx6ull.h
View File

@@ -72,7 +72,6 @@
#if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_NAND)
/* Run Distro Boot script if ubiboot fails */
#define CONFIG_BOOTCOMMAND "run ubiboot || run distro_bootcmd;"
#define DFU_ALT_NAND_INFO "imx6ull-bcb part 0,1;u-boot1 part 0,2;u-boot2 part 0,3;u-boot-env part 0,4;ubi partubi 0,5"
#define MODULE_EXTRA_ENV_SETTINGS \
"dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
@@ -165,7 +164,6 @@
#if defined(CONFIG_DM_VIDEO)
#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#endif

4
include/configs/colibri-imx8x.h
View File

@@ -80,7 +80,7 @@
"mmcargs=setenv bootargs ${consoleargs} " \
"root=PARTUUID=${uuid} rootwait " \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"mmcpart=1\0" \
"netargs=setenv bootargs ${consoleargs} " \
"root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \
"${vidargs}\0" \
@@ -102,8 +102,6 @@
/* Environment in eMMC, before config block at the end of 1st "boot sector" */
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
/* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */
#define CONFIG_SYS_FSL_USDHC_NUM 2

2
include/configs/colibri_imx6.h
View File

@@ -35,8 +35,6 @@
#define CONFIG_USBD_HS
/* Framebuffer and LCD */
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP

3
include/configs/colibri_imx7.h
View File

@@ -110,8 +110,6 @@
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
#if defined(CONFIG_TARGET_COLIBRI_IMX7_NAND)
#define CONFIG_BOOTCOMMAND "run ubiboot ; echo ; echo ubiboot failed ; " \
"run distro_bootcmd;"
#define MODULE_EXTRA_ENV_SETTINGS \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
UBI_BOOTCMD
@@ -199,7 +197,6 @@
#define CONFIG_USBD_HS
#if defined(CONFIG_DM_VIDEO)
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#endif

9
include/configs/colibri_pxa270.h
View File

@@ -12,21 +12,12 @@
/*
* High Level Board Configuration Options
*/
#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
/* Avoid overwriting factory configuration block */
#define CONFIG_BOARD_SIZE_LIMIT 0x40000
/*
* Environment settings
*/
#define CONFIG_BOOTCOMMAND \
"if fatload mmc 0 0xa0000000 uImage; then " \
"bootm 0xa0000000; " \
"fi; " \
"if usb reset && fatload usb 0 0xa0000000 uImage; then " \
"bootm 0xa0000000; " \
"fi; " \
"bootm 0xc0000;"
#define CONFIG_TIMESTAMP
/*

1
include/configs/colibri_t20.h
View File

@@ -19,7 +19,6 @@
#define CONFIG_LCD_LOGO
/* NAND support */
#define CONFIG_TEGRA_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define UBOOT_UPDATE \

5
include/configs/colibri_vf.h
View File

@@ -14,10 +14,7 @@
#include <asm/arch/imx-regs.h>
#include <linux/sizes.h>
#define CONFIG_SYS_FSL_CLK
#ifdef CONFIG_VIDEO_FSL_DCU_FB
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_SYS_FSL_DCU_LE
@@ -69,8 +66,6 @@
"ubi read ${fdt_addr_r} dtb && " \
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
#define CONFIG_BOOTCOMMAND "run ubiboot || run distro_bootcmd;"
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \

1
include/configs/comtrend_vr3032u.h
View File

@@ -10,5 +10,4 @@
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_SELF_INIT
#endif /* CONFIG_MTD_RAW_NAND */

1
include/configs/condor.h
View File

@@ -27,7 +27,6 @@
/* Board Clock */
/* XTAL_CLK : 33.33MHz */
#define CONFIG_SYS_CLK_FREQ 33333333u
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */

6
include/configs/conga-qeval20-qa3-e3845.h
View File

@@ -21,12 +21,6 @@
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
#undef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND \
"load scsi 0:2 03000000 /boot/vmlinuz-${kernel-ver}-generic;" \
"load scsi 0:2 04000000 /boot/initrd.img-${kernel-ver}-generic;" \
"run boot"
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel-ver=4.4.0-22\0" \

20
include/configs/controlcenterdc.h
View File

@@ -122,26 +122,6 @@
" gpio clear ${gpio1}; gpio set ${gpio2};" \
" fi; sleep 0.12; done\0"
#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \
"console=${consoledev},${baudrate} ${othbootargs}; " \
"tftpboot ${bootfile_addr} ${bootfile}; " \
"bootm ${bootfile_addr}"
#define MMCBOOTCOMMAND \
"setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
"console=${consoledev},${baudrate} ${othbootargs}; " \
"ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \
"bootm ${bootfile_addr}"
#define CONFIG_BOOTCOMMAND \
"if env exists keyprogram; then;" \
" setenv keyprogram; run nfsboot;" \
" fi;" \
" run dobootfail"
/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros

3
include/configs/coreboot.h
View File

@@ -10,6 +10,9 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define SPLASH_SETTINGS "splashsource=virtio_fs\0" \
"splashimage=0x1000000\0"
#include <configs/x86-common.h>
#define CONFIG_SYS_MONITOR_LEN (1 << 20)

52
include/configs/corenet_ds.h
View File

@@ -47,15 +47,12 @@
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
#if defined(CONFIG_SPIFLASH)
#elif defined(CONFIG_SDCARD)
#define CONFIG_FSL_FIXED_MMC_LOCATION
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() /* sysclk for MPC85xx */
/*
* These can be toggled for performance analysis, otherwise use default.
*/
@@ -128,10 +125,6 @@
#define CONFIG_SYS_FLASH_OR_PRELIM ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \
| OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR)
#define CONFIG_SYS_BR1_PRELIM \
(BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)
#define CONFIG_SYS_OR1_PRELIM 0xf8000ff7
#define PIXIS_BASE 0xffdf0000 /* PIXIS registers */
#ifdef CONFIG_PHYS_64BIT
#define PIXIS_BASE_PHYS 0xfffdf0000ull
@@ -139,9 +132,6 @@
#define PIXIS_BASE_PHYS PIXIS_BASE
#endif
#define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V)
#define CONFIG_SYS_OR3_PRELIM 0xffffeff7 /* 32KB but only 4k mapped */
#define PIXIS_LBMAP_SWITCH 7
#define PIXIS_LBMAP_MASK 0xf0
#define PIXIS_LBMAP_SHIFT 4
@@ -187,21 +177,6 @@
| OR_FCM_SCY_1 \
| OR_FCM_TRLX \
| OR_FCM_EHTR)
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */
#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */
#else
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */
#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
#endif
#else
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */
#endif /* CONFIG_NAND_FSL_ELBC */
#define CONFIG_SYS_FLASH_EMPTY_INFO
@@ -414,7 +389,6 @@
#define CONFIG_HAS_FSL_MPH_USB
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif
@@ -469,32 +443,6 @@
"fdtfile=p4080ds/p4080ds.dtb\0" \
"bdev=sda3\0"
#define HDBOOT \
"setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
"nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND HDBOOT
#include <asm/fsl_secure_boot.h>
#endif /* __CONFIG_H */

5
include/configs/corvus.h
View File

@@ -66,7 +66,6 @@
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
#endif
/* Ethernet */
@@ -79,10 +78,6 @@
/* bootstrap + u-boot + env in nandflash */
#define CONFIG_BOOTCOMMAND \
"nand read 0x70000000 0x200000 0x300000;" \
"bootm 0x70000000"
/* Defines for SPL */
#define CONFIG_SPL_MAX_SIZE (12 * SZ_1K)
#define CONFIG_SPL_STACK (SZ_16K)

1
include/configs/crs3xx-98dx3236.h
View File

@@ -11,7 +11,6 @@
*/
#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* 64 MB */
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
/* Environment in SPI NOR flash */

9
include/configs/da850evm.h
View File

@@ -18,7 +18,6 @@
* SoC Configuration
*/
#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
@@ -136,10 +135,6 @@
59, 60, 61, 62, 63 }
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 10
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_NAND_SELF_INIT
#endif
#endif
/*
@@ -171,10 +166,6 @@
#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
#define CONFIG_HWCONFIG /* enable hwconfig */
#define CONFIG_BOOTCOMMAND \
"run envboot; " \
"run mmcboot; "
#define DEFAULT_LINUX_BOOT_ENV \
"loadaddr=0xc0700000\0" \
"fdtaddr=0xc0600000\0" \

2
include/configs/dart_6ul.h
View File

@@ -90,8 +90,6 @@
"fit_addr=0x82000000\0" \
ENV_MMC
#define CONFIG_BOOTCOMMAND "run mmc_mmc_fit"
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1) \

6
include/configs/db-xc3-24g4xg.h
View File

@@ -6,12 +6,6 @@
#ifndef _CONFIG_DB_XC3_24G4G_H
#define _CONFIG_DB_XC3_24G4G_H
/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
/* Environment in SPI NOR flash */
/* NAND */

3
include/configs/deneb.h
View File

@@ -9,9 +9,6 @@
#include "capricorn-common.h"
#undef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING GENERATE_CCP_VERSION("01", "06")
/* DDR3 board total DDR is 2 GB */
#undef PHYS_SDRAM_1_SIZE
#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */

9
include/configs/devkit3250.h
View File

@@ -28,7 +28,6 @@
/*
* GPIO
*/
#define CONFIG_LPC32XX_GPIO
/*
* Ethernet
@@ -84,14 +83,6 @@
* Environment
*/
#define CONFIG_BOOTCOMMAND \
"dhcp; " \
"tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; " \
"tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; " \
"setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; " \
"setenv bootargs ${bootargs} ${nfsargs} ${userargs}; " \
"bootm ${loadaddr} - ${dtbaddr}"
#define CONFIG_EXTRA_ENV_SETTINGS \
"autoload=no\0" \
"ethaddr=00:01:90:00:C0:81\0" \

11
include/configs/devkit8000.h
View File

@@ -46,15 +46,6 @@
/* TWL4030 */
/* Board NAND Info */
#define CONFIG_JFFS2_NAND
/* nand device jffs2 lives on */
#define CONFIG_JFFS2_DEV "nand0"
/* start of jffs2 partition */
#define CONFIG_JFFS2_PART_OFFSET 0x680000
#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
/* partition */
/* BOOTP/DHCP options */
#define CONFIG_BOOTP_NISDOMAIN
#define CONFIG_BOOTP_BOOTFILESIZE
@@ -126,8 +117,6 @@
"fi; " \
"else run nandboot; fi\0"
#define CONFIG_BOOTCOMMAND "run autoboot"
/* Boot Argument Buffer Size */
/* Defines for SPL */

6
include/configs/dfi-bt700.h
View File

@@ -26,12 +26,6 @@
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
#undef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND \
"load scsi 0:1 03000000 /boot/vmlinuz-${kernel-ver}-generic;" \
"load scsi 0:1 04000000 /boot/initrd.img-${kernel-ver}-generic;" \
"run boot"
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel-ver=4.4.0-24\0" \

9
include/configs/dh_imx6.h
View File

@@ -64,13 +64,6 @@
#endif
#endif
/* Watchdog */
#if defined(CONFIG_SPL_BUILD)
#undef CONFIG_WDT
#undef CONFIG_WATCHDOG
#define CONFIG_HW_WATCHDOG
#endif
#ifndef CONFIG_SPL_BUILD
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200\0" \
@@ -84,8 +77,6 @@
"fdtfile=imx6q-dhcom-pdk2.dtb\0"\
BOOTENV
#define CONFIG_BOOTCOMMAND "run distro_bootcmd"
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 2) \

18
include/configs/display5.h
View File

@@ -56,16 +56,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 2
#ifndef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND "if run check_em_pad; then " \
"run recovery;" \
"else if test ${BOOT_FROM} = FACTORY; then " \
"run factory_nfs;" \
"else " \
"run boot_mmc;" \
"fi;fi"
#endif
#define PARTS_DEFAULT \
/* Linux partitions */ \
"partitions=" \
@@ -200,7 +190,6 @@
"altbootcmd=run recovery\0" \
"bootdelay=1\0" \
"baudrate=115200\0" \
"bootcmd=" CONFIG_BOOTCOMMAND "\0" \
"ethact=FEC\0" \
"netdev=eth0\0" \
"boot_os=y\0" \
@@ -325,13 +314,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Watchdog */
#if defined(CONFIG_SPL_BUILD)
#undef CONFIG_WDT
#undef CONFIG_WATCHDOG
#define CONFIG_HW_WATCHDOG
#endif
/* ENV config */
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
/* The 0x120000 value corresponds to above SPI-NOR memory MAP */

20
include/configs/dns325.h
View File

@@ -12,12 +12,6 @@
#ifndef _CONFIG_DNS325_H
#define _CONFIG_DNS325_H
/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
#define CONFIG_KW88F6281 /* SOC Name */
#include "mv-common.h"
/* Remove or override few declarations from mv-common.h */
@@ -32,7 +26,6 @@
/*
* Enable GPI0 support
*/
#define CONFIG_KIRKWOOD_GPIO
/*
* Environment variables configurations
@@ -72,17 +65,4 @@
"setenv bootenvrootfstype ${nandrootfstype}; " \
"setenv bootenvloadimage ${nandloadimage}\0"
#define CONFIG_BOOTCOMMAND \
"if test -n ${bootenv} && usb start; then " \
"if run loadbootenv; then " \
"echo Loaded environment ${bootenv} from usb;" \
"run importbootenv;" \
"fi;" \
"if test -n ${bootenvcmd}; then " \
"echo Running bootenvcmd ...;" \
"run bootenvcmd;" \
"fi;" \
"fi;" \
"run setnandbootenv subbootcmd;"
#endif /* _CONFIG_DNS325_H */

13
include/configs/dockstar.h
View File

@@ -11,12 +11,6 @@
#ifndef _CONFIG_DOCKSTAR_H
#define _CONFIG_DOCKSTAR_H
/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
#define CONFIG_KW88F6281 1 /* SOC Name */
/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros
@@ -34,13 +28,6 @@
/*
* Default environment variables
*/
#define CONFIG_BOOTCOMMAND \
"setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \
"ubi part root; " \
"ubifsmount ubi:root; " \
"ubifsload 0x800000 ${kernel}; " \
"ubifsload 0x1100000 ${initrd}; " \
"bootm 0x800000 0x1100000"
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=console=ttyS0,115200\0" \

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