Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians: board/mpl/pati: use the CFI driver for the PATI board board/mpl/mip405: use the CFI driver for the MIP405/MIP405T board board/mpl/pip405: use the CFI driver for the PIP405 board board/mpl/common: remove the old legacy flash ppc4xx: Setup HICB on Io64
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@@ -239,11 +239,17 @@
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
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#define CONFIG_SYS_UPDATE_FLASH_SIZE
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#define CONFIG_SYS_FLASH_PROTECTION
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#define CONFIG_SYS_FLASH_EMPTY_INFO
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#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_FLASH_SHOW_PROGRESS 45
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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/*
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* JFFS2 partitions
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@@ -291,6 +297,7 @@
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#define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */
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#define CONFIG_BOARD_EARLY_INIT_F 1
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#define CONFIG_BOARD_EARLY_INIT_R
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/* Peripheral Bus Mapping */
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#define PER_PLD_ADDR 0xF4000000 /* smallest window is 1MByte 0x10 0000*/
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@@ -168,11 +168,16 @@
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*
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max number of sectors on one chip */
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#define CONFIG_SYS_FLASH_ERASE_TOUT 180000 /* Timeout for Flash Erase (in ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 600 /* Timeout for Flash Write (in ms) */
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#define CONFIG_SYS_FLASH_PROTECTION
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#define CONFIG_SYS_FLASH_EMPTY_INFO
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_FLASH_SHOW_PROGRESS 45
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 128
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#define CONFIG_ENV_IS_IN_EEPROM
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#ifdef CONFIG_ENV_IS_IN_EEPROM
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@@ -113,6 +113,8 @@
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#define SPD_EEPROM_ADDRESS 0x50
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_BOARD_EARLY_INIT_R
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/**************************************************************
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* Environment definitions
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**************************************************************/
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@@ -230,11 +232,17 @@
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
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#define CONFIG_SYS_UPDATE_FLASH_SIZE
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#define CONFIG_SYS_FLASH_PROTECTION
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#define CONFIG_SYS_FLASH_EMPTY_INFO
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#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_FLASH_SHOW_PROGRESS 45
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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/*
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* Init Memory Controller:
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@@ -82,7 +82,10 @@ typedef struct ihs_fpga {
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u16 reserved_1[502]; /* 0x0014 */
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u16 ch0_status_int; /* 0x0400 */
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u16 ch0_config_int; /* 0x0402 */
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u16 reserved_2[7677]; /* 0x0404 */
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u16 reserved_2[126]; /* 0x0404 */
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u16 ch0_hicb_status_int;/* 0x0500 */
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u16 ch0_hicb_config_int;/* 0x0502 */
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u16 reserved_3[7549]; /* 0x0504 */
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u16 reflection_high; /* 0x3ffe */
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} ihs_fpga_t;
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#endif
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