From 04e5dd511555e3f87c6690c96e312a0a78a4a249 Mon Sep 17 00:00:00 2001 From: Angelo Durgehello Date: Fri, 15 Nov 2019 23:54:12 +0100 Subject: [PATCH 01/28] m68k: add fec base node to devicetrees Add basic ethernet controller devicetree nodes for all ColdFire families. Signed-off-by: Angelo Durgehello --- arch/m68k/dts/mcf5208.dtsi | 10 ++++++++++ arch/m68k/dts/mcf523x.dtsi | 12 ++++++++++++ arch/m68k/dts/mcf5271.dtsi | 10 ++++++++++ arch/m68k/dts/mcf5272.dtsi | 10 ++++++++++ arch/m68k/dts/mcf5275.dtsi | 22 +++++++++++++++++++++- arch/m68k/dts/mcf5282.dtsi | 10 ++++++++++ arch/m68k/dts/mcf5301x.dtsi | 21 +++++++++++++++++++++ arch/m68k/dts/mcf5329.dtsi | 10 ++++++++++ arch/m68k/dts/mcf537x.dtsi | 10 ++++++++++ arch/m68k/dts/mcf5441x.dtsi | 20 ++++++++++++++++++++ arch/m68k/dts/mcf5445x.dtsi | 20 ++++++++++++++++++++ arch/m68k/dts/mcf54xx.dtsi | 32 ++++++++++++++++++++++++++++++++ 12 files changed, 186 insertions(+), 1 deletion(-) diff --git a/arch/m68k/dts/mcf5208.dtsi b/arch/m68k/dts/mcf5208.dtsi index 558d8bf41a..4802dd3074 100644 --- a/arch/m68k/dts/mcf5208.dtsi +++ b/arch/m68k/dts/mcf5208.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -32,5 +33,14 @@ reg = <0xfc068000 0x40>; status = "disabled"; }; + + fec0: ethernet@fc030000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc030000 0x400>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; diff --git a/arch/m68k/dts/mcf523x.dtsi b/arch/m68k/dts/mcf523x.dtsi index 9e79d472ec..550e824cb1 100644 --- a/arch/m68k/dts/mcf523x.dtsi +++ b/arch/m68k/dts/mcf523x.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -39,6 +40,17 @@ reg = <0x280 0x40>; status = "disabled"; }; + + fec0: ethernet@1000 { + compatible = "fsl,mcf-fec"; + #address-cells=<2>; + #size-cells=<1>; + reg = <0x1000 0x400>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; }; diff --git a/arch/m68k/dts/mcf5271.dtsi b/arch/m68k/dts/mcf5271.dtsi index 29355528d0..b3484c2c84 100644 --- a/arch/m68k/dts/mcf5271.dtsi +++ b/arch/m68k/dts/mcf5271.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -39,6 +40,15 @@ reg = <0x280 0x40>; status = "disabled"; }; + + fec0: ethernet@1000 { + compatible = "fsl,mcf-fec"; + reg = <0x1000 0x400>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; }; diff --git a/arch/m68k/dts/mcf5272.dtsi b/arch/m68k/dts/mcf5272.dtsi index a56117728b..173baaba3f 100644 --- a/arch/m68k/dts/mcf5272.dtsi +++ b/arch/m68k/dts/mcf5272.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -33,6 +34,15 @@ reg = <0x140 0x40>; status = "disabled"; }; + + fec0: ethernet@840 { + compatible = "fsl,mcf-fec"; + reg = <0x840 0x400>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; }; diff --git a/arch/m68k/dts/mcf5275.dtsi b/arch/m68k/dts/mcf5275.dtsi index b375609d4a..99dd7d3924 100644 --- a/arch/m68k/dts/mcf5275.dtsi +++ b/arch/m68k/dts/mcf5275.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Angelo Dureghello + * Copyright (C) 2019 Angelo Dureghello */ / { @@ -8,6 +8,8 @@ aliases { serial0 = &uart0; + fec0 = &fec0; + fec1 = &fec1; }; soc { @@ -39,6 +41,24 @@ reg = <0x280 0x40>; status = "disabled"; }; + + fec0: ethernet@1000 { + compatible = "fsl,mcf-fec"; + reg = <0x1000 0x800>; + max-speed = <100>; + phy-addr = <(-1)>; + timeout-loop = <50000>; + status = "disabled"; + }; + + fec1: ethernet@1800 { + compatible = "fsl,mcf-fec"; + reg = <0x1800 0x800>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; }; diff --git a/arch/m68k/dts/mcf5282.dtsi b/arch/m68k/dts/mcf5282.dtsi index 3ad1be7bb5..d9916b1cd9 100644 --- a/arch/m68k/dts/mcf5282.dtsi +++ b/arch/m68k/dts/mcf5282.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -39,6 +40,15 @@ reg = <0x280 0x40>; status = "disabled"; }; + + fec0: ethernet@1000 { + compatible = "fsl,mcf-fec"; + reg = <0x1000 0x800>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; }; diff --git a/arch/m68k/dts/mcf5301x.dtsi b/arch/m68k/dts/mcf5301x.dtsi index 0891e4dfd5..f60898aa4a 100644 --- a/arch/m68k/dts/mcf5301x.dtsi +++ b/arch/m68k/dts/mcf5301x.dtsi @@ -9,6 +9,8 @@ aliases { serial0 = &uart0; spi0 = &dspi0; + fec0 = &fec0; + fec1 = &fec1; }; soc { @@ -44,5 +46,24 @@ spi-mode = <0>; status = "disabled"; }; + + fec0: ethernet@fc030000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc030000 0x200>; + mii-base = <0>; + max-speed = <100>; + phy-addr = <(-1)>; + timeout-loop = <50000>; + status = "disabled"; + }; + + fec1: ethernet@fc034000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc034000 0x800>; + mii-base = <1>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; diff --git a/arch/m68k/dts/mcf5329.dtsi b/arch/m68k/dts/mcf5329.dtsi index aeaa6430af..de348968b5 100644 --- a/arch/m68k/dts/mcf5329.dtsi +++ b/arch/m68k/dts/mcf5329.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -32,5 +33,14 @@ reg = <0xfc068000 0x40>; status = "disabled"; }; + + fec0: ethernet@fc030000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc030000 0x800>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; diff --git a/arch/m68k/dts/mcf537x.dtsi b/arch/m68k/dts/mcf537x.dtsi index aeaa6430af..2a2a32a59b 100644 --- a/arch/m68k/dts/mcf537x.dtsi +++ b/arch/m68k/dts/mcf537x.dtsi @@ -8,6 +8,7 @@ aliases { serial0 = &uart0; + fec0 = &fec0; }; soc { @@ -32,5 +33,14 @@ reg = <0xfc068000 0x40>; status = "disabled"; }; + + fec0: ethernet@fc030000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc030000 0x400>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; diff --git a/arch/m68k/dts/mcf5441x.dtsi b/arch/m68k/dts/mcf5441x.dtsi index 71b392adc3..6769bdc270 100644 --- a/arch/m68k/dts/mcf5441x.dtsi +++ b/arch/m68k/dts/mcf5441x.dtsi @@ -9,6 +9,8 @@ aliases { serial0 = &uart0; spi0 = &dspi0; + fec0 = &fec0; + fec1 = &fec1; }; soc { @@ -83,5 +85,23 @@ spi-mode = <0>; status = "disabled"; }; + + fec0: ethernet@fc0d4000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc0d4000 0x4000>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; + + fec1: ethernet@fc0d8000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc0d8000 0x4000>; + mii-base = <1>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; diff --git a/arch/m68k/dts/mcf5445x.dtsi b/arch/m68k/dts/mcf5445x.dtsi index ccbee29a6c..b7ecc99c09 100644 --- a/arch/m68k/dts/mcf5445x.dtsi +++ b/arch/m68k/dts/mcf5445x.dtsi @@ -9,6 +9,8 @@ aliases { serial0 = &uart0; spi0 = &dspi0; + fec0 = &fec0; + fec1 = &fec1; }; soc { @@ -44,5 +46,23 @@ spi-mode = <0>; status = "disabled"; }; + + fec0: ethernet@fc030000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc030000 0x4000>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; + + fec1: ethernet@fc034000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc034000 0x4000>; + mii-base = <1>; + max-speed = <100>; + timeout-loop = <50000>; + status = "disabled"; + }; }; }; diff --git a/arch/m68k/dts/mcf54xx.dtsi b/arch/m68k/dts/mcf54xx.dtsi index 537bb424f3..e9cebb9f74 100644 --- a/arch/m68k/dts/mcf54xx.dtsi +++ b/arch/m68k/dts/mcf54xx.dtsi @@ -11,6 +11,8 @@ * no UARTS. */ spi0 = &dspi0; + fec0 = &fec0; + fec1 = &fec1; }; soc { @@ -35,6 +37,36 @@ spi-mode = <0>; status = "disabled"; }; + + fec0: ethernet@9000 { + compatible = "fsl,mcf-dma-fec"; + reg = <0x9000 0x800>; + mii-base = <0>; + max-speed = <100>; + timeout-loop = <50000>; + rx-task = <0>; + tx-task = <1>; + rx-piority = <6>; + tx-piority = <7>; + rx-init = <16>; + tx-init = <17>; + status = "disabled"; + }; + + fec1: ethernet@9800 { + compatible = "fsl,mcf-dma-fec"; + reg = <0x9800 0x800>; + mii-base = <1>; + max-speed = <100>; + timeout-loop = <50000>; + rx-task = <2>; + tx-task = <3>; + rx-piority = <6>; + tx-piority = <7>; + rx-init = <30>; + tx-init = <31>; + status = "disabled"; + }; }; }; }; From 0dac80110c81747d90e22aae27f9a8e64b2aecc9 Mon Sep 17 00:00:00 2001 From: Angelo Durgehello Date: Fri, 15 Nov 2019 23:54:13 +0100 Subject: [PATCH 02/28] m68k: add fec fdt overrides to all boards Add ethernet controller overrides for all involved boards. Signed-off-by: Angelo Durgehello --- arch/m68k/dts/M5208EVBE.dts | 3 +++ arch/m68k/dts/M5235EVB.dts | 3 +++ arch/m68k/dts/M5235EVB_Flash32.dts | 3 +++ arch/m68k/dts/M5272C3.dts | 3 +++ arch/m68k/dts/M5275EVB.dts | 7 +++++++ arch/m68k/dts/M5282EVB.dts | 3 +++ arch/m68k/dts/M53017EVB.dts | 7 +++++++ arch/m68k/dts/M5329AFEE.dts | 3 +++ arch/m68k/dts/M5329BFEE.dts | 3 +++ arch/m68k/dts/M5373EVB.dts | 3 +++ arch/m68k/dts/M54418TWR.dts | 9 +++++++++ arch/m68k/dts/M54418TWR_nand_mii.dts | 9 +++++++++ arch/m68k/dts/M54418TWR_nand_rmii.dts | 9 +++++++++ arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts | 9 +++++++++ arch/m68k/dts/M54418TWR_serial_mii.dts | 9 +++++++++ arch/m68k/dts/M54418TWR_serial_rmii.dts | 9 +++++++++ arch/m68k/dts/M54451EVB.dts | 8 ++++++++ arch/m68k/dts/M54451EVB_stmicro.dts | 8 ++++++++ arch/m68k/dts/M54455EVB.dts | 9 +++++++++ arch/m68k/dts/M54455EVB_a66.dts | 9 +++++++++ arch/m68k/dts/M54455EVB_i66.dts | 9 +++++++++ arch/m68k/dts/M54455EVB_intel.dts | 8 ++++++++ arch/m68k/dts/M54455EVB_stm33.dts | 9 +++++++++ arch/m68k/dts/M5475AFE.dts | 8 ++++++++ arch/m68k/dts/M5475BFE.dts | 8 ++++++++ arch/m68k/dts/M5475CFE.dts | 8 ++++++++ arch/m68k/dts/M5475DFE.dts | 8 ++++++++ arch/m68k/dts/M5475EFE.dts | 8 ++++++++ arch/m68k/dts/M5475FFE.dts | 8 ++++++++ arch/m68k/dts/M5475GFE.dts | 8 ++++++++ arch/m68k/dts/M5485AFE.dts | 8 ++++++++ arch/m68k/dts/M5485BFE.dts | 8 ++++++++ arch/m68k/dts/M5485CFE.dts | 8 ++++++++ arch/m68k/dts/M5485DFE.dts | 8 ++++++++ arch/m68k/dts/M5485EFE.dts | 8 ++++++++ arch/m68k/dts/M5485FFE.dts | 8 ++++++++ arch/m68k/dts/M5485GFE.dts | 8 ++++++++ arch/m68k/dts/M5485HFE.dts | 8 ++++++++ arch/m68k/dts/cobra5272.dts | 3 +++ arch/m68k/dts/eb_cpu5282.dts | 3 +++ arch/m68k/dts/eb_cpu5282_internal.dts | 3 +++ arch/m68k/dts/stmark2.dts | 9 +++++++++ 42 files changed, 290 insertions(+) diff --git a/arch/m68k/dts/M5208EVBE.dts b/arch/m68k/dts/M5208EVBE.dts index e78513f3b8..3e5a698861 100644 --- a/arch/m68k/dts/M5208EVBE.dts +++ b/arch/m68k/dts/M5208EVBE.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5235EVB.dts b/arch/m68k/dts/M5235EVB.dts index 1a32539323..b170b7bd03 100644 --- a/arch/m68k/dts/M5235EVB.dts +++ b/arch/m68k/dts/M5235EVB.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5235EVB_Flash32.dts b/arch/m68k/dts/M5235EVB_Flash32.dts index fcbffb23f5..497d824541 100644 --- a/arch/m68k/dts/M5235EVB_Flash32.dts +++ b/arch/m68k/dts/M5235EVB_Flash32.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5272C3.dts b/arch/m68k/dts/M5272C3.dts index 6efb8a4cc5..0ecf1e7429 100644 --- a/arch/m68k/dts/M5272C3.dts +++ b/arch/m68k/dts/M5272C3.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5275EVB.dts b/arch/m68k/dts/M5275EVB.dts index cd9eb7d145..f0f573c08c 100644 --- a/arch/m68k/dts/M5275EVB.dts +++ b/arch/m68k/dts/M5275EVB.dts @@ -20,3 +20,10 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5282EVB.dts b/arch/m68k/dts/M5282EVB.dts index 9527caafc2..9b506635b9 100644 --- a/arch/m68k/dts/M5282EVB.dts +++ b/arch/m68k/dts/M5282EVB.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M53017EVB.dts b/arch/m68k/dts/M53017EVB.dts index b267488e0f..401318ddf9 100644 --- a/arch/m68k/dts/M53017EVB.dts +++ b/arch/m68k/dts/M53017EVB.dts @@ -20,3 +20,10 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5329AFEE.dts b/arch/m68k/dts/M5329AFEE.dts index 7d121d68e7..ab009c5605 100644 --- a/arch/m68k/dts/M5329AFEE.dts +++ b/arch/m68k/dts/M5329AFEE.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5329BFEE.dts b/arch/m68k/dts/M5329BFEE.dts index cd087b6ea6..7e73ab9c66 100644 --- a/arch/m68k/dts/M5329BFEE.dts +++ b/arch/m68k/dts/M5329BFEE.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M5373EVB.dts b/arch/m68k/dts/M5373EVB.dts index 930f911d4a..4e1b7aeb77 100644 --- a/arch/m68k/dts/M5373EVB.dts +++ b/arch/m68k/dts/M5373EVB.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M54418TWR.dts b/arch/m68k/dts/M54418TWR.dts index 7765c7abbb..058707fdf0 100644 --- a/arch/m68k/dts/M54418TWR.dts +++ b/arch/m68k/dts/M54418TWR.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54418TWR_nand_mii.dts b/arch/m68k/dts/M54418TWR_nand_mii.dts index 9b1cb85325..8afcb0fb99 100644 --- a/arch/m68k/dts/M54418TWR_nand_mii.dts +++ b/arch/m68k/dts/M54418TWR_nand_mii.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54418TWR_nand_rmii.dts b/arch/m68k/dts/M54418TWR_nand_rmii.dts index 824a66af48..fc2eb5b3bc 100644 --- a/arch/m68k/dts/M54418TWR_nand_rmii.dts +++ b/arch/m68k/dts/M54418TWR_nand_rmii.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts b/arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts index 74fa197ea9..a39d1023b2 100644 --- a/arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts +++ b/arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54418TWR_serial_mii.dts b/arch/m68k/dts/M54418TWR_serial_mii.dts index 22f27b5612..edf98db003 100644 --- a/arch/m68k/dts/M54418TWR_serial_mii.dts +++ b/arch/m68k/dts/M54418TWR_serial_mii.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54418TWR_serial_rmii.dts b/arch/m68k/dts/M54418TWR_serial_rmii.dts index 0ddefd9da2..e4639fe431 100644 --- a/arch/m68k/dts/M54418TWR_serial_rmii.dts +++ b/arch/m68k/dts/M54418TWR_serial_rmii.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54451EVB.dts b/arch/m68k/dts/M54451EVB.dts index b57bfea2cb..b81d37a938 100644 --- a/arch/m68k/dts/M54451EVB.dts +++ b/arch/m68k/dts/M54451EVB.dts @@ -23,3 +23,11 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M54451EVB_stmicro.dts b/arch/m68k/dts/M54451EVB_stmicro.dts index 9a088e16d0..6645b58065 100644 --- a/arch/m68k/dts/M54451EVB_stmicro.dts +++ b/arch/m68k/dts/M54451EVB_stmicro.dts @@ -23,3 +23,11 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; +}; diff --git a/arch/m68k/dts/M54455EVB.dts b/arch/m68k/dts/M54455EVB.dts index dd11181033..b0ffb5144d 100644 --- a/arch/m68k/dts/M54455EVB.dts +++ b/arch/m68k/dts/M54455EVB.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54455EVB_a66.dts b/arch/m68k/dts/M54455EVB_a66.dts index 70d544b72d..c2557bd2e6 100644 --- a/arch/m68k/dts/M54455EVB_a66.dts +++ b/arch/m68k/dts/M54455EVB_a66.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54455EVB_i66.dts b/arch/m68k/dts/M54455EVB_i66.dts index b37a87213f..3c9161bfae 100644 --- a/arch/m68k/dts/M54455EVB_i66.dts +++ b/arch/m68k/dts/M54455EVB_i66.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54455EVB_intel.dts b/arch/m68k/dts/M54455EVB_intel.dts index c92228fc8b..54209d25a7 100644 --- a/arch/m68k/dts/M54455EVB_intel.dts +++ b/arch/m68k/dts/M54455EVB_intel.dts @@ -24,3 +24,11 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M54455EVB_stm33.dts b/arch/m68k/dts/M54455EVB_stm33.dts index 9e467f94a1..701b9a719b 100644 --- a/arch/m68k/dts/M54455EVB_stm33.dts +++ b/arch/m68k/dts/M54455EVB_stm33.dts @@ -23,3 +23,12 @@ &dspi0 { status = "okay"; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475AFE.dts b/arch/m68k/dts/M5475AFE.dts index 0c0a79befa..7895b520cf 100644 --- a/arch/m68k/dts/M5475AFE.dts +++ b/arch/m68k/dts/M5475AFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475AFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475BFE.dts b/arch/m68k/dts/M5475BFE.dts index c4d14097cd..ffbc2d6a06 100644 --- a/arch/m68k/dts/M5475BFE.dts +++ b/arch/m68k/dts/M5475BFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475BFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475CFE.dts b/arch/m68k/dts/M5475CFE.dts index 4c92c332ba..f1033f7efb 100644 --- a/arch/m68k/dts/M5475CFE.dts +++ b/arch/m68k/dts/M5475CFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475CFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475DFE.dts b/arch/m68k/dts/M5475DFE.dts index c41c1b3c12..69a8faba83 100644 --- a/arch/m68k/dts/M5475DFE.dts +++ b/arch/m68k/dts/M5475DFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475DFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475EFE.dts b/arch/m68k/dts/M5475EFE.dts index 5a920b241a..3c898958c8 100644 --- a/arch/m68k/dts/M5475EFE.dts +++ b/arch/m68k/dts/M5475EFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475EFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475FFE.dts b/arch/m68k/dts/M5475FFE.dts index d312a6ae8d..bb3c21588f 100644 --- a/arch/m68k/dts/M5475FFE.dts +++ b/arch/m68k/dts/M5475FFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475FFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5475GFE.dts b/arch/m68k/dts/M5475GFE.dts index 9e794dafa6..75080fa737 100644 --- a/arch/m68k/dts/M5475GFE.dts +++ b/arch/m68k/dts/M5475GFE.dts @@ -11,3 +11,11 @@ compatible = "fsl,M5475GFE"; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485AFE.dts b/arch/m68k/dts/M5485AFE.dts index 3466751174..b1f5bf0f56 100644 --- a/arch/m68k/dts/M5485AFE.dts +++ b/arch/m68k/dts/M5485AFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485BFE.dts b/arch/m68k/dts/M5485BFE.dts index 6d48795a4d..10b8f5b201 100644 --- a/arch/m68k/dts/M5485BFE.dts +++ b/arch/m68k/dts/M5485BFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485CFE.dts b/arch/m68k/dts/M5485CFE.dts index d1a7d9d383..a1ae64f65c 100644 --- a/arch/m68k/dts/M5485CFE.dts +++ b/arch/m68k/dts/M5485CFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485DFE.dts b/arch/m68k/dts/M5485DFE.dts index 7c362e26e5..9b38d451fc 100644 --- a/arch/m68k/dts/M5485DFE.dts +++ b/arch/m68k/dts/M5485DFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485EFE.dts b/arch/m68k/dts/M5485EFE.dts index 4c688dce2b..a1ac3f5a48 100644 --- a/arch/m68k/dts/M5485EFE.dts +++ b/arch/m68k/dts/M5485EFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485FFE.dts b/arch/m68k/dts/M5485FFE.dts index 87ec2c543d..7f22de49f4 100644 --- a/arch/m68k/dts/M5485FFE.dts +++ b/arch/m68k/dts/M5485FFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485GFE.dts b/arch/m68k/dts/M5485GFE.dts index 9f67e5516b..3430aa7279 100644 --- a/arch/m68k/dts/M5485GFE.dts +++ b/arch/m68k/dts/M5485GFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/M5485HFE.dts b/arch/m68k/dts/M5485HFE.dts index 2eb2213d78..57c98f1ef7 100644 --- a/arch/m68k/dts/M5485HFE.dts +++ b/arch/m68k/dts/M5485HFE.dts @@ -15,3 +15,11 @@ }; }; +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; diff --git a/arch/m68k/dts/cobra5272.dts b/arch/m68k/dts/cobra5272.dts index f3b74975de..6085eee5b3 100644 --- a/arch/m68k/dts/cobra5272.dts +++ b/arch/m68k/dts/cobra5272.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/eb_cpu5282.dts b/arch/m68k/dts/eb_cpu5282.dts index 4641e9cb56..655c4ecf5a 100644 --- a/arch/m68k/dts/eb_cpu5282.dts +++ b/arch/m68k/dts/eb_cpu5282.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/eb_cpu5282_internal.dts b/arch/m68k/dts/eb_cpu5282_internal.dts index 0acb7935f4..f5a044d7cc 100644 --- a/arch/m68k/dts/eb_cpu5282_internal.dts +++ b/arch/m68k/dts/eb_cpu5282_internal.dts @@ -20,3 +20,6 @@ status = "okay"; }; +&fec0 { + status = "okay"; +}; diff --git a/arch/m68k/dts/stmark2.dts b/arch/m68k/dts/stmark2.dts index fd8ce4fa35..306b56d679 100644 --- a/arch/m68k/dts/stmark2.dts +++ b/arch/m68k/dts/stmark2.dts @@ -32,3 +32,12 @@ reg = <1>; }; }; + +&fec0 { + status = "okay"; +}; + +&fec1 { + status = "okay"; + mii-base = <0>; +}; From 549c5cda7c9b2ab34cb308f0f77c658fa3daf0e7 Mon Sep 17 00:00:00 2001 From: Angelo Durgehello Date: Fri, 15 Nov 2019 23:54:14 +0100 Subject: [PATCH 03/28] configs: add eth dm support for all ColdFire boards Add dm eth config options for all involved ColdFire-based boards. Signed-off-by: Angelo Durgehello --- configs/M5208EVBE_defconfig | 2 ++ configs/M5235EVB_Flash32_defconfig | 2 ++ configs/M5235EVB_defconfig | 2 ++ configs/M5272C3_defconfig | 2 ++ configs/M5275EVB_defconfig | 2 ++ configs/M5282EVB_defconfig | 2 ++ configs/M53017EVB_defconfig | 2 ++ configs/M5329AFEE_defconfig | 2 ++ configs/M5329BFEE_defconfig | 2 ++ configs/M5373EVB_defconfig | 2 ++ configs/M54418TWR_defconfig | 2 ++ configs/M54418TWR_nand_mii_defconfig | 2 ++ configs/M54418TWR_nand_rmii_defconfig | 2 ++ configs/M54418TWR_nand_rmii_lowfreq_defconfig | 2 ++ configs/M54418TWR_serial_mii_defconfig | 2 ++ configs/M54418TWR_serial_rmii_defconfig | 2 ++ configs/M54451EVB_defconfig | 2 ++ configs/M54451EVB_stmicro_defconfig | 2 ++ configs/M54455EVB_a66_defconfig | 2 ++ configs/M54455EVB_defconfig | 2 ++ configs/M54455EVB_i66_defconfig | 2 ++ configs/M54455EVB_intel_defconfig | 2 ++ configs/M54455EVB_stm33_defconfig | 2 ++ configs/M5475AFE_defconfig | 3 +++ configs/M5475BFE_defconfig | 3 +++ configs/M5475CFE_defconfig | 3 +++ configs/M5475DFE_defconfig | 3 +++ configs/M5475EFE_defconfig | 3 +++ configs/M5475FFE_defconfig | 3 +++ configs/M5475GFE_defconfig | 3 +++ configs/M5485AFE_defconfig | 3 +++ configs/M5485BFE_defconfig | 3 +++ configs/M5485CFE_defconfig | 3 +++ configs/M5485DFE_defconfig | 3 +++ configs/M5485EFE_defconfig | 3 +++ configs/M5485FFE_defconfig | 3 +++ configs/M5485GFE_defconfig | 3 +++ configs/M5485HFE_defconfig | 3 +++ configs/cobra5272_defconfig | 2 ++ configs/eb_cpu5282_defconfig | 2 ++ configs/eb_cpu5282_internal_defconfig | 2 ++ 41 files changed, 97 insertions(+) diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 0b015ff83f..69cb4f4a45 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -21,4 +21,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index 3c79ff0542..5f03baeddc 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -26,4 +26,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 347782cecf..9807aa4b64 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -26,4 +26,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index afd5c44b10..88da3a3027 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -22,4 +22,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index d4f6d427a1..72934ec019 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -23,4 +23,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index bbf394dcde..b8505a1b36 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -22,4 +22,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index bf467bb8e9..d5a56d5142 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -24,4 +24,6 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 0d27738049..f93f10d1af 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -25,5 +25,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MTD_RAW_NAND=y CONFIG_MII=y diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index 2475a6b629..c7bd7cd3da 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -25,5 +25,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MTD_RAW_NAND=y CONFIG_MII=y diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index f9d5048445..5ba2343da4 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -25,5 +25,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MTD_RAW_NAND=y CONFIG_MII=y diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig index 06019ecfe6..4cecb5a15b 100644 --- a/configs/M54418TWR_defconfig +++ b/configs/M54418TWR_defconfig @@ -28,6 +28,8 @@ CONFIG_ENV_SPI_CS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig index 9f043ce981..560e1c16be 100644 --- a/configs/M54418TWR_nand_mii_defconfig +++ b/configs/M54418TWR_nand_mii_defconfig @@ -25,6 +25,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig index 87e3de09c0..4e1357a179 100644 --- a/configs/M54418TWR_nand_rmii_defconfig +++ b/configs/M54418TWR_nand_rmii_defconfig @@ -25,6 +25,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig index 8d77672ca9..5f530f4299 100644 --- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig +++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig @@ -25,6 +25,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig index 52992ef2ba..014cc25792 100644 --- a/configs/M54418TWR_serial_mii_defconfig +++ b/configs/M54418TWR_serial_mii_defconfig @@ -28,6 +28,8 @@ CONFIG_ENV_SPI_CS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig index 3f001bd1c7..18e7fe9317 100644 --- a/configs/M54418TWR_serial_rmii_defconfig +++ b/configs/M54418TWR_serial_rmii_defconfig @@ -28,6 +28,8 @@ CONFIG_ENV_SPI_CS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig index 26471de8fd..1addf85c53 100644 --- a/configs/M54451EVB_defconfig +++ b/configs/M54451EVB_defconfig @@ -32,6 +32,8 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig index 16cc02ad87..f9aa2d0d5d 100644 --- a/configs/M54451EVB_stmicro_defconfig +++ b/configs/M54451EVB_stmicro_defconfig @@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig index 997164ca15..97596888dd 100644 --- a/configs/M54455EVB_a66_defconfig +++ b/configs/M54455EVB_a66_defconfig @@ -36,6 +36,8 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig index d782c4bcd0..fec8aa8ec1 100644 --- a/configs/M54455EVB_defconfig +++ b/configs/M54455EVB_defconfig @@ -37,6 +37,8 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig index 5311b19d97..4f531307b4 100644 --- a/configs/M54455EVB_i66_defconfig +++ b/configs/M54455EVB_i66_defconfig @@ -36,6 +36,8 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig index 4039093fcd..f7ffc54d85 100644 --- a/configs/M54455EVB_intel_defconfig +++ b/configs/M54455EVB_intel_defconfig @@ -36,6 +36,8 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig index 09a273ecc0..83fdaf79de 100644 --- a/configs/M54455EVB_stm33_defconfig +++ b/configs/M54455EVB_stm33_defconfig @@ -39,6 +39,8 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/M5475AFE_defconfig b/configs/M5475AFE_defconfig index dcb100ad21..fd571b0c5b 100644 --- a/configs/M5475AFE_defconfig +++ b/configs/M5475AFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5475BFE_defconfig b/configs/M5475BFE_defconfig index d1a5a6c97c..9b82c86fa8 100644 --- a/configs/M5475BFE_defconfig +++ b/configs/M5475BFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5475CFE_defconfig b/configs/M5475CFE_defconfig index bf2eb8f8c1..762984b2f9 100644 --- a/configs/M5475CFE_defconfig +++ b/configs/M5475CFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5475DFE_defconfig b/configs/M5475DFE_defconfig index 424e7f23dd..8fe196340c 100644 --- a/configs/M5475DFE_defconfig +++ b/configs/M5475DFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5475EFE_defconfig b/configs/M5475EFE_defconfig index 7e947c66ac..f2c32e1942 100644 --- a/configs/M5475EFE_defconfig +++ b/configs/M5475EFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5475FFE_defconfig b/configs/M5475FFE_defconfig index a12b62ac1f..b28b6eb8d7 100644 --- a/configs/M5475FFE_defconfig +++ b/configs/M5475FFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5475GFE_defconfig b/configs/M5475GFE_defconfig index 594b0c0a98..e0ddd648d4 100644 --- a/configs/M5475GFE_defconfig +++ b/configs/M5475GFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485AFE_defconfig b/configs/M5485AFE_defconfig index ab96ba7758..34e1cb7d35 100644 --- a/configs/M5485AFE_defconfig +++ b/configs/M5485AFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485BFE_defconfig b/configs/M5485BFE_defconfig index 0a7c2bffb0..42b5b4e883 100644 --- a/configs/M5485BFE_defconfig +++ b/configs/M5485BFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485CFE_defconfig b/configs/M5485CFE_defconfig index 84f8ebae7d..9503c03c58 100644 --- a/configs/M5485CFE_defconfig +++ b/configs/M5485CFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485DFE_defconfig b/configs/M5485DFE_defconfig index 25d54630ae..e1b80bd459 100644 --- a/configs/M5485DFE_defconfig +++ b/configs/M5485DFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485EFE_defconfig b/configs/M5485EFE_defconfig index de82703c8f..13c6a325ea 100644 --- a/configs/M5485EFE_defconfig +++ b/configs/M5485EFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485FFE_defconfig b/configs/M5485FFE_defconfig index c910103342..b42deff600 100644 --- a/configs/M5485FFE_defconfig +++ b/configs/M5485FFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485GFE_defconfig b/configs/M5485GFE_defconfig index c7f47703e1..0a58736b00 100644 --- a/configs/M5485GFE_defconfig +++ b/configs/M5485GFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485HFE_defconfig b/configs/M5485HFE_defconfig index 4b03ee0094..8f51600b76 100644 --- a/configs/M5485HFE_defconfig +++ b/configs/M5485HFE_defconfig @@ -23,7 +23,10 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_FSLDMAFEC=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig index 3bc76ac69c..1360a937b0 100644 --- a/configs/cobra5272_defconfig +++ b/configs/cobra5272_defconfig @@ -17,5 +17,7 @@ CONFIG_DEFAULT_DEVICE_TREE="cobra5272" CONFIG_ENV_ADDR=0xFFE04000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MTD_NOR_FLASH=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_BAUDRATE=19200 diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index 2d9caec5f2..951d1417f0 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -29,6 +29,8 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_VIDEO=y # CONFIG_CFB_CONSOLE is not set diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index 411cbc935e..7cb20ecb91 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -28,6 +28,8 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_ETH=y +CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_VIDEO=y # CONFIG_CFB_CONSOLE is not set From ff56f2b7263fae9132c13078ccd8d9604cf1e139 Mon Sep 17 00:00:00 2001 From: Angelo Durgehello Date: Fri, 15 Nov 2019 23:54:15 +0100 Subject: [PATCH 04/28] configs: purge unneeded fec defines Remove unneeded fec-related defines after fec moved as dm. Signed-off-by: Angelo Durgehello --- include/configs/M5208EVBE.h | 5 ----- include/configs/M5235EVB.h | 5 ----- include/configs/M5272C3.h | 6 ------ include/configs/M5275EVB.h | 6 ------ include/configs/M5282EVB.h | 6 ------ include/configs/M53017EVB.h | 7 ------- include/configs/M5329EVB.h | 5 ----- include/configs/M5373EVB.h | 5 ----- include/configs/M54418TWR.h | 9 --------- include/configs/M54451EVB.h | 6 ------ include/configs/M54455EVB.h | 8 -------- include/configs/M5475EVB.h | 10 ---------- include/configs/M5485EVB.h | 10 ---------- include/configs/cobra5272.h | 10 ---------- include/configs/eb_cpu5282.h | 8 ++------ include/configs/stmark2.h | 15 +++++++++++++++ 16 files changed, 17 insertions(+), 104 deletions(-) diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 867ae8be6d..27a3eb214e 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -19,17 +19,12 @@ #undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 5000 -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define CONFIG_HAS_ETH1 - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define MCFFEC_TOUT_LOOP 50000 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 3c56cec425..d062bc1cd1 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -29,16 +29,11 @@ */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define MCFFEC_TOUT_LOOP 50000 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index bd9ae53d20..4f5e609255 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -42,17 +42,11 @@ /* * Command line configuration. */ - -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define MCFFEC_TOUT_LOOP 50000 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index e9fcb5dfbc..3efed0fb37 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -41,17 +41,11 @@ /* Available command configuration */ -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC #define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY #define CONFIG_SYS_RX_ETH_BUFFER 8 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -#define CONFIG_SYS_FEC0_PINMUX 0 -#define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -#define CONFIG_SYS_FEC1_PINMUX 0 -#define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE -#define MCFFEC_TOUT_LOOP 50000 #define CONFIG_HAS_ETH1 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ #ifndef CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index dfaa847af3..62b3d3183d 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -39,17 +39,11 @@ /* * Command line configuration. */ - -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define MCFFEC_TOUT_LOOP 50000 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 24eb36159b..1756c99640 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -26,7 +26,6 @@ #define CONFIG_SYS_UNIFY_CACHE -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY @@ -36,12 +35,6 @@ # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define CONFIG_HAS_ETH1 -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define CONFIG_SYS_FEC1_PINMUX 0 -# define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE -# define MCFFEC_TOUT_LOOP 50000 - /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 2cff0d6cf6..68693708e2 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -26,16 +26,11 @@ #define CONFIG_SYS_UNIFY_CACHE -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define MCFFEC_TOUT_LOOP 50000 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 576c075a17..5a28ea850a 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -26,16 +26,11 @@ #define CONFIG_SYS_UNIFY_CACHE -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define MCFFEC_TOUT_LOOP 50000 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index 72cc13ab79..b3c1bd7343 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -46,7 +46,6 @@ #endif /* Network configuration */ -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC #define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY @@ -55,14 +54,6 @@ #define CONFIG_SYS_TX_ETH_BUFFER 2 #define CONFIG_HAS_ETH1 -#define CONFIG_SYS_FEC0_PINMUX 0 -#define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -#define CONFIG_SYS_FEC1_PINMUX 0 -#define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC0_MIIBASE -#define MCFFEC_TOUT_LOOP 50000 -#define CONFIG_SYS_FEC0_PHYADDR 0 -#define CONFIG_SYS_FEC1_PHYADDR 1 - #define CONFIG_ETHPRIME "FEC0" #define CONFIG_IPADDR 192.168.1.2 #define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index 5482edeb2d..7f7a3715bc 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -34,17 +34,11 @@ #define CONFIG_BOOTP_BOOTFILESIZE /* Network configuration */ -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define MCFFEC_TOUT_LOOP 50000 - # define CONFIG_ETHPRIME "FEC0" # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 9434cc278e..a5462cf724 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -34,20 +34,12 @@ #define CONFIG_BOOTP_BOOTFILESIZE /* Network configuration */ -#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC1_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define MCFFEC_TOUT_LOOP 50000 # define CONFIG_HAS_ETH1 - # define CONFIG_ETHPRIME "FEC0" # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index 7215923507..f5c007127e 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -26,23 +26,14 @@ #define CONFIG_SLTTMR -#define CONFIG_FSLDMAFEC #ifdef CONFIG_FSLDMAFEC # define CONFIG_MII_INIT 1 # define CONFIG_HAS_ETH1 - # define CONFIG_SYS_DMA_USE_INTSRAM 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 32 # define CONFIG_SYS_TX_ETH_BUFFER 48 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define CONFIG_SYS_FEC1_PINMUX 0 -# define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC0_IOBASE - -# define MCFFEC_TOUT_LOOP 50000 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL @@ -57,7 +48,6 @@ # define CONFIG_NETMASK 255.255.255.0 # define CONFIG_SERVERIP 192.162.1.1 # define CONFIG_GATEWAYIP 192.162.1.1 - #endif #ifdef CONFIG_CMD_USB diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h index 49d5d9cf11..ccc88ac316 100644 --- a/include/configs/M5485EVB.h +++ b/include/configs/M5485EVB.h @@ -26,23 +26,14 @@ #define CONFIG_SLTTMR -#define CONFIG_FSLDMAFEC #ifdef CONFIG_FSLDMAFEC # define CONFIG_MII_INIT 1 # define CONFIG_HAS_ETH1 - # define CONFIG_SYS_DMA_USE_INTSRAM 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 32 # define CONFIG_SYS_TX_ETH_BUFFER 48 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define CONFIG_SYS_FEC1_PINMUX 0 -# define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC0_IOBASE - -# define MCFFEC_TOUT_LOOP 50000 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL @@ -57,7 +48,6 @@ # define CONFIG_NETMASK 255.255.255.0 # define CONFIG_SERVERIP 192.162.1.1 # define CONFIG_GATEWAYIP 192.162.1.1 - #endif #ifdef CONFIG_CMD_USB diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index b6c3cd88ba..a9f5e5e8a5 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -32,12 +32,6 @@ #define CONFIG_SYS_CLK 66000000 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -/* --- - * Enable use of Ethernet - * --- - */ -#define CONFIG_MCFFEC - /* Enable Dma Timer */ #define CONFIG_MCFTMR @@ -110,10 +104,6 @@ # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -# define CONFIG_SYS_FEC0_PINMUX 0 -# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -# define MCFFEC_TOUT_LOOP 50000 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index f8de8d3467..61c321c132 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -73,17 +73,13 @@ * Network * *----------------------------------------------------------------------*/ -#define CONFIG_MCFFEC +#ifdef CONFIG_MCFFEC #define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY #define CONFIG_SYS_RX_ETH_BUFFER 8 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -#define CONFIG_SYS_FEC0_PINMUX 0 -#define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE -#define MCFFEC_TOUT_LOOP 50000 - #define CONFIG_OVERWRITE_ETHADDR_ONCE +#endif /*------------------------------------------------------------------------- * Low Level Configuration Settings diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index a08d9950bd..d6ba1f64f3 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -163,4 +163,19 @@ #define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 12) +#ifdef CONFIG_MCFFEC +#define CONFIG_MII_INIT 1 +#define CONFIG_SYS_DISCOVER_PHY +#define CONFIG_SYS_RX_ETH_BUFFER 8 +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ +#ifndef CONFIG_SYS_DISCOVER_PHY +#define FECDUPLEX FULL +#define FECSPEED _100BASET +#else +#ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#endif +#endif /* CONFIG_SYS_DISCOVER_PHY */ +#endif #endif /* __STMARK2_CONFIG_H */ From ad420937558a9b3bc0e93d9693b34f57cf4480a0 Mon Sep 17 00:00:00 2001 From: Angelo Durgehello Date: Fri, 15 Nov 2019 23:54:16 +0100 Subject: [PATCH 05/28] m68k: add dm fec support Add architecture-related code for dm fec support. Signed-off-by: Angelo Durgehello --- arch/m68k/cpu/mcf523x/cpu_init.c | 2 +- arch/m68k/cpu/mcf52x2/cpu_init.c | 19 ++++--- arch/m68k/cpu/mcf532x/cpu.c | 1 - arch/m68k/cpu/mcf532x/cpu_init.c | 21 +++++--- arch/m68k/cpu/mcf5445x/cpu_init.c | 16 +++--- arch/m68k/cpu/mcf547x_8x/cpu_init.c | 12 +++-- arch/m68k/include/asm/fec.h | 21 ++++++-- arch/m68k/include/asm/fsl_mcdmafec.h | 23 ++++---- arch/m68k/lib/Makefile | 1 + arch/m68k/lib/fec.c | 79 ++++++++++++++++++++++++++++ 10 files changed, 151 insertions(+), 44 deletions(-) create mode 100644 arch/m68k/lib/fec.c diff --git a/arch/m68k/cpu/mcf523x/cpu_init.c b/arch/m68k/cpu/mcf523x/cpu_init.c index 9330042f39..8c6e12d548 100644 --- a/arch/m68k/cpu/mcf523x/cpu_init.c +++ b/arch/m68k/cpu/mcf523x/cpu_init.c @@ -157,7 +157,7 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; diff --git a/arch/m68k/cpu/mcf52x2/cpu_init.c b/arch/m68k/cpu/mcf52x2/cpu_init.c index dba6c23607..f39fe19baf 100644 --- a/arch/m68k/cpu/mcf52x2/cpu_init.c +++ b/arch/m68k/cpu/mcf52x2/cpu_init.c @@ -158,7 +158,7 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; @@ -305,7 +305,7 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { if (setclear) { /* Enable Ethernet pins */ @@ -426,7 +426,7 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; @@ -509,14 +509,17 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { - struct fec_info_s *info = (struct fec_info_s *) dev->priv; gpio_t *gpio = (gpio_t *)MMAP_GPIO; + u32 fec0_base; + + if (fec_get_base_addr(0, &fec0_base)) + return -1; if (setclear) { /* Enable Ethernet pins */ - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) { + if (info->iobase == fec0_base) { setbits_be16(&gpio->par_feci2c, 0x0f00); setbits_8(&gpio->par_fec0hl, 0xc0); } else { @@ -524,7 +527,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear) setbits_8(&gpio->par_fec1hl, 0xc0); } } else { - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) { + if (info->iobase == fec0_base) { clrbits_be16(&gpio->par_feci2c, 0x0f00); clrbits_8(&gpio->par_fec0hl, 0xc0); } else { @@ -644,7 +647,7 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { if (setclear) { MCFGPIO_PASPAR |= 0x0F00; diff --git a/arch/m68k/cpu/mcf532x/cpu.c b/arch/m68k/cpu/mcf532x/cpu.c index c8a1f20530..6807992de5 100644 --- a/arch/m68k/cpu/mcf532x/cpu.c +++ b/arch/m68k/cpu/mcf532x/cpu.c @@ -146,7 +146,6 @@ int watchdog_init(void) * create a board-specific function called: * int board_eth_init(bd_t *bis) */ - int cpu_eth_init(bd_t *bis) { return mcffec_initialize(bis); diff --git a/arch/m68k/cpu/mcf532x/cpu_init.c b/arch/m68k/cpu/mcf532x/cpu_init.c index 041ada0d16..bd130c1b0c 100644 --- a/arch/m68k/cpu/mcf532x/cpu_init.c +++ b/arch/m68k/cpu/mcf532x/cpu_init.c @@ -14,7 +14,7 @@ #include #include -#if defined(CONFIG_CMD_NET) +#if defined(CONFIG_MCFFEC) #include #include #include @@ -94,6 +94,7 @@ void cpu_init_f(void) int cpu_init_r(void) { #ifdef CONFIG_MCFFEC + u32 fec_mii_base0, fec_mii_base1; ccm_t *ccm = (ccm_t *) MMAP_CCM; #endif #ifdef CONFIG_MCFRTC @@ -105,7 +106,10 @@ int cpu_init_r(void) #endif #ifdef CONFIG_MCFFEC - if (CONFIG_SYS_FEC0_MIIBASE != CONFIG_SYS_FEC1_MIIBASE) + fec_get_mii_base(0, &fec_mii_base0); + fec_get_mii_base(1, &fec_mii_base1); + + if (fec_mii_base0 != fec_mii_base1) setbits_be16(&ccm->misccr, CCM_MISCCR_FECM); else clrbits_be16(&ccm->misccr, CCM_MISCCR_FECM); @@ -168,13 +172,16 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; - struct fec_info_s *info = (struct fec_info_s *)dev->priv; + u32 fec0_base; + + if (fec_get_base_addr(0, &fec0_base)) + return -1; if (setclear) { - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) { + if (info->iobase == fec0_base) { setbits_8(&gpio->par_fec, GPIO_PAR_FEC0_7W_FEC | GPIO_PAR_FEC0_RMII_FEC); setbits_8(&gpio->par_feci2c, @@ -186,7 +193,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear) GPIO_PAR_FECI2C_MDC1 | GPIO_PAR_FECI2C_MDIO1); } } else { - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) { + if (info->iobase == fec0_base) { clrbits_8(&gpio->par_fec, GPIO_PAR_FEC0_7W_FEC | GPIO_PAR_FEC0_RMII_FEC); clrbits_8(&gpio->par_feci2c, ~GPIO_PAR_FECI2C_RMII0_UNMASK); @@ -329,7 +336,7 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c index 9c5b8122a6..6ee23f0db2 100644 --- a/arch/m68k/cpu/mcf5445x/cpu_init.c +++ b/arch/m68k/cpu/mcf5445x/cpu_init.c @@ -402,15 +402,18 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; -#ifdef CONFIG_MCF5445x - struct fec_info_s *info = (struct fec_info_s *)dev->priv; + u32 fec0_base; + if (fec_get_base_addr(0, &fec0_base)) + return -1; + +#ifdef CONFIG_MCF5445x if (setclear) { #ifdef CONFIG_SYS_FEC_NO_SHARED_PHY - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) + if (info->iobase == fec0_base) setbits_be16(&gpio->par_feci2c, GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0); @@ -423,7 +426,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear) GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0); #endif - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) + if (info->iobase == fec0_base) setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC0_RMII_GPIO); else setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC1_RMII_ATA); @@ -431,7 +434,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear) clrbits_be16(&gpio->par_feci2c, GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0); - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) { + if (info->iobase == fec0_base) { #ifdef CONFIG_SYS_FEC_FULL_MII setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC0_MII); #else @@ -463,4 +466,3 @@ int fecpin_setclear(struct eth_device *dev, int setclear) return 0; } #endif - diff --git a/arch/m68k/cpu/mcf547x_8x/cpu_init.c b/arch/m68k/cpu/mcf547x_8x/cpu_init.c index 3f8c38c520..8779384c0a 100644 --- a/arch/m68k/cpu/mcf547x_8x/cpu_init.c +++ b/arch/m68k/cpu/mcf547x_8x/cpu_init.c @@ -17,6 +17,7 @@ #if defined(CONFIG_CMD_NET) #include #include +#include #include #endif @@ -124,18 +125,21 @@ void uart_port_conf(int port) } #if defined(CONFIG_CMD_NET) -int fecpin_setclear(struct eth_device *dev, int setclear) +int fecpin_setclear(fec_info_t *info, int setclear) { gpio_t *gpio = (gpio_t *) MMAP_GPIO; - struct fec_info_dma *info = (struct fec_info_dma *)dev->priv; + u32 fec0_base; + + if (fec_get_base_addr(0, &fec0_base)) + return -1; if (setclear) { - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) + if (info->iobase == fec0_base) setbits_be16(&gpio->par_feci2cirq, 0xf000); else setbits_be16(&gpio->par_feci2cirq, 0x0fc0); } else { - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) + if (info->iobase == fec0_base) clrbits_be16(&gpio->par_feci2cirq, 0xf000); else clrbits_be16(&gpio->par_feci2cirq, 0x0fc0); diff --git a/arch/m68k/include/asm/fec.h b/arch/m68k/include/asm/fec.h index 5742829c6d..cdb8119d3e 100644 --- a/arch/m68k/include/asm/fec.h +++ b/arch/m68k/include/asm/fec.h @@ -95,11 +95,12 @@ struct fec_info_s { int phyname_init; cbd_t *rxbd; /* Rx BD */ cbd_t *txbd; /* Tx BD */ - uint rxIdx; - uint txIdx; + uint rx_idx; + uint tx_idx; char *txbuf; int initialized; - struct fec_info_s *next; + int to_loop; + struct mii_dev *bus; }; #ifdef CONFIG_MCFFEC @@ -336,12 +337,22 @@ typedef struct fec { #define FEC_RESET_DELAY 100 #define FEC_RX_TOUT 100 -int fecpin_setclear(struct eth_device *dev, int setclear); +#ifdef CONFIG_MCF547x_8x +typedef struct fec_info_dma fec_info_t; +#define FEC_T fecdma_t +#else +typedef struct fec_info_s fec_info_t; +#define FEC_T fec_t +#endif + +int fecpin_setclear(fec_info_t *info, int setclear); +int mii_discover_phy(fec_info_t *info); +int fec_get_base_addr(int fec_idx, u32 *fec_iobase); +int fec_get_mii_base(int fec_idx, u32 *mii_base); #ifdef CONFIG_SYS_DISCOVER_PHY void __mii_init(void); uint mii_send(uint mii_cmd); -int mii_discover_phy(struct eth_device *dev); int mcffec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg); int mcffec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg, u16 value); diff --git a/arch/m68k/include/asm/fsl_mcdmafec.h b/arch/m68k/include/asm/fsl_mcdmafec.h index c283ad4a95..de6c548faf 100644 --- a/arch/m68k/include/asm/fsl_mcdmafec.h +++ b/arch/m68k/include/asm/fsl_mcdmafec.h @@ -72,20 +72,21 @@ struct fec_info_dma { int phyname_init; cbd_t *rxbd; /* Rx BD */ cbd_t *txbd; /* Tx BD */ - uint rxIdx; - uint txIdx; + uint rx_idx; + uint tx_idx; char *txbuf; int initialized; struct fec_info_dma *next; - - u16 rxTask; /* DMA receive Task Number */ - u16 txTask; /* DMA Transmit Task Number */ - u16 rxPri; /* DMA Receive Priority */ - u16 txPri; /* DMA Transmit Priority */ - u16 rxInit; /* DMA Receive Initiator */ - u16 txInit; /* DMA Transmit Initiator */ - u16 usedTbdIdx; /* next transmit BD to clean */ - u16 cleanTbdNum; /* the number of available transmit BDs */ + u16 rx_task; /* DMA receive Task Number */ + u16 tx_task; /* DMA Transmit Task Number */ + u16 rx_pri; /* DMA Receive Priority */ + u16 tx_pri; /* DMA Transmit Priority */ + u16 rx_init; /* DMA Receive Initiator */ + u16 tx_init; /* DMA Transmit Initiator */ + u16 used_tbd_idx; /* next transmit BD to clean */ + u16 clean_tbd_num; /* the number of available transmit BDs */ + int to_loop; + struct mii_dev *bus; }; /* Bit definitions and macros for IEVENT */ diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile index 254a0a3998..a040f40eb8 100644 --- a/arch/m68k/lib/Makefile +++ b/arch/m68k/lib/Makefile @@ -12,3 +12,4 @@ obj-y += cache.o obj-y += interrupts.o obj-y += time.o obj-y += traps.o +obj-y += fec.o diff --git a/arch/m68k/lib/fec.c b/arch/m68k/lib/fec.c new file mode 100644 index 0000000000..dde353ad17 --- /dev/null +++ b/arch/m68k/lib/fec.c @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) 2019 Angelo Dureghello + */ + +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_MCFFEC) || defined(CONFIG_FSLDMAFEC) +static int fec_get_node(int fec_idx) +{ + char fec_alias[5] = {"fec"}; + const char *path; + int node; + + if (fec_idx > 1) { + puts("Invalid MII base index"); + return -ENOENT; + } + + fec_alias[3] = fec_idx + '0'; + + path = fdt_get_alias(gd->fdt_blob, fec_alias); + if (!path) { + puts("Invalid MII path"); + return -ENOENT; + } + + node = fdt_path_offset(gd->fdt_blob, path); + if (node < 0) + return -ENOENT; + + return node; +} + +int fec_get_fdt_prop(int fec_idx, const char *prop, u32 *value) +{ + int node; + const u32 *val; + + node = fec_get_node(fec_idx); + if (node < 0) + return node; + + val = fdt_getprop(gd->fdt_blob, node, prop, NULL); + if (!val) + return -ENOENT; + + *value = fdt32_to_cpu(*val); + + return 0; +} + +int fec_get_base_addr(int fec_idx, u32 *fec_iobase) +{ + int node; + fdt_size_t size; + fdt_addr_t addr; + + node = fec_get_node(fec_idx); + if (node < 0) + return node; + + addr = fdtdec_get_addr_size(gd->fdt_blob, node, "reg", &size); + + *fec_iobase = (u32)addr; + + return 0; +} + +int fec_get_mii_base(int fec_idx, u32 *mii_base) +{ + return fec_get_fdt_prop(fec_idx, "mii-base", mii_base); +} + +#endif //CONFIG_MCFFEC || CONFIG_FSLDMAFEC From 080bcc5cc18dd8f667e1386de5428d4e98f253e9 Mon Sep 17 00:00:00 2001 From: Angelo Durgehello Date: Fri, 15 Nov 2019 23:54:17 +0100 Subject: [PATCH 06/28] drivers: net: add mcf fec dm Kconfig support Add ColdFire fec to Kconfig. Signed-off-by: Angelo Durgehello --- drivers/net/Kconfig | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 142a2c6953..01d087f229 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -278,6 +278,22 @@ config FTGMAC100 applications. +config MCFFEC + bool "ColdFire Ethernet Support" + depends on DM_ETH + select PHYLIB + help + This driver supports the network interface units in the + ColdFire family. + +config FSLDMAFEC + bool "ColdFire DMA Ethernet Support" + depends on DM_ETH + select PHYLIB + help + This driver supports the network interface units in the + ColdFire family. + config MVGBE bool "Marvell Orion5x/Kirkwood network interface support" depends on KIRKWOOD || ORION5X From a7bcace28a7c966f14e2049d8a1027c9f0097593 Mon Sep 17 00:00:00 2001 From: Angelo Durgehello Date: Fri, 15 Nov 2019 23:54:18 +0100 Subject: [PATCH 07/28] drivers: mcffec: conversion to dm Full conversion to dm for all boards, legacy code removed. Signed-off-by: Angelo Durgehello --- doc/device-tree-bindings/net/fsl,mcf-fec.txt | 22 + drivers/net/mcffec.c | 603 +++++++++---------- 2 files changed, 323 insertions(+), 302 deletions(-) create mode 100644 doc/device-tree-bindings/net/fsl,mcf-fec.txt diff --git a/doc/device-tree-bindings/net/fsl,mcf-fec.txt b/doc/device-tree-bindings/net/fsl,mcf-fec.txt new file mode 100644 index 0000000000..39bbaa52f3 --- /dev/null +++ b/doc/device-tree-bindings/net/fsl,mcf-fec.txt @@ -0,0 +1,22 @@ +* Freescale ColdFire FEC ethernet controller + +Required properties: +- compatible: should be "fsl,mcf-fec" +- reg: address and length of the register set for the device. + +Optional properties: +- mii-base: index of FEC reg area, 0 for FEC0, 1 for FEC1 +- max-speed: max speedm Mbits/sec +- phy-addr: phy address +- timeout-loop: integer value for driver loops time out + + +Example: + +fec0: ethernet@fc030000 { + compatible = "fsl,mcf-fec"; + reg = <0xfc030000 0x400>; + mii-base = <0>; + phy-addr = <0>; + timeout-loop = <5000>; +}; diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index 9a3a8455a1..4ec24362d0 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -5,17 +5,17 @@ * * (C) Copyright 2007 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * Conversion to DM + * (C) 2019 Angelo Dureghello */ #include #include #include - #include #include -#include #include - #include #include #include @@ -27,64 +27,68 @@ #define DBUF_LENGTH 1520 #define TX_BUF_CNT 2 #define PKT_MAXBUF_SIZE 1518 -#define PKT_MINBUF_SIZE 64 #define PKT_MAXBLR_SIZE 1520 #define LAST_PKTBUFSRX PKTBUFSRX - 1 #define BD_ENET_RX_W_E (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY) #define BD_ENET_TX_RDY_LST (BD_ENET_TX_READY | BD_ENET_TX_LAST) -struct fec_info_s fec_info[] = { -#ifdef CONFIG_SYS_FEC0_IOBASE - { - 0, /* index */ - CONFIG_SYS_FEC0_IOBASE, /* io base */ - CONFIG_SYS_FEC0_PINMUX, /* gpio pin muxing */ - CONFIG_SYS_FEC0_MIIBASE, /* mii base */ - -1, /* phy_addr */ - 0, /* duplex and speed */ - 0, /* phy name */ - 0, /* phyname init */ - 0, /* RX BD */ - 0, /* TX BD */ - 0, /* rx Index */ - 0, /* tx Index */ - 0, /* tx buffer */ - 0, /* initialized flag */ - (struct fec_info_s *)-1, - }, -#endif -#ifdef CONFIG_SYS_FEC1_IOBASE - { - 1, /* index */ - CONFIG_SYS_FEC1_IOBASE, /* io base */ - CONFIG_SYS_FEC1_PINMUX, /* gpio pin muxing */ - CONFIG_SYS_FEC1_MIIBASE, /* mii base */ - -1, /* phy_addr */ - 0, /* duplex and speed */ - 0, /* phy name */ - 0, /* phy name init */ -#ifdef CONFIG_SYS_FEC_BUF_USE_SRAM - (cbd_t *)DBUF_LENGTH, /* RX BD */ -#else - 0, /* RX BD */ -#endif - 0, /* TX BD */ - 0, /* rx Index */ - 0, /* tx Index */ - 0, /* tx buffer */ - 0, /* initialized flag */ - (struct fec_info_s *)-1, - } -#endif -}; +DECLARE_GLOBAL_DATA_PTR; -int fec_recv(struct eth_device *dev); -int fec_init(struct eth_device *dev, bd_t * bd); -void fec_halt(struct eth_device *dev); -void fec_reset(struct eth_device *dev); - -void setFecDuplexSpeed(volatile fec_t * fecp, bd_t * bd, int dup_spd) +static void init_eth_info(struct fec_info_s *info) { +#ifdef CONFIG_SYS_FEC_BUF_USE_SRAM + static u32 tmp; + + if (info->index == 0) + tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000; + else + info->rxbd = (cbd_t *)DBUF_LENGTH; + + /* setup Receive and Transmit buffer descriptor */ + info->rxbd = (cbd_t *)((u32)info->rxbd + tmp); + tmp = (u32)info->rxbd; + info->txbd = + (cbd_t *)((u32)info->txbd + tmp + + (PKTBUFSRX * sizeof(cbd_t))); + tmp = (u32)info->txbd; + info->txbuf = + (char *)((u32)info->txbuf + tmp + + (CONFIG_SYS_TX_ETH_BUFFER * sizeof(cbd_t))); + tmp = (u32)info->txbuf; +#else + info->rxbd = + (cbd_t *)memalign(CONFIG_SYS_CACHELINE_SIZE, + (PKTBUFSRX * sizeof(cbd_t))); + info->txbd = + (cbd_t *)memalign(CONFIG_SYS_CACHELINE_SIZE, + (TX_BUF_CNT * sizeof(cbd_t))); + info->txbuf = + (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, DBUF_LENGTH); +#endif + +#ifdef ET_DEBUG + printf("rxbd %x txbd %x\n", (int)info->rxbd, (int)info->txbd); +#endif + info->phy_name = (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, 32); +} + +static void fec_reset(struct fec_info_s *info) +{ + volatile fec_t *fecp = (fec_t *)(info->iobase); + int i; + + fecp->ecr = FEC_ECR_RESET; + for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) + udelay(1); + + if (i == FEC_RESET_DELAY) + printf("FEC_RESET_DELAY timeout\n"); +} + +static void set_fec_duplex_speed(volatile fec_t *fecp, int dup_spd) +{ + bd_t *bd = gd->bd; + if ((dup_spd >> 16) == FULL) { /* Set maximum frame length */ fecp->rcr = FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE) | FEC_RCR_MII_MODE | @@ -116,138 +120,11 @@ void setFecDuplexSpeed(volatile fec_t * fecp, bd_t * bd, int dup_spd) } } -static int fec_send(struct eth_device *dev, void *packet, int length) +#ifdef ET_DEBUG +static void dbg_fec_regs(struct udevice *dev) { struct fec_info_s *info = dev->priv; - volatile fec_t *fecp = (fec_t *) (info->iobase); - int j, rc; - u16 phyStatus; - - miiphy_read(dev->name, info->phy_addr, MII_BMSR, &phyStatus); - - /* section 16.9.23.3 - * Wait for ready - */ - j = 0; - while ((info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_READY) && - (j < MCFFEC_TOUT_LOOP)) { - udelay(1); - j++; - } - if (j >= MCFFEC_TOUT_LOOP) { - printf("TX not ready\n"); - } - - info->txbd[info->txIdx].cbd_bufaddr = (uint) packet; - info->txbd[info->txIdx].cbd_datlen = length; - info->txbd[info->txIdx].cbd_sc |= BD_ENET_TX_RDY_LST; - - /* Activate transmit Buffer Descriptor polling */ - fecp->tdar = 0x01000000; /* Descriptor polling active */ - -#ifndef CONFIG_SYS_FEC_BUF_USE_SRAM - /* - * FEC unable to initial transmit data packet. - * A nop will ensure the descriptor polling active completed. - * CF Internal RAM has shorter cycle access than DRAM. If use - * DRAM as Buffer descriptor and data, a nop is a must. - * Affect only V2 and V3. - */ - __asm__ ("nop"); - -#endif - -#ifdef CONFIG_SYS_UNIFY_CACHE - icache_invalid(); -#endif - - j = 0; - while ((info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_READY) && - (j < MCFFEC_TOUT_LOOP)) { - udelay(1); - j++; - } - if (j >= MCFFEC_TOUT_LOOP) { - printf("TX timeout\n"); - } - -#ifdef ET_DEBUG - printf("%s[%d] %s: cycles: %d status: %x retry cnt: %d\n", - __FILE__, __LINE__, __FUNCTION__, j, - info->txbd[info->txIdx].cbd_sc, - (info->txbd[info->txIdx].cbd_sc & 0x003C) >> 2); -#endif - - /* return only status bits */ - rc = (info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_STATS); - info->txIdx = (info->txIdx + 1) % TX_BUF_CNT; - - return rc; -} - -int fec_recv(struct eth_device *dev) -{ - struct fec_info_s *info = dev->priv; - volatile fec_t *fecp = (fec_t *) (info->iobase); - int length; - - for (;;) { -#ifndef CONFIG_SYS_FEC_BUF_USE_SRAM -#endif -#ifdef CONFIG_SYS_UNIFY_CACHE - icache_invalid(); -#endif - /* section 16.9.23.2 */ - if (info->rxbd[info->rxIdx].cbd_sc & BD_ENET_RX_EMPTY) { - length = -1; - break; /* nothing received - leave for() loop */ - } - - length = info->rxbd[info->rxIdx].cbd_datlen; - - if (info->rxbd[info->rxIdx].cbd_sc & 0x003f) { - printf("%s[%d] err: %x\n", - __FUNCTION__, __LINE__, - info->rxbd[info->rxIdx].cbd_sc); -#ifdef ET_DEBUG - printf("%s[%d] err: %x\n", - __FUNCTION__, __LINE__, - info->rxbd[info->rxIdx].cbd_sc); -#endif - } else { - - length -= 4; - /* Pass the packet up to the protocol layers. */ - net_process_received_packet(net_rx_packets[info->rxIdx], - length); - - fecp->eir |= FEC_EIR_RXF; - } - - /* Give the buffer back to the FEC. */ - info->rxbd[info->rxIdx].cbd_datlen = 0; - - /* wrap around buffer index when necessary */ - if (info->rxIdx == LAST_PKTBUFSRX) { - info->rxbd[PKTBUFSRX - 1].cbd_sc = BD_ENET_RX_W_E; - info->rxIdx = 0; - } else { - info->rxbd[info->rxIdx].cbd_sc = BD_ENET_RX_EMPTY; - info->rxIdx++; - } - - /* Try to fill Buffer Descriptors */ - fecp->rdar = 0x01000000; /* Descriptor polling active */ - } - - return length; -} - -#ifdef ET_DEBUG -void dbgFecRegs(struct eth_device *dev) -{ - struct fec_info_s *info = dev->priv; - volatile fec_t *fecp = (fec_t *) (info->iobase); + volatile fec_t *fecp = (fec_t *)(info->iobase); printf("=====\n"); printf("ievent %x - %x\n", (int)&fecp->eir, fecp->eir); @@ -394,28 +271,27 @@ void dbgFecRegs(struct eth_device *dev) } #endif -int fec_init(struct eth_device *dev, bd_t * bd) +int mcffec_init(struct udevice *dev) { struct fec_info_s *info = dev->priv; volatile fec_t *fecp = (fec_t *) (info->iobase); - int i; + int rval, i; uchar ea[6]; - fecpin_setclear(dev, 1); - - fec_reset(dev); + fecpin_setclear(info, 1); + fec_reset(info); #if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \ defined (CONFIG_SYS_DISCOVER_PHY) mii_init(); - setFecDuplexSpeed(fecp, bd, info->dup_spd); + set_fec_duplex_speed(fecp, info->dup_spd); #else #ifndef CONFIG_SYS_DISCOVER_PHY - setFecDuplexSpeed(fecp, bd, (FECDUPLEX << 16) | FECSPEED); -#endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ -#endif /* CONFIG_CMD_MII || CONFIG_MII */ + set_fec_duplex_speed(fecp, (FECDUPLEX << 16) | FECSPEED); +#endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ +#endif /* CONFIG_CMD_MII || CONFIG_MII */ /* We use strictly polling mode only */ fecp->eimr = 0; @@ -424,34 +300,20 @@ int fec_init(struct eth_device *dev, bd_t * bd) fecp->eir = 0xffffffff; /* Set station address */ - if ((u32) fecp == CONFIG_SYS_FEC0_IOBASE) { -#ifdef CONFIG_SYS_FEC1_IOBASE - volatile fec_t *fecp1 = (fec_t *) (CONFIG_SYS_FEC1_IOBASE); - eth_env_get_enetaddr("eth1addr", ea); - fecp1->palr = - (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]); - fecp1->paur = (ea[4] << 24) | (ea[5] << 16); -#endif - eth_env_get_enetaddr("ethaddr", ea); - fecp->palr = - (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]); - fecp->paur = (ea[4] << 24) | (ea[5] << 16); - } else { -#ifdef CONFIG_SYS_FEC0_IOBASE - volatile fec_t *fecp0 = (fec_t *) (CONFIG_SYS_FEC0_IOBASE); - eth_env_get_enetaddr("ethaddr", ea); - fecp0->palr = - (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]); - fecp0->paur = (ea[4] << 24) | (ea[5] << 16); -#endif -#ifdef CONFIG_SYS_FEC1_IOBASE - eth_env_get_enetaddr("eth1addr", ea); - fecp->palr = - (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]); - fecp->paur = (ea[4] << 24) | (ea[5] << 16); -#endif + if (info->index == 0) + rval = eth_env_get_enetaddr("ethaddr", ea); + else + rval = eth_env_get_enetaddr("eth1addr", ea); + + if (!rval) { + puts("Please set a valid MAC address\n"); + return -EINVAL; } + fecp->palr = + (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]); + fecp->paur = (ea[4] << 24) | (ea[5] << 16); + /* Clear unicast address hash table */ fecp->iaur = 0; fecp->ialr = 0; @@ -466,8 +328,8 @@ int fec_init(struct eth_device *dev, bd_t * bd) /* * Setup Buffers and Buffer Descriptors */ - info->rxIdx = 0; - info->txIdx = 0; + info->rx_idx = 0; + info->tx_idx = 0; /* * Setup Receiver Buffer Descriptors (13.14.24.18) @@ -500,119 +362,256 @@ int fec_init(struct eth_device *dev, bd_t * bd) /* Now enable the transmit and receive processing */ fecp->ecr |= FEC_ECR_ETHER_EN; - /* And last, try to fill Rx Buffer Descriptors */ - fecp->rdar = 0x01000000; /* Descriptor polling active */ + /* And last, try to fill Rx Buffer Descriptors + * Descriptor polling active + */ + fecp->rdar = 0x01000000; - return 1; + return 0; } -void fec_reset(struct eth_device *dev) +static int mcffec_send(struct udevice *dev, void *packet, int length) { struct fec_info_s *info = dev->priv; - volatile fec_t *fecp = (fec_t *) (info->iobase); - int i; + volatile fec_t *fecp = (fec_t *)info->iobase; + int j, rc; + u16 phy_status; - fecp->ecr = FEC_ECR_RESET; - for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) { + miiphy_read(dev->name, info->phy_addr, MII_BMSR, &phy_status); + + /* section 16.9.23.3 + * Wait for ready + */ + j = 0; + while ((info->txbd[info->tx_idx].cbd_sc & BD_ENET_TX_READY) && + (j < info->to_loop)) { udelay(1); + j++; } - if (i == FEC_RESET_DELAY) { - printf("FEC_RESET_DELAY timeout\n"); + if (j >= info->to_loop) + printf("TX not ready\n"); + + info->txbd[info->tx_idx].cbd_bufaddr = (uint)packet; + info->txbd[info->tx_idx].cbd_datlen = length; + info->txbd[info->tx_idx].cbd_sc |= BD_ENET_TX_RDY_LST; + + /* Activate transmit Buffer Descriptor polling */ + fecp->tdar = 0x01000000; /* Descriptor polling active */ + +#ifndef CONFIG_SYS_FEC_BUF_USE_SRAM + /* + * FEC unable to initial transmit data packet. + * A nop will ensure the descriptor polling active completed. + * CF Internal RAM has shorter cycle access than DRAM. If use + * DRAM as Buffer descriptor and data, a nop is a must. + * Affect only V2 and V3. + */ + __asm__ ("nop"); +#endif + +#ifdef CONFIG_SYS_UNIFY_CACHE + icache_invalid(); +#endif + + j = 0; + while ((info->txbd[info->tx_idx].cbd_sc & BD_ENET_TX_READY) && + (j < info->to_loop)) { + udelay(1); + j++; } + if (j >= info->to_loop) + printf("TX timeout\n"); + +#ifdef ET_DEBUG + printf("%s[%d] %s: cycles: %d status: %x retry cnt: %d\n", + __FILE__, __LINE__, __func__, j, + info->txbd[info->tx_idx].cbd_sc, + (info->txbd[info->tx_idx].cbd_sc & 0x003C) >> 2); +#endif + + /* return only status bits */ + rc = (info->txbd[info->tx_idx].cbd_sc & BD_ENET_TX_STATS); + info->tx_idx = (info->tx_idx + 1) % TX_BUF_CNT; + + return rc; } -void fec_halt(struct eth_device *dev) +static int mcffec_recv(struct udevice *dev, int flags, uchar **packetp) +{ + struct fec_info_s *info = dev->priv; + volatile fec_t *fecp = (fec_t *)info->iobase; + int length = -1; + + for (;;) { +#ifdef CONFIG_SYS_UNIFY_CACHE + icache_invalid(); +#endif + /* If nothing received - leave for() loop */ + if (info->rxbd[info->rx_idx].cbd_sc & BD_ENET_RX_EMPTY) + break; + + length = info->rxbd[info->rx_idx].cbd_datlen; + + if (info->rxbd[info->rx_idx].cbd_sc & 0x003f) { + printf("%s[%d] err: %x\n", + __func__, __LINE__, + info->rxbd[info->rx_idx].cbd_sc); + } else { + length -= 4; + + /* + * Pass the buffer ptr up to the protocol layers. + */ + *packetp = net_rx_packets[info->rx_idx]; + + fecp->eir |= FEC_EIR_RXF; + } + + /* Give the buffer back to the FEC. */ + info->rxbd[info->rx_idx].cbd_datlen = 0; + + /* wrap around buffer index when necessary */ + if (info->rx_idx == LAST_PKTBUFSRX) { + info->rxbd[PKTBUFSRX - 1].cbd_sc = BD_ENET_RX_W_E; + info->rx_idx = 0; + } else { + info->rxbd[info->rx_idx].cbd_sc = BD_ENET_RX_EMPTY; + info->rx_idx++; + } + + /* Try to fill Buffer Descriptors + * Descriptor polling active + */ + fecp->rdar = 0x01000000; + } + + return length; +} + +static void mcffec_halt(struct udevice *dev) { struct fec_info_s *info = dev->priv; - fec_reset(dev); + fec_reset(info); + fecpin_setclear(info, 0); - fecpin_setclear(dev, 0); + info->rx_idx = 0; + info->tx_idx = 0; - info->rxIdx = info->txIdx = 0; memset(info->rxbd, 0, PKTBUFSRX * sizeof(cbd_t)); memset(info->txbd, 0, TX_BUF_CNT * sizeof(cbd_t)); memset(info->txbuf, 0, DBUF_LENGTH); } -int mcffec_initialize(bd_t * bis) +static const struct eth_ops mcffec_ops = { + .start = mcffec_init, + .send = mcffec_send, + .recv = mcffec_recv, + .stop = mcffec_halt, +}; + +/* + * Boot sequence, called just after mcffec_ofdata_to_platdata, + * as DM way, it replaces old mcffec_initialize. + */ +static int mcffec_probe(struct udevice *dev) { - struct eth_device *dev; - int i; -#ifdef CONFIG_SYS_FEC_BUF_USE_SRAM - u32 tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000; -#endif + struct eth_pdata *pdata = dev_get_platdata(dev); + struct fec_info_s *info = dev->priv; + int node = dev_of_offset(dev); + int retval, fec_idx; + const u32 *val; - for (i = 0; i < ARRAY_SIZE(fec_info); i++) { + info->index = dev->seq; + info->iobase = pdata->iobase; + info->phy_addr = -1; - dev = - (struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE, - sizeof *dev); - if (dev == NULL) - hang(); + val = fdt_getprop(gd->fdt_blob, node, "mii-base", NULL); + if (val) { + u32 fec_iobase; - memset(dev, 0, sizeof(*dev)); + fec_idx = fdt32_to_cpu(*val); + if (fec_idx == info->index) { + fec_iobase = info->iobase; + } else { + printf("mii base != base address, fec_idx %d\n", + fec_idx); + retval = fec_get_base_addr(fec_idx, &fec_iobase); + if (retval) + return retval; + } + info->miibase = fec_iobase; + } - sprintf(dev->name, "FEC%d", fec_info[i].index); + val = fdt_getprop(gd->fdt_blob, node, "phy-addr", NULL); + if (val) + info->phy_addr = fdt32_to_cpu(*val); - dev->priv = &fec_info[i]; - dev->init = fec_init; - dev->halt = fec_halt; - dev->send = fec_send; - dev->recv = fec_recv; + val = fdt_getprop(gd->fdt_blob, node, "timeout-loop", NULL); + if (val) + info->to_loop = fdt32_to_cpu(*val); - /* setup Receive and Transmit buffer descriptor */ -#ifdef CONFIG_SYS_FEC_BUF_USE_SRAM - fec_info[i].rxbd = (cbd_t *)((u32)fec_info[i].rxbd + tmp); - tmp = (u32)fec_info[i].rxbd; - fec_info[i].txbd = - (cbd_t *)((u32)fec_info[i].txbd + tmp + - (PKTBUFSRX * sizeof(cbd_t))); - tmp = (u32)fec_info[i].txbd; - fec_info[i].txbuf = - (char *)((u32)fec_info[i].txbuf + tmp + - (CONFIG_SYS_TX_ETH_BUFFER * sizeof(cbd_t))); - tmp = (u32)fec_info[i].txbuf; -#else - fec_info[i].rxbd = - (cbd_t *) memalign(CONFIG_SYS_CACHELINE_SIZE, - (PKTBUFSRX * sizeof(cbd_t))); - fec_info[i].txbd = - (cbd_t *) memalign(CONFIG_SYS_CACHELINE_SIZE, - (TX_BUF_CNT * sizeof(cbd_t))); - fec_info[i].txbuf = - (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, DBUF_LENGTH); -#endif - -#ifdef ET_DEBUG - printf("rxbd %x txbd %x\n", - (int)fec_info[i].rxbd, (int)fec_info[i].txbd); -#endif - - fec_info[i].phy_name = (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, 32); - - eth_register(dev); + init_eth_info(info); #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) - int retval; - struct mii_dev *mdiodev = mdio_alloc(); - if (!mdiodev) - return -ENOMEM; - strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN); - mdiodev->read = mcffec_miiphy_read; - mdiodev->write = mcffec_miiphy_write; + info->bus = mdio_alloc(); + if (!info->bus) + return -ENOMEM; + strcpy(info->bus->name, dev->name); + info->bus->read = mcffec_miiphy_read; + info->bus->write = mcffec_miiphy_write; - retval = mdio_register(mdiodev); - if (retval < 0) - return retval; + retval = mdio_register(info->bus); + if (retval < 0) + return retval; #endif - if (i > 0) - fec_info[i - 1].next = &fec_info[i]; - } - fec_info[i - 1].next = &fec_info[0]; - - /* default speed */ - bis->bi_ethspeed = 10; return 0; } + +static int mcffec_remove(struct udevice *dev) +{ + struct fec_info_s *priv = dev_get_priv(dev); + + mdio_unregister(priv->bus); + mdio_free(priv->bus); + + return 0; +} + +/* + * Boot sequence, called 1st + */ +static int mcffec_ofdata_to_platdata(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + const u32 *val; + + pdata->iobase = (phys_addr_t)devfdt_get_addr(dev); + /* Default to 10Mbit/s */ + pdata->max_speed = 10; + + val = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), + "max-speed", NULL); + if (val) + pdata->max_speed = fdt32_to_cpu(*val); + + return 0; +} + +static const struct udevice_id mcffec_ids[] = { + { .compatible = "fsl,mcf-fec" }, + { } +}; + +U_BOOT_DRIVER(mcffec) = { + .name = "mcffec", + .id = UCLASS_ETH, + .of_match = mcffec_ids, + .ofdata_to_platdata = mcffec_ofdata_to_platdata, + .probe = mcffec_probe, + .remove = mcffec_remove, + .ops = &mcffec_ops, + .priv_auto_alloc_size = sizeof(struct fec_info_s), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), +}; From 05ffdc85cac85825ed0dc525ab28f4fa12a84574 Mon Sep 17 00:00:00 2001 From: Angelo Durgehello Date: Fri, 15 Nov 2019 23:54:19 +0100 Subject: [PATCH 08/28] drivers: fsl_mcdmafec: conversion to dm Full conversion to dm for all boards, legacy code removed. Signed-off-by: Angelo Durgehello --- .../net/fsl,mcf-dma-fec.txt | 35 + drivers/net/fsl_mcdmafec.c | 711 +++++++++--------- 2 files changed, 399 insertions(+), 347 deletions(-) create mode 100644 doc/device-tree-bindings/net/fsl,mcf-dma-fec.txt diff --git a/doc/device-tree-bindings/net/fsl,mcf-dma-fec.txt b/doc/device-tree-bindings/net/fsl,mcf-dma-fec.txt new file mode 100644 index 0000000000..e237825bac --- /dev/null +++ b/doc/device-tree-bindings/net/fsl,mcf-dma-fec.txt @@ -0,0 +1,35 @@ +* Freescale ColdFire DMA-FEC ethernet controller + +Required properties: +- compatible: should be "fsl,mcf-dma-fec" +- reg: address and length of the register set for the device. +- rx-task: dma channel +- tx-task: dma channel +- rx-priority: dma channel +- tx-priority: dma channel +- rx-init: dma channel +- tx-init: dma channel + +Optional properties: +- mii-base: index of FEC reg area, 0 for FEC0, 1 for FEC1 +- max-speed: max speedm Mbits/sec +- phy-addr: phy address +- timeout-loop: integer value for driver loops time out + + +Example: + +fec0: ethernet@9000 { + compatible = "fsl,mcf-dma-fec"; + reg = <0x9000 0x800>; + mii-base = <0>; + phy-addr = <0>; + timeout-loop = <5000>; + rx-task = <0>; + tx-task = <1>; + rx-piority = <6>; + tx-piority = <7>; + rx-init = <16>; + tx-init = <17>; + status = "disabled"; +}; diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c index b2936b78d7..7838fb5c10 100644 --- a/drivers/net/fsl_mcdmafec.c +++ b/drivers/net/fsl_mcdmafec.c @@ -5,6 +5,9 @@ * * (C) Copyright 2007 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * Conversion to DM + * (C) 2019 Angelo Dureghello */ #include @@ -15,6 +18,10 @@ #include #include #include +#include +#include + +#include "MCD_dma.h" #undef ET_DEBUG #undef MII_DEBUG @@ -22,93 +29,94 @@ /* Ethernet Transmit and Receive Buffers */ #define DBUF_LENGTH 1520 #define PKT_MAXBUF_SIZE 1518 -#define PKT_MINBUF_SIZE 64 -#define PKT_MAXBLR_SIZE 1536 -#define LAST_PKTBUFSRX PKTBUFSRX - 1 -#define BD_ENET_RX_W_E (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY) -#define BD_ENET_TX_RDY_LST (BD_ENET_TX_READY | BD_ENET_TX_LAST) #define FIFO_ERRSTAT (FIFO_STAT_RXW | FIFO_STAT_UF | FIFO_STAT_OF) /* RxBD bits definitions */ #define BD_ENET_RX_ERR (BD_ENET_RX_LG | BD_ENET_RX_NO | BD_ENET_RX_CR | \ BD_ENET_RX_OV | BD_ENET_RX_TR) -#include -#include +DECLARE_GLOBAL_DATA_PTR; -#include "MCD_dma.h" +static void init_eth_info(struct fec_info_dma *info) +{ + /* setup Receive and Transmit buffer descriptor */ +#ifdef CONFIG_SYS_FEC_BUF_USE_SRAM + static u32 tmp; -struct fec_info_dma fec_info[] = { -#ifdef CONFIG_SYS_FEC0_IOBASE - { - 0, /* index */ - CONFIG_SYS_FEC0_IOBASE, /* io base */ - CONFIG_SYS_FEC0_PINMUX, /* gpio pin muxing */ - CONFIG_SYS_FEC0_MIIBASE, /* mii base */ - -1, /* phy_addr */ - 0, /* duplex and speed */ - 0, /* phy name */ - 0, /* phyname init */ - 0, /* RX BD */ - 0, /* TX BD */ - 0, /* rx Index */ - 0, /* tx Index */ - 0, /* tx buffer */ - 0, /* initialized flag */ - (struct fec_info_dma *)-1, /* next */ - FEC0_RX_TASK, /* rxTask */ - FEC0_TX_TASK, /* txTask */ - FEC0_RX_PRIORITY, /* rxPri */ - FEC0_TX_PRIORITY, /* txPri */ - FEC0_RX_INIT, /* rxInit */ - FEC0_TX_INIT, /* txInit */ - 0, /* usedTbdIndex */ - 0, /* cleanTbdNum */ - }, -#endif -#ifdef CONFIG_SYS_FEC1_IOBASE - { - 1, /* index */ - CONFIG_SYS_FEC1_IOBASE, /* io base */ - CONFIG_SYS_FEC1_PINMUX, /* gpio pin muxing */ - CONFIG_SYS_FEC1_MIIBASE, /* mii base */ - -1, /* phy_addr */ - 0, /* duplex and speed */ - 0, /* phy name */ - 0, /* phy name init */ -#ifdef CONFIG_SYS_DMA_USE_INTSRAM - (cbd_t *)DBUF_LENGTH, /* RX BD */ + if (info->index == 0) + tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000; + else + info->rxbd = (cbd_t *)DBUF_LENGTH; + + info->rxbd = (cbd_t *)((u32)info->rxbd + tmp); + tmp = (u32)info->rxbd; + info->txbd = + (cbd_t *)((u32)info->txbd + tmp + + (PKTBUFSRX * sizeof(cbd_t))); + tmp = (u32)info->txbd; + info->txbuf = + (char *)((u32)info->txbuf + tmp + + (CONFIG_SYS_TX_ETH_BUFFER * sizeof(cbd_t))); + tmp = (u32)info->txbuf; #else - 0, /* RX BD */ + info->rxbd = + (cbd_t *)memalign(CONFIG_SYS_CACHELINE_SIZE, + (PKTBUFSRX * sizeof(cbd_t))); + info->txbd = + (cbd_t *)memalign(CONFIG_SYS_CACHELINE_SIZE, + (CONFIG_SYS_TX_ETH_BUFFER * sizeof(cbd_t))); + info->txbuf = + (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, DBUF_LENGTH); #endif - 0, /* TX BD */ - 0, /* rx Index */ - 0, /* tx Index */ - 0, /* tx buffer */ - 0, /* initialized flag */ - (struct fec_info_dma *)-1, /* next */ - FEC1_RX_TASK, /* rxTask */ - FEC1_TX_TASK, /* txTask */ - FEC1_RX_PRIORITY, /* rxPri */ - FEC1_TX_PRIORITY, /* txPri */ - FEC1_RX_INIT, /* rxInit */ - FEC1_TX_INIT, /* txInit */ - 0, /* usedTbdIndex */ - 0, /* cleanTbdNum */ - } -#endif -}; -static int fec_send(struct eth_device *dev, void *packet, int length); -static int fec_recv(struct eth_device *dev); -static int fec_init(struct eth_device *dev, bd_t * bd); -static void fec_halt(struct eth_device *dev); +#ifdef ET_DEBUG + printf("rxbd %x txbd %x\n", (int)info->rxbd, (int)info->txbd); +#endif + info->phy_name = (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, 32); +} + +static void fec_halt(struct udevice *dev) +{ + struct fec_info_dma *info = dev->priv; + volatile fecdma_t *fecp = (fecdma_t *)info->iobase; + int counter = 0xffff; + + /* issue graceful stop command to the FEC transmitter if necessary */ + fecp->tcr |= FEC_TCR_GTS; + + /* wait for graceful stop to register */ + while ((counter--) && (!(fecp->eir & FEC_EIR_GRA))) + ; + + /* Disable DMA tasks */ + MCD_killDma(info->tx_task); + MCD_killDma(info->rx_task); + + /* Disable the Ethernet Controller */ + fecp->ecr &= ~FEC_ECR_ETHER_EN; + + /* Clear FIFO status registers */ + fecp->rfsr &= FIFO_ERRSTAT; + fecp->tfsr &= FIFO_ERRSTAT; + + fecp->frst = 0x01000000; + + /* Issue a reset command to the FEC chip */ + fecp->ecr |= FEC_ECR_RESET; + + /* wait at least 20 clock cycles */ + mdelay(10); + +#ifdef ET_DEBUG + printf("Ethernet task stopped\n"); +#endif +} #ifdef ET_DEBUG static void dbg_fec_regs(struct eth_device *dev) { struct fec_info_dma *info = dev->priv; - volatile fecdma_t *fecp = (fecdma_t *) (info->iobase); + volatile fecdma_t *fecp = (fecdma_t *)info->iobase; printf("=====\n"); printf("ievent %x - %x\n", (int)&fecp->eir, fecp->eir); @@ -149,9 +157,10 @@ static void dbg_fec_regs(struct eth_device *dev) } #endif -static void set_fec_duplex_speed(volatile fecdma_t * fecp, bd_t * bd, - int dup_spd) +static void set_fec_duplex_speed(volatile fecdma_t *fecp, int dup_spd) { + bd_t *bd = gd->bd; + if ((dup_spd >> 16) == FULL) { /* Set maximum frame length */ fecp->rcr = FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE) | FEC_RCR_MII_MODE | @@ -177,153 +186,23 @@ static void set_fec_duplex_speed(volatile fecdma_t * fecp, bd_t * bd, } } -static int fec_send(struct eth_device *dev, void *packet, int length) +static void fec_set_hwaddr(volatile fecdma_t *fecp, u8 *mac) { - struct fec_info_dma *info = dev->priv; - cbd_t *pTbd, *pUsedTbd; - u16 phyStatus; - - miiphy_read(dev->name, info->phy_addr, MII_BMSR, &phyStatus); - - /* process all the consumed TBDs */ - while (info->cleanTbdNum < CONFIG_SYS_TX_ETH_BUFFER) { - pUsedTbd = &info->txbd[info->usedTbdIdx]; - if (pUsedTbd->cbd_sc & BD_ENET_TX_READY) { -#ifdef ET_DEBUG - printf("Cannot clean TBD %d, in use\n", - info->cleanTbdNum); -#endif - return 0; - } - - /* clean this buffer descriptor */ - if (info->usedTbdIdx == (CONFIG_SYS_TX_ETH_BUFFER - 1)) - pUsedTbd->cbd_sc = BD_ENET_TX_WRAP; - else - pUsedTbd->cbd_sc = 0; - - /* update some indeces for a correct handling of the TBD ring */ - info->cleanTbdNum++; - info->usedTbdIdx = (info->usedTbdIdx + 1) % CONFIG_SYS_TX_ETH_BUFFER; - } - - /* Check for valid length of data. */ - if ((length > 1500) || (length <= 0)) { - return -1; - } - - /* Check the number of vacant TxBDs. */ - if (info->cleanTbdNum < 1) { - printf("No available TxBDs ...\n"); - return -1; - } - - /* Get the first TxBD to send the mac header */ - pTbd = &info->txbd[info->txIdx]; - pTbd->cbd_datlen = length; - pTbd->cbd_bufaddr = (u32) packet; - pTbd->cbd_sc |= BD_ENET_TX_LAST | BD_ENET_TX_TC | BD_ENET_TX_READY; - info->txIdx = (info->txIdx + 1) % CONFIG_SYS_TX_ETH_BUFFER; - - /* Enable DMA transmit task */ - MCD_continDma(info->txTask); - - info->cleanTbdNum -= 1; - - /* wait until frame is sent . */ - while (pTbd->cbd_sc & BD_ENET_TX_READY) { - udelay(10); - } - - return (int)(info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_STATS); -} - -static int fec_recv(struct eth_device *dev) -{ - struct fec_info_dma *info = dev->priv; - volatile fecdma_t *fecp = (fecdma_t *) (info->iobase); - - cbd_t *prbd = &info->rxbd[info->rxIdx]; - u32 ievent; - int frame_length, len = 0; - - /* Check if any critical events have happened */ - ievent = fecp->eir; - if (ievent != 0) { - fecp->eir = ievent; - - if (ievent & (FEC_EIR_BABT | FEC_EIR_TXERR | FEC_EIR_RXERR)) { - printf("fec_recv: error\n"); - fec_halt(dev); - fec_init(dev, NULL); - return 0; - } - - if (ievent & FEC_EIR_HBERR) { - /* Heartbeat error */ - fecp->tcr |= FEC_TCR_GTS; - } - - if (ievent & FEC_EIR_GRA) { - /* Graceful stop complete */ - if (fecp->tcr & FEC_TCR_GTS) { - printf("fec_recv: tcr_gts\n"); - fec_halt(dev); - fecp->tcr &= ~FEC_TCR_GTS; - fec_init(dev, NULL); - } - } - } - - if (!(prbd->cbd_sc & BD_ENET_RX_EMPTY)) { - if ((prbd->cbd_sc & BD_ENET_RX_LAST) && - !(prbd->cbd_sc & BD_ENET_RX_ERR) && - ((prbd->cbd_datlen - 4) > 14)) { - - /* Get buffer address and size */ - frame_length = prbd->cbd_datlen - 4; - - /* Fill the buffer and pass it to upper layers */ - net_process_received_packet((uchar *)prbd->cbd_bufaddr, - frame_length); - len = frame_length; - } - - /* Reset buffer descriptor as empty */ - if ((info->rxIdx) == (PKTBUFSRX - 1)) - prbd->cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY); - else - prbd->cbd_sc = BD_ENET_RX_EMPTY; - - prbd->cbd_datlen = PKTSIZE_ALIGN; - - /* Now, we have an empty RxBD, restart the DMA receive task */ - MCD_continDma(info->rxTask); - - /* Increment BD count */ - info->rxIdx = (info->rxIdx + 1) % PKTBUFSRX; - } - - return len; -} - -static void fec_set_hwaddr(volatile fecdma_t * fecp, u8 * mac) -{ - u8 currByte; /* byte for which to compute the CRC */ + u8 curr_byte; /* byte for which to compute the CRC */ int byte; /* loop - counter */ int bit; /* loop - counter */ u32 crc = 0xffffffff; /* initial value */ for (byte = 0; byte < 6; byte++) { - currByte = mac[byte]; + curr_byte = mac[byte]; for (bit = 0; bit < 8; bit++) { - if ((currByte & 0x01) ^ (crc & 0x01)) { + if ((curr_byte & 0x01) ^ (crc & 0x01)) { crc >>= 1; crc = crc ^ 0xedb88320; } else { crc >>= 1; } - currByte >>= 1; + curr_byte >>= 1; } } @@ -347,30 +226,28 @@ static void fec_set_hwaddr(volatile fecdma_t * fecp, u8 * mac) fecp->galr = 0; } -static int fec_init(struct eth_device *dev, bd_t * bd) +static int fec_init(struct udevice *dev) { struct fec_info_dma *info = dev->priv; - volatile fecdma_t *fecp = (fecdma_t *) (info->iobase); - int i; + volatile fecdma_t *fecp = (fecdma_t *)info->iobase; + int rval, i; uchar enetaddr[6]; #ifdef ET_DEBUG printf("fec_init: iobase 0x%08x ...\n", info->iobase); #endif - fecpin_setclear(dev, 1); - + fecpin_setclear(info, 1); fec_halt(dev); #if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \ defined (CONFIG_SYS_DISCOVER_PHY) mii_init(); - - set_fec_duplex_speed(fecp, bd, info->dup_spd); + set_fec_duplex_speed(fecp, info->dup_spd); #else #ifndef CONFIG_SYS_DISCOVER_PHY - set_fec_duplex_speed(fecp, bd, (FECDUPLEX << 16) | FECSPEED); + set_fec_duplex_speed(fecp, (FECDUPLEX << 16) | FECSPEED); #endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ #endif /* CONFIG_CMD_MII || CONFIG_MII */ @@ -381,18 +258,24 @@ static int fec_init(struct eth_device *dev, bd_t * bd) fecp->eir = 0xffffffff; /* Set station address */ - if ((u32) fecp == CONFIG_SYS_FEC0_IOBASE) - eth_env_get_enetaddr("ethaddr", enetaddr); + if (info->index == 0) + rval = eth_env_get_enetaddr("ethaddr", enetaddr); else - eth_env_get_enetaddr("eth1addr", enetaddr); + rval = eth_env_get_enetaddr("eth1addr", enetaddr); + + if (!rval) { + puts("Please set a valid MAC address\n"); + return -EINVAL; + } + fec_set_hwaddr(fecp, enetaddr); /* Set Opcode/Pause Duration Register */ fecp->opd = 0x00010020; /* Setup Buffers and Buffer Descriptors */ - info->rxIdx = 0; - info->txIdx = 0; + info->rx_idx = 0; + info->tx_idx = 0; /* Setup Receiver Buffer Descriptors (13.14.24.18) * Settings: Empty, Wrap */ @@ -412,8 +295,8 @@ static int fec_init(struct eth_device *dev, bd_t * bd) } info->txbd[CONFIG_SYS_TX_ETH_BUFFER - 1].cbd_sc |= BD_ENET_TX_WRAP; - info->usedTbdIdx = 0; - info->cleanTbdNum = CONFIG_SYS_TX_ETH_BUFFER; + info->used_tbd_idx = 0; + info->clean_tbd_num = CONFIG_SYS_TX_ETH_BUFFER; /* Set Rx FIFO alarm and granularity value */ fecp->rfcr = 0x0c000000; @@ -427,154 +310,288 @@ static int fec_init(struct eth_device *dev, bd_t * bd) fecp->ctcwr = 0x03000000; /* Enable DMA receive task */ - MCD_startDma(info->rxTask, /* Dma channel */ - (s8 *) info->rxbd, /*Source Address */ - 0, /* Source increment */ - (s8 *) (&fecp->rfdr), /* dest */ - 4, /* dest increment */ - 0, /* DMA size */ - 4, /* xfer size */ - info->rxInit, /* initiator */ - info->rxPri, /* priority */ - (MCD_FECRX_DMA | MCD_TT_FLAGS_DEF), /* Flags */ - (MCD_NO_CSUM | MCD_NO_BYTE_SWAP) /* Function description */ + MCD_startDma(info->rx_task, + (s8 *)info->rxbd, + 0, + (s8 *)&fecp->rfdr, + 4, + 0, + 4, + info->rx_init, + info->rx_pri, + (MCD_FECRX_DMA | MCD_TT_FLAGS_DEF), + (MCD_NO_CSUM | MCD_NO_BYTE_SWAP) ); /* Enable DMA tx task with no ready buffer descriptors */ - MCD_startDma(info->txTask, /* Dma channel */ - (s8 *) info->txbd, /*Source Address */ - 0, /* Source increment */ - (s8 *) (&fecp->tfdr), /* dest */ - 4, /* dest incr */ - 0, /* DMA size */ - 4, /* xfer size */ - info->txInit, /* initiator */ - info->txPri, /* priority */ - (MCD_FECTX_DMA | MCD_TT_FLAGS_DEF), /* Flags */ - (MCD_NO_CSUM | MCD_NO_BYTE_SWAP) /* Function description */ + MCD_startDma(info->tx_task, + (s8 *)info->txbd, + 0, + (s8 *)&fecp->tfdr, + 4, + 0, + 4, + info->tx_init, + info->tx_pri, + (MCD_FECTX_DMA | MCD_TT_FLAGS_DEF), + (MCD_NO_CSUM | MCD_NO_BYTE_SWAP) ); /* Now enable the transmit and receive processing */ fecp->ecr |= FEC_ECR_ETHER_EN; - return 1; + return 0; } -static void fec_halt(struct eth_device *dev) +static int mcdmafec_init(struct udevice *dev) +{ + return fec_init(dev); +} + +static int mcdmafec_send(struct udevice *dev, void *packet, int length) { struct fec_info_dma *info = dev->priv; - volatile fecdma_t *fecp = (fecdma_t *) (info->iobase); - int counter = 0xffff; + cbd_t *p_tbd, *p_used_tbd; + u16 phy_status; - /* issue graceful stop command to the FEC transmitter if necessary */ - fecp->tcr |= FEC_TCR_GTS; - - /* wait for graceful stop to register */ - while ((counter--) && (!(fecp->eir & FEC_EIR_GRA))) ; - - /* Disable DMA tasks */ - MCD_killDma(info->txTask); - MCD_killDma(info->rxTask); - - /* Disable the Ethernet Controller */ - fecp->ecr &= ~FEC_ECR_ETHER_EN; - - /* Clear FIFO status registers */ - fecp->rfsr &= FIFO_ERRSTAT; - fecp->tfsr &= FIFO_ERRSTAT; - - fecp->frst = 0x01000000; - - /* Issue a reset command to the FEC chip */ - fecp->ecr |= FEC_ECR_RESET; - - /* wait at least 20 clock cycles */ - udelay(10000); + miiphy_read(dev->name, info->phy_addr, MII_BMSR, &phy_status); + /* process all the consumed TBDs */ + while (info->clean_tbd_num < CONFIG_SYS_TX_ETH_BUFFER) { + p_used_tbd = &info->txbd[info->used_tbd_idx]; + if (p_used_tbd->cbd_sc & BD_ENET_TX_READY) { #ifdef ET_DEBUG - printf("Ethernet task stopped\n"); + printf("Cannot clean TBD %d, in use\n", + info->clean_tbd_num); #endif + return 0; + } + + /* clean this buffer descriptor */ + if (info->used_tbd_idx == (CONFIG_SYS_TX_ETH_BUFFER - 1)) + p_used_tbd->cbd_sc = BD_ENET_TX_WRAP; + else + p_used_tbd->cbd_sc = 0; + + /* update some indeces for a correct handling of TBD ring */ + info->clean_tbd_num++; + info->used_tbd_idx = (info->used_tbd_idx + 1) + % CONFIG_SYS_TX_ETH_BUFFER; + } + + /* Check for valid length of data. */ + if (length > 1500 || length <= 0) + return -1; + + /* Check the number of vacant TxBDs. */ + if (info->clean_tbd_num < 1) { + printf("No available TxBDs ...\n"); + return -1; + } + + /* Get the first TxBD to send the mac header */ + p_tbd = &info->txbd[info->tx_idx]; + p_tbd->cbd_datlen = length; + p_tbd->cbd_bufaddr = (u32)packet; + p_tbd->cbd_sc |= BD_ENET_TX_LAST | BD_ENET_TX_TC | BD_ENET_TX_READY; + info->tx_idx = (info->tx_idx + 1) % CONFIG_SYS_TX_ETH_BUFFER; + + /* Enable DMA transmit task */ + MCD_continDma(info->tx_task); + + info->clean_tbd_num -= 1; + + /* wait until frame is sent . */ + while (p_tbd->cbd_sc & BD_ENET_TX_READY) + udelay(10); + + return (int)(info->txbd[info->tx_idx].cbd_sc & BD_ENET_TX_STATS); } -int mcdmafec_initialize(bd_t * bis) +static int mcdmafec_recv(struct udevice *dev, int flags, uchar **packetp) { - struct eth_device *dev; - int i; -#ifdef CONFIG_SYS_DMA_USE_INTSRAM - u32 tmp = CONFIG_SYS_INTSRAM + 0x2000; + struct fec_info_dma *info = dev->priv; + volatile fecdma_t *fecp = (fecdma_t *)info->iobase; + + cbd_t *prbd = &info->rxbd[info->rx_idx]; + u32 ievent; + int frame_length, len = 0; + + /* Check if any critical events have happened */ + ievent = fecp->eir; + if (ievent != 0) { + fecp->eir = ievent; + + if (ievent & (FEC_EIR_BABT | FEC_EIR_TXERR | FEC_EIR_RXERR)) { + printf("fec_recv: error\n"); + fec_halt(dev); + fec_init(dev); + return 0; + } + + if (ievent & FEC_EIR_HBERR) { + /* Heartbeat error */ + fecp->tcr |= FEC_TCR_GTS; + } + + if (ievent & FEC_EIR_GRA) { + /* Graceful stop complete */ + if (fecp->tcr & FEC_TCR_GTS) { + printf("fec_recv: tcr_gts\n"); + fec_halt(dev); + fecp->tcr &= ~FEC_TCR_GTS; + fec_init(dev); + } + } + } + + if (!(prbd->cbd_sc & BD_ENET_RX_EMPTY)) { + if ((prbd->cbd_sc & BD_ENET_RX_LAST) && + !(prbd->cbd_sc & BD_ENET_RX_ERR) && + ((prbd->cbd_datlen - 4) > 14)) { + /* Get buffer address and size */ + frame_length = prbd->cbd_datlen - 4; + + /* Fill the buffer and pass it to upper layers */ + net_process_received_packet((uchar *)prbd->cbd_bufaddr, + frame_length); + len = frame_length; + } + + /* Reset buffer descriptor as empty */ + if (info->rx_idx == (PKTBUFSRX - 1)) + prbd->cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY); + else + prbd->cbd_sc = BD_ENET_RX_EMPTY; + + prbd->cbd_datlen = PKTSIZE_ALIGN; + + /* Now, we have an empty RxBD, restart the DMA receive task */ + MCD_continDma(info->rx_task); + + /* Increment BD count */ + info->rx_idx = (info->rx_idx + 1) % PKTBUFSRX; + } + + return len; +} + +static void mcdmafec_halt(struct udevice *dev) +{ + fec_halt(dev); +} + +static const struct eth_ops mcdmafec_ops = { + .start = mcdmafec_init, + .send = mcdmafec_send, + .recv = mcdmafec_recv, + .stop = mcdmafec_halt, +}; + +/* + * Boot sequence, called just after mcffec_ofdata_to_platdata, + * as DM way, it replaces old mcffec_initialize. + */ +static int mcdmafec_probe(struct udevice *dev) +{ + struct fec_info_dma *info = dev->priv; + struct eth_pdata *pdata = dev_get_platdata(dev); + int node = dev_of_offset(dev); + int retval; + const u32 *val; + + info->index = dev->seq; + info->iobase = pdata->iobase; + info->miibase = pdata->iobase; + info->phy_addr = -1; + + val = fdt_getprop(gd->fdt_blob, node, "rx-task", NULL); + if (val) + info->rx_task = fdt32_to_cpu(*val); + + val = fdt_getprop(gd->fdt_blob, node, "tx-task", NULL); + if (val) + info->tx_task = fdt32_to_cpu(*val); + + val = fdt_getprop(gd->fdt_blob, node, "rx-prioprity", NULL); + if (val) + info->rx_pri = fdt32_to_cpu(*val); + + val = fdt_getprop(gd->fdt_blob, node, "tx-prioprity", NULL); + if (val) + info->tx_pri = fdt32_to_cpu(*val); + + val = fdt_getprop(gd->fdt_blob, node, "rx-init", NULL); + if (val) + info->rx_init = fdt32_to_cpu(*val); + + val = fdt_getprop(gd->fdt_blob, node, "tx-init", NULL); + if (val) + info->tx_init = fdt32_to_cpu(*val); + +#ifdef CONFIG_SYS_FEC_BUF_USE_SRAM + u32 tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000; #endif - - for (i = 0; i < ARRAY_SIZE(fec_info); i++) { - - dev = - (struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE, - sizeof *dev); - if (dev == NULL) - hang(); - - memset(dev, 0, sizeof(*dev)); - - sprintf(dev->name, "FEC%d", fec_info[i].index); - - dev->priv = &fec_info[i]; - dev->init = fec_init; - dev->halt = fec_halt; - dev->send = fec_send; - dev->recv = fec_recv; - - /* setup Receive and Transmit buffer descriptor */ -#ifdef CONFIG_SYS_DMA_USE_INTSRAM - fec_info[i].rxbd = (cbd_t *)((u32)fec_info[i].rxbd + tmp); - tmp = (u32)fec_info[i].rxbd; - fec_info[i].txbd = - (cbd_t *)((u32)fec_info[i].txbd + tmp + - (PKTBUFSRX * sizeof(cbd_t))); - tmp = (u32)fec_info[i].txbd; - fec_info[i].txbuf = - (char *)((u32)fec_info[i].txbuf + tmp + - (CONFIG_SYS_TX_ETH_BUFFER * sizeof(cbd_t))); - tmp = (u32)fec_info[i].txbuf; -#else - fec_info[i].rxbd = - (cbd_t *) memalign(CONFIG_SYS_CACHELINE_SIZE, - (PKTBUFSRX * sizeof(cbd_t))); - fec_info[i].txbd = - (cbd_t *) memalign(CONFIG_SYS_CACHELINE_SIZE, - (CONFIG_SYS_TX_ETH_BUFFER * sizeof(cbd_t))); - fec_info[i].txbuf = - (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, DBUF_LENGTH); -#endif - -#ifdef ET_DEBUG - printf("rxbd %x txbd %x\n", - (int)fec_info[i].rxbd, (int)fec_info[i].txbd); -#endif - - fec_info[i].phy_name = (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, 32); - - eth_register(dev); + init_eth_info(info); #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) - int retval; - struct mii_dev *mdiodev = mdio_alloc(); - if (!mdiodev) - return -ENOMEM; - strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN); - mdiodev->read = mcffec_miiphy_read; - mdiodev->write = mcffec_miiphy_write; + info->bus = mdio_alloc(); + if (!info->bus) + return -ENOMEM; + strncpy(info->bus->name, dev->name, MDIO_NAME_LEN); + info->bus->read = mcffec_miiphy_read; + info->bus->write = mcffec_miiphy_write; - retval = mdio_register(mdiodev); - if (retval < 0) - return retval; + retval = mdio_register(info->bus); + if (retval < 0) + return retval; #endif - if (i > 0) - fec_info[i - 1].next = &fec_info[i]; - } - fec_info[i - 1].next = &fec_info[0]; - - /* default speed */ - bis->bi_ethspeed = 10; - return 0; } + +static int mcdmafec_remove(struct udevice *dev) +{ + struct fec_info_dma *priv = dev_get_priv(dev); + + mdio_unregister(priv->bus); + mdio_free(priv->bus); + + return 0; +} + +/* + * Boot sequence, called 1st + */ +static int mcdmafec_ofdata_to_platdata(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + const u32 *val; + + pdata->iobase = (phys_addr_t)devfdt_get_addr(dev); + /* Default to 10Mbit/s */ + pdata->max_speed = 10; + + val = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed", NULL); + if (val) + pdata->max_speed = fdt32_to_cpu(*val); + + return 0; +} + +static const struct udevice_id mcdmafec_ids[] = { + { .compatible = "fsl,mcf-dma-fec" }, + { } +}; + +U_BOOT_DRIVER(mcffec) = { + .name = "mcdmafec", + .id = UCLASS_ETH, + .of_match = mcdmafec_ids, + .ofdata_to_platdata = mcdmafec_ofdata_to_platdata, + .probe = mcdmafec_probe, + .remove = mcdmafec_remove, + .ops = &mcdmafec_ops, + .priv_auto_alloc_size = sizeof(struct fec_info_dma), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), +}; From 48f885ae406a6a3369e6a110255337625369f581 Mon Sep 17 00:00:00 2001 From: Angelo Durgehello Date: Fri, 15 Nov 2019 23:54:20 +0100 Subject: [PATCH 09/28] drivers: mcfmii: add dm support Add specific dm code, but maintaining this driver as is, so more in the shape of a mii library. Can be moved to dm in a further step. Signed-off-by: Angelo Durgehello --- drivers/net/mcfmii.c | 48 +++++++++++++++++++++++--------------------- 1 file changed, 25 insertions(+), 23 deletions(-) diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c index b8af2cc44b..3b8ee07c13 100644 --- a/drivers/net/mcfmii.c +++ b/drivers/net/mcfmii.c @@ -41,14 +41,6 @@ DECLARE_GLOBAL_DATA_PTR; # define CONFIG_SYS_UNSPEC_STRID 0 #endif -#ifdef CONFIG_MCF547x_8x -typedef struct fec_info_dma FEC_INFO_T; -#define FEC_T fecdma_t -#else -typedef struct fec_info_s FEC_INFO_T; -#define FEC_T fec_t -#endif - typedef struct phy_info_struct { u32 phyid; char *strid; @@ -78,7 +70,7 @@ phy_info_t phyinfo[] = { * mii_init -- Initialize the MII for MII command without ethernet * This function is a subset of eth_init */ -void mii_reset(FEC_INFO_T *info) +void mii_reset(fec_info_t *info) { volatile FEC_T *fecp = (FEC_T *) (info->miibase); int i; @@ -95,9 +87,13 @@ void mii_reset(FEC_INFO_T *info) /* send command to phy using mii, wait for result */ uint mii_send(uint mii_cmd) { - FEC_INFO_T *info; - volatile FEC_T *ep; +#ifdef CONFIG_DM_ETH + struct udevice *dev; +#else struct eth_device *dev; +#endif + fec_info_t *info; + volatile FEC_T *ep; uint mii_reply; int j = 0; @@ -110,11 +106,11 @@ uint mii_send(uint mii_cmd) ep->mmfr = mii_cmd; /* command to phy */ /* wait for mii complete */ - while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) { + while (!(ep->eir & FEC_EIR_MII) && (j < info->to_loop)) { udelay(1); j++; } - if (j >= MCFFEC_TOUT_LOOP) { + if (j >= info->to_loop) { printf("MII not complete\n"); return -1; } @@ -131,10 +127,9 @@ uint mii_send(uint mii_cmd) #endif /* CONFIG_SYS_DISCOVER_PHY || (CONFIG_MII) */ #if defined(CONFIG_SYS_DISCOVER_PHY) -int mii_discover_phy(struct eth_device *dev) +int mii_discover_phy(fec_info_t *info) { #define MAX_PHY_PASSES 11 - FEC_INFO_T *info = dev->priv; int phyaddr, pass; uint phyno, phytype; int i, found = 0; @@ -157,7 +152,7 @@ int mii_discover_phy(struct eth_device *dev) phytype = mii_send(mk_mii_read(phyno, MII_PHYSID1)); #ifdef ET_DEBUG - printf("PHY type 0x%x pass %d type\n", phytype, pass); + printf("PHY type 0x%x pass %d\n", phytype, pass); #endif if (phytype == 0xffff) continue; @@ -207,9 +202,13 @@ void mii_init(void) __attribute__((weak,alias("__mii_init"))); void __mii_init(void) { - FEC_INFO_T *info; - volatile FEC_T *fecp; +#ifdef CONFIG_DM_ETH + struct udevice *dev; +#else struct eth_device *dev; +#endif + fec_info_t *info; + volatile FEC_T *fecp; int miispd = 0, i = 0; u16 status = 0; u16 linkgood = 0; @@ -220,7 +219,7 @@ void __mii_init(void) fecp = (FEC_T *) info->miibase; - fecpin_setclear(dev, 1); + fecpin_setclear(info, 1); mii_reset(info); @@ -234,9 +233,13 @@ void __mii_init(void) miispd = (gd->bus_clk / 1000000) / 5; fecp->mscr = miispd << 1; - info->phy_addr = mii_discover_phy(dev); +#ifdef CONFIG_SYS_DISCOVER_PHY + info->phy_addr = mii_discover_phy(info); +#endif + if (info->phy_addr == -1) + return; - while (i < MCFFEC_TOUT_LOOP) { + while (i < info->to_loop) { status = 0; i++; /* Read PHY control register */ @@ -257,9 +260,8 @@ void __mii_init(void) udelay(1); } - if (i >= MCFFEC_TOUT_LOOP) { + if (i >= info->to_loop) printf("Link UP timeout\n"); - } /* adapt to the duplex and speed settings of the phy */ info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16; From ae3d38f3187143673d60852d527369e290c0c29d Mon Sep 17 00:00:00 2001 From: Robert Beckett Date: Mon, 28 Oct 2019 18:44:06 +0000 Subject: [PATCH 10/28] bootcount: add a DM i2c eeprom backing store for bootcount This driver allows the use of i2c eeprom device or partition as backing store for boot counter values with DM enabled. Signed-off-by: Robert Beckett --- drivers/bootcount/Kconfig | 10 ++++ drivers/bootcount/Makefile | 1 + drivers/bootcount/i2c-eeprom.c | 95 ++++++++++++++++++++++++++++++++++ 3 files changed, 106 insertions(+) create mode 100644 drivers/bootcount/i2c-eeprom.c diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index b7c29f2fd3..0e506c9ea2 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -96,6 +96,16 @@ config DM_BOOTCOUNT_RTC Accesses to the backing store are performed using the write16 and read16 ops of DM RTC devices. +config DM_BOOTCOUNT_I2C_EEPROM + bool "Support i2c eeprom devices as a backing store for bootcount" + depends on I2C_EEPROM + help + Enabled reading/writing the bootcount in a DM i2c eeprom device. + The wrapper device is to be specified with the compatible string + 'u-boot,bootcount-i2c-eeprom' and the 'i2c-eeprom'-property (a phandle + pointing to the underlying i2c eeprom device) and an optional 'offset' + property are supported. + endmenu endif diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile index f9841d8615..73ccfb5a08 100644 --- a/drivers/bootcount/Makefile +++ b/drivers/bootcount/Makefile @@ -10,3 +10,4 @@ obj-$(CONFIG_BOOTCOUNT_EXT) += bootcount_ext.o obj-$(CONFIG_DM_BOOTCOUNT) += bootcount-uclass.o obj-$(CONFIG_DM_BOOTCOUNT_RTC) += rtc.o +obj-$(CONFIG_DM_BOOTCOUNT_I2C_EEPROM) += i2c-eeprom.o diff --git a/drivers/bootcount/i2c-eeprom.c b/drivers/bootcount/i2c-eeprom.c new file mode 100644 index 0000000000..ee760a2742 --- /dev/null +++ b/drivers/bootcount/i2c-eeprom.c @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 Collabora + * (C) Copyright 2019 GE + */ + +#include +#include +#include +#include + +static const u8 bootcount_magic = 0xbc; + +struct bootcount_i2c_eeprom_priv { + struct udevice *i2c_eeprom; + u32 offset; +}; + +static int bootcount_i2c_eeprom_set(struct udevice *dev, const u32 a) +{ + struct bootcount_i2c_eeprom_priv *priv = dev_get_priv(dev); + const u16 val = bootcount_magic << 8 | (a & 0xff); + + if (i2c_eeprom_write(priv->i2c_eeprom, priv->offset, + (uint8_t *)&val, 2) < 0) { + debug("%s: write failed\n", __func__); + return -EIO; + } + + return 0; +} + +static int bootcount_i2c_eeprom_get(struct udevice *dev, u32 *a) +{ + struct bootcount_i2c_eeprom_priv *priv = dev_get_priv(dev); + u16 val; + + if (i2c_eeprom_read(priv->i2c_eeprom, priv->offset, + (uint8_t *)&val, 2) < 0) { + debug("%s: read failed\n", __func__); + return -EIO; + } + + if (val >> 8 == bootcount_magic) { + *a = val & 0xff; + return 0; + } + + debug("%s: bootcount magic does not match on %04x\n", __func__, val); + return -EIO; +} + +static int bootcount_i2c_eeprom_probe(struct udevice *dev) +{ + struct ofnode_phandle_args phandle_args; + struct bootcount_i2c_eeprom_priv *priv = dev_get_priv(dev); + struct udevice *i2c_eeprom; + + if (dev_read_phandle_with_args(dev, "i2c-eeprom", NULL, 0, 0, + &phandle_args)) { + debug("%s: i2c-eeprom backing device not specified\n", + dev->name); + return -ENOENT; + } + + if (uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, phandle_args.node, + &i2c_eeprom)) { + debug("%s: could not get backing device\n", dev->name); + return -ENODEV; + } + + priv->i2c_eeprom = i2c_eeprom; + priv->offset = dev_read_u32_default(dev, "offset", 0); + + return 0; +} + +static const struct bootcount_ops bootcount_i2c_eeprom_ops = { + .get = bootcount_i2c_eeprom_get, + .set = bootcount_i2c_eeprom_set, +}; + +static const struct udevice_id bootcount_i2c_eeprom_ids[] = { + { .compatible = "u-boot,bootcount-i2c-eeprom" }, + { } +}; + +U_BOOT_DRIVER(bootcount_spi_flash) = { + .name = "bootcount-i2c-eeprom", + .id = UCLASS_BOOTCOUNT, + .priv_auto_alloc_size = sizeof(struct bootcount_i2c_eeprom_priv), + .probe = bootcount_i2c_eeprom_probe, + .of_match = bootcount_i2c_eeprom_ids, + .ops = &bootcount_i2c_eeprom_ops, +}; From 8947145cd0ae8adf1c5dc0ae6756d49bf5330b48 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 11 Nov 2019 09:39:11 -0500 Subject: [PATCH 11/28] m68k: Drop CONFIG_MCFPIT support All platforms currently use the "MCFTMR" DMA timer rather than the PIT timer, so drop the MCFPIT code. Cc: Huan Wang Cc: Angelo Dureghello Cc: TsiChung Liew Cc: Wolfgang Wegner Signed-off-by: Tom Rini Reviewed-by: Angelo Dureghello --- arch/m68k/include/asm/immap.h | 42 --------------------- arch/m68k/lib/time.c | 63 -------------------------------- board/freescale/m52277evb/README | 1 - board/freescale/m53017evb/README | 1 - board/freescale/m5373evb/README | 1 - board/freescale/m54455evb/README | 1 - include/configs/M5208EVBE.h | 1 - include/configs/M52277EVB.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/M54418TWR.h | 1 - include/configs/M54451EVB.h | 1 - include/configs/M54455EVB.h | 1 - include/configs/astro_mcf5373l.h | 1 - include/configs/stmark2.h | 1 - scripts/config_whitelist.txt | 1 - 18 files changed, 121 deletions(-) diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index 80fa25769b..9e84fb9d26 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -28,12 +28,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (128) #endif /* CONFIG_M520x */ @@ -62,12 +56,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (128) #endif /* CONFIG_M52277 */ @@ -91,12 +79,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (128) #endif /* CONFIG_M5235 */ @@ -285,12 +267,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (128) #endif /* CONFIG_M5301x */ @@ -315,12 +291,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (128) #endif /* CONFIG_M5329 && CONFIG_M5373 */ @@ -355,12 +325,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (192) @@ -391,12 +355,6 @@ #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#ifdef CONFIG_MCFPIT -#define CONFIG_SYS_UDELAY_BASE (MMAP_PIT0) -#define CONFIG_SYS_PIT_BASE (MMAP_PIT1) -#define CONFIG_SYS_PIT_PRESCALE (6) -#endif - #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) #define CONFIG_SYS_NUM_IRQS (128) diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c index 8957d194d4..bde1f4c228 100644 --- a/arch/m68k/lib/time.c +++ b/arch/m68k/lib/time.c @@ -110,69 +110,6 @@ ulong get_timer(ulong base) #endif /* CONFIG_MCFTMR */ -#if defined(CONFIG_MCFPIT) -#if !defined(CONFIG_SYS_PIT_BASE) -# error "CONFIG_SYS_PIT_BASE not defined!" -#endif - -static unsigned short lastinc; - -void __udelay(unsigned long usec) -{ - volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_UDELAY_BASE); - uint tmp; - - while (usec > 0) { - if (usec > 65000) - tmp = 65000; - else - tmp = usec; - usec = usec - tmp; - - /* Set up TIMER 3 as timebase clock */ - timerp->pcsr = PIT_PCSR_OVW; - timerp->pmr = 0; - /* set period to 1 us */ - timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN; - - timerp->pmr = tmp; - while (timerp->pcntr > 0) ; - } -} - -void timer_init(void) -{ - volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_PIT_BASE); - timestamp = 0; - - /* Set up TIMER 4 as poll clock */ - timerp->pcsr = PIT_PCSR_OVW; - timerp->pmr = lastinc = 0; - timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN; - - return 0; -} - -ulong get_timer(ulong base) -{ - unsigned short now, diff; - volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_PIT_BASE); - - now = timerp->pcntr; - diff = -(now - lastinc); - - timestamp += diff; - lastinc = now; - return timestamp - base; -} - -void wait_ticks(unsigned long ticks) -{ - u32 start = get_timer(0); - while (get_timer(start) < ticks) ; -} -#endif /* CONFIG_MCFPIT */ - /* * This function is derived from PowerPC code (read timebase as long long). * On M68K it just returns the timer value. diff --git a/board/freescale/m52277evb/README b/board/freescale/m52277evb/README index b7ceb5993e..76f4789335 100644 --- a/board/freescale/m52277evb/README +++ b/board/freescale/m52277evb/README @@ -79,7 +79,6 @@ RTC_DEBUG -- define to show RTC debug message CONFIG_CMD_DATE -- enable to use date feature in U-Boot CONFIG_MCFTMR -- define to use DMA timer -CONFIG_MCFPIT -- define to use PIT timer CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged diff --git a/board/freescale/m53017evb/README b/board/freescale/m53017evb/README index 2fca12c417..a7074c9b71 100644 --- a/board/freescale/m53017evb/README +++ b/board/freescale/m53017evb/README @@ -88,7 +88,6 @@ CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register MCFFEC_TOUT_LOOP -- set FEC timeout loop CONFIG_MCFTMR -- define to use DMA timer -CONFIG_MCFPIT -- define to use PIT timer CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged diff --git a/board/freescale/m5373evb/README b/board/freescale/m5373evb/README index 757f0abdd7..f0a0631c94 100644 --- a/board/freescale/m5373evb/README +++ b/board/freescale/m5373evb/README @@ -87,7 +87,6 @@ CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register MCFFEC_TOUT_LOOP -- set FEC timeout loop CONFIG_MCFTMR -- define to use DMA timer -CONFIG_MCFPIT -- define to use PIT timer CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged diff --git a/board/freescale/m54455evb/README b/board/freescale/m54455evb/README index 4a8719333a..260aec9f1b 100644 --- a/board/freescale/m54455evb/README +++ b/board/freescale/m54455evb/README @@ -110,7 +110,6 @@ CONFIG_SYS_ATA_STRIDE -- define for Interval between registers _IO_BASE -- define for IO base address CONFIG_MCFTMR -- define to use DMA timer -CONFIG_MCFPIT -- define to use PIT timer CONFIG_SYS_FSL_I2C -- define to use FSL common I2C driver CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 27a3eb214e..d1cb003ff5 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -38,7 +38,6 @@ /* Timer */ #define CONFIG_MCFTMR -#undef CONFIG_MCFPIT /* I2C */ #define CONFIG_SYS_I2C diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index a5a1c38f6e..884ed11dba 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -90,7 +90,6 @@ /* Timer */ #define CONFIG_MCFTMR -#undef CONFIG_MCFPIT /* I2c */ #define CONFIG_SYS_I2C diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index d062bc1cd1..2a90525256 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -47,7 +47,6 @@ /* Timer */ #define CONFIG_MCFTMR -#undef CONFIG_MCFPIT /* I2C */ #define CONFIG_SYS_I2C diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 1756c99640..9ae38ff3cf 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -53,7 +53,6 @@ /* Timer */ #define CONFIG_MCFTMR -#undef CONFIG_MCFPIT /* I2C */ #define CONFIG_SYS_I2C diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 68693708e2..d0ddd089af 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -47,7 +47,6 @@ /* Timer */ #define CONFIG_MCFTMR -#undef CONFIG_MCFPIT /* I2C */ #define CONFIG_SYS_I2C diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 5a28ea850a..fe0f5b84fd 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -47,7 +47,6 @@ /* Timer */ #define CONFIG_MCFTMR -#undef CONFIG_MCFPIT /* I2C */ #define CONFIG_SYS_I2C diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index b3c1bd7343..62e3453860 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -128,7 +128,6 @@ /* Timer */ #define CONFIG_MCFTMR -#undef CONFIG_MCFPIT /* I2c */ #undef CONFIG_SYS_FSL_I2C diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index 7f7a3715bc..7b48c662be 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -97,7 +97,6 @@ /* Timer */ #define CONFIG_MCFTMR -#undef CONFIG_MCFPIT /* I2c */ #define CONFIG_SYS_I2C diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index a5462cf724..34653f7a46 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -122,7 +122,6 @@ /* Timer */ #define CONFIG_MCFTMR -#undef CONFIG_MCFPIT /* I2c */ #define CONFIG_SYS_I2C diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 3d79311d62..e1128043b0 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -57,7 +57,6 @@ /* Timer */ #define CONFIG_MCFTMR -#undef CONFIG_MCFPIT /* I2C */ #define CONFIG_SYS_I2C diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index d6ba1f64f3..4df2750a89 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -60,7 +60,6 @@ /* Timer */ #define CONFIG_MCFTMR -#undef CONFIG_MCFPIT /* DSPI and Serial Flash */ #define CONFIG_CF_DSPI diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 9f5d173820..ce6c339411 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1081,7 +1081,6 @@ CONFIG_MAX_RAM_BANK_SIZE CONFIG_MCF5249 CONFIG_MCF5253 CONFIG_MCFFEC -CONFIG_MCFPIT CONFIG_MCFRTC CONFIG_MCFTMR CONFIG_MCLK_DIS From c82abaa5d63f5259fd64c59bd70010310b4c4e4b Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Mon, 11 Nov 2019 22:30:46 +0100 Subject: [PATCH 12/28] spl: fix stack usage check if gd is not initialized Most platforms do not set up gd->start_addr_sp in SPL. Since this is required for CONFIG_SPL_SYS_REPORT_SACK_F_USAGE to work correctly, set up gd->start_addr_sp in SPL to the value passed to board_init_f_init_reserve if it is not set yet. Fixes: d8c0332031 ("spl: implement stack usage check") Signed-off-by: Simon Goldschmidt --- common/init/board_init.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/common/init/board_init.c b/common/init/board_init.c index e52106966d..3bc7994586 100644 --- a/common/init/board_init.c +++ b/common/init/board_init.c @@ -18,6 +18,19 @@ __weak void arch_setup_gd(struct global_data *gd_ptr) } #endif /* !CONFIG_X86 && !CONFIG_ARM */ +/** + * This function is called from board_init_f_init_reserve to set up + * gd->start_addr_sp for stack protection if not already set otherwise + */ +__weak void board_init_f_init_stack_protection_addr(ulong base) +{ +#if CONFIG_IS_ENABLED(SYS_REPORT_STACK_F_USAGE) + /* set up stack pointer for stack usage if not set yet */ + if (!gd->start_addr_sp) + gd->start_addr_sp = base; +#endif +} + /** * This function is called after the position of the initial stack is * determined in gd->start_addr_sp. Boards can override it to set up @@ -129,6 +142,10 @@ void board_init_f_init_reserve(ulong base) #if !defined(CONFIG_ARM) arch_setup_gd(gd_ptr); #endif + + if (CONFIG_IS_ENABLED(SYS_REPORT_STACK_F_USAGE)) + board_init_f_init_stack_protection_addr(base); + /* next alloc will be higher by one GD plus 16-byte alignment */ base += roundup(sizeof(struct global_data), 16); From 0b326fc296435ce27aa41320b6f7eb9266da39ef Mon Sep 17 00:00:00 2001 From: Han Nandor Date: Tue, 12 Nov 2019 08:39:38 +0000 Subject: [PATCH 13/28] rtc: add support for DS3232 device DS3232 is an i2c RTC with 236 bytes of battery-backed SRAM. Add an RTC driver for DS3232 device, which provides time and date support. Also read and write functions are provided, which can be used to access the SRAM memory. Signed-off-by: Nandor Han --- doc/device-tree-bindings/rtc/ds3232.txt | 15 ++ drivers/rtc/Kconfig | 8 + drivers/rtc/Makefile | 1 + drivers/rtc/ds3232.c | 274 ++++++++++++++++++++++++ 4 files changed, 298 insertions(+) create mode 100644 doc/device-tree-bindings/rtc/ds3232.txt create mode 100644 drivers/rtc/ds3232.c diff --git a/doc/device-tree-bindings/rtc/ds3232.txt b/doc/device-tree-bindings/rtc/ds3232.txt new file mode 100644 index 0000000000..254b7bc3c3 --- /dev/null +++ b/doc/device-tree-bindings/rtc/ds3232.txt @@ -0,0 +1,15 @@ +DS3232 Real-Time Clock with SRAM + +The RTC driver provides time and date functionality. Also read and write +functions are provided that can be used to access the SRAM memory. + +Required properties: +- compatible : should contain "dallas,ds3232" +- reg : the I2C RTC address + +Example: + +rtc@68 { + compatible = "dallas,ds3232"; + reg = <0x68>; +}; diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 89e71cc7eb..59e2fc44ba 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -55,6 +55,14 @@ config RTC_DS1307 Support for Dallas Semiconductor (now Maxim) DS1307 and DS1338/9 and compatible Real Time Clock devices. +config RTC_DS3232 + bool "Enable DS3232 driver" + depends on DM_RTC + depends on DM_I2C + help + Support for Dallas Semiconductor (now Maxim) DS3232 compatible + Real Time Clock devices. + config RTC_ISL1208 bool "Enable ISL1208 driver" depends on DM_RTC diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index e8875ce10f..12eb449583 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_RTC_DS1556) += ds1556.o obj-$(CONFIG_RTC_DS164x) += ds164x.o obj-$(CONFIG_RTC_DS174x) += ds174x.o obj-$(CONFIG_RTC_DS3231) += ds3231.o +obj-$(CONFIG_RTC_DS3232) += ds3232.o obj-$(CONFIG_RTC_FTRTC010) += ftrtc010.o obj-$(CONFIG_SANDBOX) += i2c_rtc_emul.o obj-$(CONFIG_RTC_IMXDI) += imxdi.o diff --git a/drivers/rtc/ds3232.c b/drivers/rtc/ds3232.c new file mode 100644 index 0000000000..09a106aa4e --- /dev/null +++ b/drivers/rtc/ds3232.c @@ -0,0 +1,274 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019, Vaisala Oyj + */ + +#include +#include +#include +#include +#include + +/* + * RTC register addresses + */ +#define RTC_SEC_REG_ADDR 0x00 +#define RTC_MIN_REG_ADDR 0x01 +#define RTC_HR_REG_ADDR 0x02 +#define RTC_DAY_REG_ADDR 0x03 +#define RTC_DATE_REG_ADDR 0x04 +#define RTC_MON_REG_ADDR 0x05 +#define RTC_YR_REG_ADDR 0x06 +#define RTC_CTL_REG_ADDR 0x0e +#define RTC_STAT_REG_ADDR 0x0f +#define RTC_TEST_REG_ADDR 0x13 + +/* + * RTC control register bits + */ +#define RTC_CTL_BIT_A1IE BIT(0) /* Alarm 1 interrupt enable */ +#define RTC_CTL_BIT_A2IE BIT(1) /* Alarm 2 interrupt enable */ +#define RTC_CTL_BIT_INTCN BIT(2) /* Interrupt control */ +#define RTC_CTL_BIT_DOSC BIT(7) /* Disable Oscillator */ + +/* + * RTC status register bits + */ +#define RTC_STAT_BIT_A1F BIT(0) /* Alarm 1 flag */ +#define RTC_STAT_BIT_A2F BIT(1) /* Alarm 2 flag */ +#define RTC_STAT_BIT_EN32KHZ BIT(3) /* Enable 32KHz Output */ +#define RTC_STAT_BIT_BB32KHZ BIT(6) /* Battery backed 32KHz Output */ +#define RTC_STAT_BIT_OSF BIT(7) /* Oscillator stop flag */ + +/* + * RTC test register bits + */ +#define RTC_TEST_BIT_SWRST BIT(7) /* Software reset */ + +#define RTC_DATE_TIME_REG_SIZE 7 +#define RTC_SRAM_START 0x14 +#define RTC_SRAM_END 0xFF +#define RTC_SRAM_SIZE 236 + +struct ds3232_priv_data { + u8 max_register; + u8 sram_start; + int sram_size; +}; + +static int ds3232_rtc_read8(struct udevice *dev, unsigned int reg) +{ + int ret; + u8 buf; + struct ds3232_priv_data *priv_data; + + priv_data = dev_get_priv(dev); + if (!priv_data) + return -EINVAL; + + if (reg > priv_data->max_register) + return -EINVAL; + + ret = dm_i2c_read(dev, reg, &buf, sizeof(buf)); + if (ret < 0) + return ret; + + return buf; +} + +static int ds3232_rtc_write8(struct udevice *dev, unsigned int reg, int val) +{ + u8 buf = (u8)val; + struct ds3232_priv_data *priv_data; + + priv_data = dev_get_priv(dev); + if (!priv_data) + return -EINVAL; + + if (reg > priv_data->max_register) + return -EINVAL; + + return dm_i2c_write(dev, reg, &buf, sizeof(buf)); +} + +static int reset_sram(struct udevice *dev) +{ + int ret, sram_end, reg; + struct ds3232_priv_data *priv_data; + + priv_data = dev_get_priv(dev); + if (!priv_data) + return -EINVAL; + + sram_end = priv_data->sram_start + priv_data->sram_size; + + for (reg = priv_data->sram_start; reg < sram_end; reg++) { + ret = ds3232_rtc_write8(dev, reg, 0x00); + if (ret < 0) + return ret; + } + + return 0; +} + +static int verify_osc(struct udevice *dev) +{ + int ret, rtc_status; + + ret = ds3232_rtc_read8(dev, RTC_STAT_REG_ADDR); + if (ret < 0) + return ret; + + rtc_status = ret; + + if (rtc_status & RTC_STAT_BIT_OSF) { + dev_warn(dev, + "oscillator discontinuity flagged, time unreliable\n"); + /* + * In case OSC was off we cannot trust the SRAM data anymore. + * Reset it to 0x00. + */ + ret = reset_sram(dev); + if (ret < 0) + return ret; + } + + return 0; +} + +static int ds3232_rtc_set(struct udevice *dev, const struct rtc_time *tm) +{ + u8 buf[RTC_DATE_TIME_REG_SIZE]; + u8 is_century; + + if (tm->tm_year < 1900 || tm->tm_year > 2099) + dev_warn(dev, "WARNING: year should be between 1900 and 2099!\n"); + + is_century = (tm->tm_year >= 2000) ? 0x80 : 0; + + buf[RTC_SEC_REG_ADDR] = bin2bcd(tm->tm_sec); + buf[RTC_MIN_REG_ADDR] = bin2bcd(tm->tm_min); + buf[RTC_HR_REG_ADDR] = bin2bcd(tm->tm_hour); + buf[RTC_DAY_REG_ADDR] = bin2bcd(tm->tm_wday + 1); + buf[RTC_DATE_REG_ADDR] = bin2bcd(tm->tm_mday); + buf[RTC_MON_REG_ADDR] = bin2bcd(tm->tm_mon) | is_century; + buf[RTC_YR_REG_ADDR] = bin2bcd(tm->tm_year % 100); + + return dm_i2c_write(dev, 0, buf, sizeof(buf)); +} + +static int ds3232_rtc_get(struct udevice *dev, struct rtc_time *tm) +{ + int ret; + u8 buf[RTC_DATE_TIME_REG_SIZE]; + u8 is_twelve_hr; + u8 is_pm; + u8 is_century; + + ret = verify_osc(dev); + if (ret < 0) + return ret; + + ret = dm_i2c_read(dev, 0, buf, sizeof(buf)); + if (ret < 0) + return ret; + + /* Extract additional information for AM/PM and century */ + is_twelve_hr = buf[RTC_HR_REG_ADDR] & 0x40; + is_pm = buf[RTC_HR_REG_ADDR] & 0x20; + is_century = buf[RTC_MON_REG_ADDR] & 0x80; + + tm->tm_sec = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F); + tm->tm_min = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F); + + if (is_twelve_hr) + tm->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x1F) + + (is_pm ? 12 : 0); + else + tm->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR]); + + tm->tm_wday = bcd2bin((buf[RTC_DAY_REG_ADDR] & 0x07) - 1); + tm->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F); + tm->tm_mon = bcd2bin((buf[RTC_MON_REG_ADDR] & 0x7F)); + tm->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) + + (is_century ? 2000 : 1900); + tm->tm_yday = 0; + tm->tm_isdst = 0; + + return 0; +} + +static int ds3232_rtc_reset(struct udevice *dev) +{ + int ret; + + ret = reset_sram(dev); + if (ret < 0) + return ret; + + /* + * From datasheet + * (https://datasheets.maximintegrated.com/en/ds/DS3232M.pdf): + * + * The device reset occurs during the normal acknowledge time slot + * following the receipt of the data byte carrying that + * SWRST instruction a NACK occurs due to the resetting action. + * + * Therefore we don't verify the result of I2C write operation since it + * will fail due the NACK. + */ + ds3232_rtc_write8(dev, RTC_TEST_REG_ADDR, RTC_TEST_BIT_SWRST); + + return 0; +} + +static int ds3232_probe(struct udevice *dev) +{ + int rtc_status; + int ret; + struct ds3232_priv_data *priv_data; + + priv_data = dev_get_priv(dev); + if (!priv_data) + return -EINVAL; + + priv_data->sram_start = RTC_SRAM_START; + priv_data->max_register = RTC_SRAM_END; + priv_data->sram_size = RTC_SRAM_SIZE; + + ret = ds3232_rtc_read8(dev, RTC_STAT_REG_ADDR); + if (ret < 0) + return ret; + + rtc_status = ret; + + ret = verify_osc(dev); + if (ret < 0) + return ret; + + rtc_status &= ~(RTC_STAT_BIT_OSF | RTC_STAT_BIT_A1F | RTC_STAT_BIT_A2F); + + return ds3232_rtc_write8(dev, RTC_STAT_REG_ADDR, rtc_status); +} + +static const struct rtc_ops ds3232_rtc_ops = { + .get = ds3232_rtc_get, + .set = ds3232_rtc_set, + .reset = ds3232_rtc_reset, + .read8 = ds3232_rtc_read8, + .write8 = ds3232_rtc_write8 +}; + +static const struct udevice_id ds3232_rtc_ids[] = { + { .compatible = "dallas,ds3232" }, + { } +}; + +U_BOOT_DRIVER(rtc_ds3232) = { + .name = "rtc-ds3232", + .id = UCLASS_RTC, + .probe = ds3232_probe, + .of_match = ds3232_rtc_ids, + .ops = &ds3232_rtc_ops, + .priv_auto_alloc_size = sizeof(struct ds3232_priv_data), +}; From 36b8b5d3adf7f8de6e5692c21b23a980da50884c Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Fri, 22 Nov 2019 15:32:24 +0100 Subject: [PATCH 14/28] poweroff: add poweroff for mt6323 pmic this adds poweroff to bananapi r2 / mt7623 / mt6323 pmic Signed-off-by: Frank Wunderlich --- drivers/power/Kconfig | 7 +++++++ drivers/power/Makefile | 1 + drivers/power/mt6323.c | 37 +++++++++++++++++++++++++++++++++++++ 3 files changed, 45 insertions(+) create mode 100644 drivers/power/mt6323.c diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index cb2c6fe3eb..5910926fac 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -366,4 +366,11 @@ config TWL4030_POWER The TWL4030 in a combination audio CODEC/power management with GPIO and it is commonly used with the OMAP3 family of processors +config POWER_MT6323 + bool "Poweroff driver for mediatek mt6323" + select CMD_POWEROFF + help + This adds poweroff driver for mt6323 + this pmic is used on mt7623 / Bananapi R2 + endmenu diff --git a/drivers/power/Makefile b/drivers/power/Makefile index dd5bc0dc44..2dcc7bb99d 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -20,3 +20,4 @@ obj-$(CONFIG_DIALOG_POWER) += power_dialog.o obj-$(CONFIG_POWER_FSL) += power_fsl.o obj-$(CONFIG_POWER_I2C) += power_i2c.o obj-$(CONFIG_POWER_SPI) += power_spi.o +obj-$(CONFIG_POWER_MT6323) += mt6323.o diff --git a/drivers/power/mt6323.c b/drivers/power/mt6323.c new file mode 100644 index 0000000000..566be5f39e --- /dev/null +++ b/drivers/power/mt6323.c @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Frank Wunderlich + */ + +#include +#include +#include + +#define PWRAP_BASE 0x1000d000 +#define PWRAP_WACS2_CMD 0x9c + +#define PWRAP_CALC(adr, wdata) ((1 << 31) | (((adr) >> 1) << 16) | (wdata)) + +#define MT6323_PWRC_BASE 0x8000 +#define RTC_BBPU 0x0000 +#define RTC_BBPU_KEY (0x43 << 8) +#define RTC_WRTGR 0x003c + +int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + u32 addr, val; + + addr = PWRAP_BASE + PWRAP_WACS2_CMD; + val = PWRAP_CALC(MT6323_PWRC_BASE + RTC_BBPU, RTC_BBPU_KEY); + writel(val, addr); + + mdelay(10); + + val = PWRAP_CALC(MT6323_PWRC_BASE + RTC_WRTGR, 1); + writel(val, addr); + + // wait some time and then print error + mdelay(10000); + printf("Failed to power off!!!\n"); + return 1; +} From 58e1fdb051c469049d8ed8b31f229470de4d0562 Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Mon, 25 Nov 2019 17:24:13 +0100 Subject: [PATCH 15/28] km/boards: fix typo for MAC address offset config option This patch only fixes a typo. Signed-off-by: Holger Brunck CC: Stefan Roese CC: Valentin Longchamp Reviewed-by: Stefan Roese --- board/keymile/Kconfig | 2 +- board/keymile/common/ivm.c | 6 +++--- configs/kmcoge5un_defconfig | 2 +- configs/mgcoge3un_defconfig | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/board/keymile/Kconfig b/board/keymile/Kconfig index 5f512d56da..634dbbe097 100644 --- a/board/keymile/Kconfig +++ b/board/keymile/Kconfig @@ -76,7 +76,7 @@ config KM_COMMON_ETH_INIT Use the Ethernet initialization implemented in common code, which detects if a Piggy board is present. -config PIGGY_MAC_ADRESS_OFFSET +config PIGGY_MAC_ADDRESS_OFFSET int "Piggy Address Offset" default 0 help diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index 50df44d1c1..429e9c7914 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -309,16 +309,16 @@ static int ivm_populate_env(unsigned char *buf, int len) #ifndef CONFIG_KMTEGR1 /* if an offset is defined, add it */ - process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, true); + process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADDRESS_OFFSET, true); env_set((char *)"ethaddr", (char *)valbuf); #else /* KMTEGR1 has a special setup. eth0 has no connection to the outside and * gets an locally administred MAC address, eth1 is the debug interface and * gets the official MAC address from the IVM */ - process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, false); + process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADDRESS_OFFSET, false); env_set((char *)"ethaddr", (char *)valbuf); - process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, true); + process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADDRESS_OFFSET, true); env_set((char *)"eth1addr", (char *)valbuf); #endif diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index a1be25c58d..80a7555b54 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -4,7 +4,7 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y -CONFIG_PIGGY_MAC_ADRESS_OFFSET=3 +CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 CONFIG_KM_ENV_IS_IN_SPI_NOR=y CONFIG_KM_PIGGY4_88E6352=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig index e7c39d2719..1604349bc9 100644 --- a/configs/mgcoge3un_defconfig +++ b/configs/mgcoge3un_defconfig @@ -4,7 +4,7 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y -CONFIG_PIGGY_MAC_ADRESS_OFFSET=3 +CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 CONFIG_KM_PIGGY4_88E6061=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 From fd7c400962dd905611d5d3453a02fd4707da10fb Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Mon, 25 Nov 2019 17:24:14 +0100 Subject: [PATCH 16/28] km/boards: add MAC address offset as argument to ivm_populate_env For upcoming SECU board we have different MAC address offsets depending on which functional unit we are running. In this case we need to pass this value to the ivm_populate_env function instead of using the hard coded config option there. Signed-off-by: Holger Brunck CC: Stefan Roese CC: Valentin Longchamp CC: Marek Vasut Reviewed-by: Stefan Roese --- board/keymile/common/common.h | 2 +- board/keymile/common/ivm.c | 12 ++++++------ board/keymile/km83xx/km83xx.c | 3 ++- board/keymile/km_arm/km_arm.c | 3 ++- board/keymile/kmp204x/kmp204x.c | 3 ++- 5 files changed, 13 insertions(+), 10 deletions(-) diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h index 42b760dc6e..8251de4db8 100644 --- a/board/keymile/common/common.h +++ b/board/keymile/common/common.h @@ -121,7 +121,7 @@ struct bfticu_iomap { }; int ethernet_present(void); -int ivm_read_eeprom(unsigned char *buf, int len); +int ivm_read_eeprom(unsigned char *buf, int len, int mac_address_offset); int ivm_analyze_eeprom(unsigned char *buf, int len); int trigger_fpga_config(void); diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index 429e9c7914..fee7f03c8c 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -297,7 +297,7 @@ int ivm_analyze_eeprom(unsigned char *buf, int len) return 0; } -static int ivm_populate_env(unsigned char *buf, int len) +static int ivm_populate_env(unsigned char *buf, int len, int mac_address_offset) { unsigned char *page2; unsigned char valbuf[MAC_STR_SZ]; @@ -309,23 +309,23 @@ static int ivm_populate_env(unsigned char *buf, int len) #ifndef CONFIG_KMTEGR1 /* if an offset is defined, add it */ - process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADDRESS_OFFSET, true); + process_mac(valbuf, page2, mac_address_offset, true); env_set((char *)"ethaddr", (char *)valbuf); #else /* KMTEGR1 has a special setup. eth0 has no connection to the outside and * gets an locally administred MAC address, eth1 is the debug interface and * gets the official MAC address from the IVM */ - process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADDRESS_OFFSET, false); + process_mac(valbuf, page2, mac_address_offset, false); env_set((char *)"ethaddr", (char *)valbuf); - process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADDRESS_OFFSET, true); + process_mac(valbuf, page2, mac_address_offset, true); env_set((char *)"eth1addr", (char *)valbuf); #endif return 0; } -int ivm_read_eeprom(unsigned char *buf, int len) +int ivm_read_eeprom(unsigned char *buf, int len, int mac_address_offset) { int ret; @@ -339,5 +339,5 @@ int ivm_read_eeprom(unsigned char *buf, int len) return -2; } - return ivm_populate_env(buf, len); + return ivm_populate_env(buf, len, mac_address_offset); } diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index 5969d51395..feca7be372 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -186,7 +186,8 @@ int board_early_init_r(void) int misc_init_r(void) { - ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); + ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN, + CONFIG_PIGGY_MAC_ADDRESS_OFFSET); return 0; } diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index 7f83ec180e..627543a0aa 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -232,7 +232,8 @@ int misc_init_r(void) } #endif - ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); + ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN, + CONFIG_PIGGY_MAC_ADDRESS_OFFSET); initialize_unit_leds(); set_km_env(); diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index 88914c80e8..9e1956c8b7 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -196,7 +196,8 @@ int misc_init_r(void) } } - ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); + ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN, + CONFIG_PIGGY_MAC_ADDRESS_OFFSET); return 0; } From e7fdb3462d4b99a55e55f11688d1dd68b98cccd2 Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Mon, 25 Nov 2019 17:24:15 +0100 Subject: [PATCH 17/28] arm/km: remove board KMCOGE3UN This target is out of maintenance and can be removed. Signed-off-by: Holger Brunck CC: Stefan Roese CC: Valentin Longchamp Reviewed-by: Stefan Roese --- board/keymile/km_arm/MAINTAINERS | 1 - board/keymile/km_arm/km_arm.c | 55 +------------------------------- configs/mgcoge3un_defconfig | 54 ------------------------------- include/configs/km_kirkwood.h | 10 +----- scripts/config_whitelist.txt | 1 - 5 files changed, 2 insertions(+), 119 deletions(-) delete mode 100644 configs/mgcoge3un_defconfig diff --git a/board/keymile/km_arm/MAINTAINERS b/board/keymile/km_arm/MAINTAINERS index d80589ded7..17926017c3 100644 --- a/board/keymile/km_arm/MAINTAINERS +++ b/board/keymile/km_arm/MAINTAINERS @@ -10,4 +10,3 @@ F: configs/kmcoge5un_defconfig F: configs/kmnusa_defconfig F: configs/kmsugp1_defconfig F: configs/kmsuv31_defconfig -F: configs/mgcoge3un_defconfig diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index 627543a0aa..7aa9fa7fca 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -122,26 +122,6 @@ static const u32 kwmpp_config[] = { static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; -#if defined(CONFIG_KM_MGCOGE3UN) -/* - * Wait for startup OK from mgcoge3ne - */ -static int startup_allowed(void) -{ - unsigned char buf; - - /* - * Read CIRQ16 bit (bit 0) - */ - if (i2c_read(BOCO, REG_IRQ_CIRQ2, 1, &buf, 1) != 0) - printf("%s: Error reading Boco\n", __func__); - else - if ((buf & MASK_RBI_DEFECT_16) == MASK_RBI_DEFECT_16) - return 1; - return 0; -} -#endif - #if (defined(CONFIG_KM_PIGGY4_88E6061)|defined(CONFIG_KM_PIGGY4_88E6352)) /* * All boards with PIGGY4 connected via a simple switch have ethernet always @@ -199,39 +179,6 @@ static void set_bootcount_addr(void) int misc_init_r(void) { -#if defined(CONFIG_KM_MGCOGE3UN) - char *wait_for_ne; - u8 dip_switch = kw_gpio_get_value(KM_FLASH_ERASE_ENABLE); - wait_for_ne = env_get("waitforne"); - - if ((wait_for_ne != NULL) && (dip_switch == 0)) { - if (strcmp(wait_for_ne, "true") == 0) { - int cnt = 0; - int abort = 0; - puts("NE go: "); - while (startup_allowed() == 0) { - if (tstc()) { - (void) getc(); /* consume input */ - abort = 1; - break; - } - udelay(200000); - cnt++; - if (cnt == 5) - puts("wait\b\b\b\b"); - if (cnt == 10) { - cnt = 0; - puts(" \b\b\b\b"); - } - } - if (abort == 1) - printf("\nAbort waiting for ne\n"); - else - puts("OK\n"); - } - } -#endif - ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN, CONFIG_PIGGY_MAC_ADDRESS_OFFSET); @@ -294,7 +241,7 @@ int board_init(void) int board_late_init(void) { -#if (defined(CONFIG_KM_COGE5UN) | defined(CONFIG_KM_MGCOGE3UN)) +#if defined(CONFIG_KM_COGE5UN) u8 dip_switch = kw_gpio_get_value(KM_FLASH_ERASE_ENABLE); /* if pin 1 do full erase */ diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig deleted file mode 100644 index 1604349bc9..0000000000 --- a/configs/mgcoge3un_defconfig +++ /dev/null @@ -1,54 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x07d00000 -CONFIG_TARGET_KM_KIRKWOOD=y -CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 -CONFIG_KM_PIGGY4_88E6061=y -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_OFFSET=0x0 -CONFIG_IDENT_STRING="\nKeymile COGE3UN" -CONFIG_SYS_EXTRA_OPTIONS="KM_MGCOGE3UN" -CONFIG_MISC_INIT_R=y -CONFIG_VERSION_VARIABLE=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Hit key to stop autoboot in %2ds\n" -CONFIG_AUTOBOOT_STOP_STR=" " -CONFIG_CMD_ASKENV=y -CONFIG_CMD_GREPENV=y -CONFIG_CMD_EEPROM=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_I2C=y -CONFIG_CMD_NAND=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_JFFS2=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" -CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:-(ubi0);" -CONFIG_CMD_UBI=y -# CONFIG_CMD_UBIFS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" -CONFIG_ENV_IS_IN_EEPROM=y -CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x2000 -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_BOOTCOUNT_RAM=y -CONFIG_BOOTCOUNT_BOOTLIMIT=3 -# CONFIG_MMC is not set -CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y -CONFIG_SF_DEFAULT_SPEED=8100000 -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_BCH=y diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index 6fce83cfcd..064097a631 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -51,14 +51,6 @@ #undef CONFIG_SYS_KWD_CONFIG #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg -/* KM_MGCOGE3UN */ -#elif defined(CONFIG_KM_MGCOGE3UN) -#define CONFIG_HOSTNAME "mgcoge3un" -#undef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-memphis.cfg -#define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0" -#define CONFIG_KM_DISABLE_PCIE - /* KMCOGE5UN */ #elif defined(CONFIG_KM_COGE5UN) #undef CONFIG_SYS_KWD_CONFIG @@ -113,7 +105,7 @@ #ifdef CONFIG_KM_PIGGY4_88E6061 /* - * Some keymile boards like mgcoge3un have their PIGGY4 connected via + * Some keymile boards like mgcoge5un have their PIGGY4 connected via * an Marvell 88E6061 simple switch. * In this case we have to change the default settings for the * ethernet phy connected to the kirkwood. diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index ce6c339411..cd154738a4 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -939,7 +939,6 @@ CONFIG_KM_ECC_MODE CONFIG_KM_KIRKWOOD CONFIG_KM_KIRKWOOD_128M16 CONFIG_KM_KIRKWOOD_PCI -CONFIG_KM_MGCOGE3UN CONFIG_KM_NEW_ENV CONFIG_KM_NUSA CONFIG_KM_ROOTFSSIZE From 68af8106a337b708a181662de42bddc36d5aec71 Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Mon, 25 Nov 2019 17:24:16 +0100 Subject: [PATCH 18/28] boards/km_arm: enable support for Macronix SPI NOR flash The M25P80 and M25P32 SPI flashes from Numonix/Micron will be replaced by Marconix MX25L80 and MX25L32 flashes. Signed-off-by: Holger Brunck CC: Stefan Roese CC: Valentin Longchamp Reviewed-by: Stefan Roese --- configs/km_kirkwood_128m16_defconfig | 1 + configs/km_kirkwood_defconfig | 1 + configs/kmcoge5un_defconfig | 1 + configs/kmnusa_defconfig | 1 + 4 files changed, 4 insertions(+) diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 10fe7b9946..6d0fc42735 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -44,6 +44,7 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SF_DEFAULT_SPEED=8100000 CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MACRONIX=y CONFIG_MVGBE=y CONFIG_MII=y CONFIG_SYS_NS16550=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index fbb6566e43..7b6cea8917 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -44,6 +44,7 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SF_DEFAULT_SPEED=8100000 CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MACRONIX=y CONFIG_MVGBE=y CONFIG_MII=y CONFIG_SYS_NS16550=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 80a7555b54..f53b0ae0ef 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -48,6 +48,7 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SF_DEFAULT_SPEED=8100000 CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MACRONIX=y CONFIG_MVGBE=y CONFIG_MII=y CONFIG_SYS_NS16550=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 23599bc700..1f2f1a6d27 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -48,6 +48,7 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SF_DEFAULT_SPEED=8100000 CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MACRONIX=y CONFIG_MV88E6352_SWITCH=y CONFIG_MVGBE=y CONFIG_MII=y From 53dc8ae66c5ca8dac65bd6f51c0cbb8b0d22aa2a Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 29 Nov 2019 19:47:59 +0200 Subject: [PATCH 19/28] gcc-9: silence 'address-of-packed-member' warning MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GCC 9.x starts complaining about potential misalignment of the pointer to the array (in this case alignment=2) in the packed (alignment=1) structures. Repeating Linus' Torvalds commit 6f303d60534c in the Linux kernel. Original commit message: We already did this for clang, but now gcc has that warning too. Yes, yes, the address may be unaligned. And that's kind of the point. This in particular hides the warnings like drivers/usb/gadget/composite.c:545:23: warning: taking address of packed member of ‘struct usb_string_descriptor’ may result in an unaligned pointer value [-Waddress-of-packed-member] 545 | collect_langs(sp, s->wData); drivers/usb/gadget/composite.c:550:24: warning: taking address of packed member of ‘struct usb_string_descriptor’ may result in an unaligned pointer value [-Waddress-of-packed-member] 550 | collect_langs(sp, s->wData); drivers/usb/gadget/composite.c:555:25: warning: taking address of packed member of ‘struct usb_string_descriptor’ may result in an unaligned pointer value [-Waddress-of-packed-member] 555 | collect_langs(sp, s->wData); Signed-off-by: Andy Shevchenko --- Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index cc126ebc53..3f332e6885 100644 --- a/Makefile +++ b/Makefile @@ -672,11 +672,12 @@ endif endif KBUILD_CFLAGS += $(call cc-option,-Wno-format-nonliteral) +KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member) + ifeq ($(cc-name),clang) KBUILD_CPPFLAGS += $(call cc-option,-Qunused-arguments,) KBUILD_CFLAGS += $(call cc-disable-warning, format-invalid-specifier) KBUILD_CFLAGS += $(call cc-disable-warning, gnu) -KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member) KBUILD_CFLAGS += $(call cc-option, -fcatch-undefined-behavior) endif From 3f05f087c37ec6b408dfd3b0a864c59749b5b8e1 Mon Sep 17 00:00:00 2001 From: Philippe Reynes Date: Thu, 9 Jan 2020 17:34:02 +0100 Subject: [PATCH 20/28] test/cmd_ut.c: fix cmd_ut_category In the function cmd_ut_category, the prefix is used with the function strncmp to know if the prefix should be removed from the test name, even if the prefix is NULL. To avoid this issue, we consider that a prefix NULL mean no prefix. So we only try to remove the prefix from the test_name if the prefix is not NULL, then we avoid to call the function strncmp with a NULL prefix. Reported-by: Coverity CID 281110 Fixes: 4ad4edfe ("cmd_ut: add a parameter prefix to the function cmd_ut_category") Signed-off-by: Philippe Reynes --- test/cmd_ut.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 400719e7b6..a3a9d49f7e 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -26,7 +26,7 @@ int cmd_ut_category(const char *name, const char *prefix, const char *test_name = test->name; /* Remove the prefix */ - if (!strncmp(test_name, prefix, prefix_len)) + if (prefix && !strncmp(test_name, prefix, prefix_len)) test_name += prefix_len; if (argc > 1 && strcmp(argv[1], test_name)) From 6478a7ee3bae03bab4d9e092d91157a75d9fcf24 Mon Sep 17 00:00:00 2001 From: "Klaus H. Sorensen" Date: Wed, 11 Dec 2019 11:18:29 +0000 Subject: [PATCH 21/28] cmd/eeprom.c: prepend 0x to hex numbers in output message format If the numbers do not happen to contain any digits from [a-f], it's not clear that they are base 16. Signed-off-by: Klaus H. Sorensen Signed-off-by: Rasmus Villemoes Reviewed-by: Lukasz Majewski Reviewed-by: Heiko Schocher --- cmd/eeprom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/eeprom.c b/cmd/eeprom.c index 4a1569baf3..667149e2d4 100644 --- a/cmd/eeprom.c +++ b/cmd/eeprom.c @@ -308,7 +308,7 @@ static int eeprom_execute_command(enum eeprom_action action, int i2c_bus, { int rcode = 0; const char *const fmt = - "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... "; + "\nEEPROM @0x%lX %s: addr 0x%08lx off 0x%04lx count %ld ... "; #ifdef CONFIG_CMD_EEPROM_LAYOUT struct eeprom_layout layout; #endif From 5819466dc1d2856afa84188745eaa5f415ee08cb Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Wed, 11 Dec 2019 13:51:38 +0100 Subject: [PATCH 22/28] mkimage: simplify fit_check_params() fit_check_params() wants at least two of dflag, fflag, and lflag set. Simplify the logical constraint checking this. Signed-off-by: Heinrich Schuchardt --- tools/fit_image.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/fit_image.c b/tools/fit_image.c index 114df5af30..6aa4b1c733 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -825,9 +825,9 @@ static int fit_check_params(struct image_tool_params *params) { if (params->auto_its) return 0; - return ((params->dflag && (params->fflag || params->lflag)) || - (params->fflag && (params->dflag || params->lflag)) || - (params->lflag && (params->dflag || params->fflag))); + return ((params->dflag && params->fflag) || + (params->fflag && params->lflag) || + (params->lflag && params->dflag)); } U_BOOT_IMAGE_TYPE( From 0bc4356deae7ff2de2441fc519f395e75bed8923 Mon Sep 17 00:00:00 2001 From: Bharat Kumar Reddy Gooty Date: Mon, 16 Dec 2019 09:09:43 -0800 Subject: [PATCH 23/28] arch: arm: Program GIC LPI configuration table Programs the following: 1. Redistributor PROCBASER configuration table (which is common for all redistributors) 2. Redistributor pending table (PENDBASER), for all the available redistributors. Signed-off-by: Bharat Kumar Reddy Gooty Signed-off-by: Vladimir Olovyannikov --- arch/arm/Kconfig | 10 +++ arch/arm/include/asm/gic-v3.h | 134 ++++++++++++++++++++++++++++++++++ arch/arm/lib/Makefile | 1 + arch/arm/lib/gic-v3-its.c | 100 +++++++++++++++++++++++++ 4 files changed, 245 insertions(+) create mode 100644 arch/arm/include/asm/gic-v3.h create mode 100644 arch/arm/lib/gic-v3-its.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 76365ef313..8f950778bd 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -61,6 +61,16 @@ config LNX_KRNL_IMG_TEXT_OFFSET_BASE endif endif +config GIC_V3_ITS + bool "ARM GICV3 ITS" + help + ARM GICV3 Interrupt translation service (ITS). + Basic support for programming locality specific peripheral + interrupts (LPI) configuration tables and enable LPI tables. + LPI configuration table can be used by u-boot or Linux. + ARM GICV3 has limitation, once the LPI table is enabled, LPI + configuration table can not be re-programmed, unless GICV3 reset. + config STATIC_RELA bool default y if ARM64 && !POSITION_INDEPENDENT diff --git a/arch/arm/include/asm/gic-v3.h b/arch/arm/include/asm/gic-v3.h new file mode 100644 index 0000000000..ac6c9e7013 --- /dev/null +++ b/arch/arm/include/asm/gic-v3.h @@ -0,0 +1,134 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 Broadcom. + */ + +#ifndef __GIC_V3_H__ +#define __GIC_V3_H__ + +#define GICR_CTLR_ENABLE_LPIS BIT(0) +#define GICR_CTLR_RWP BIT(3) + +#define GICR_TYPER_CPU_NUMBER(r) (((r) >> 8) & 0xffff) + +#define GICR_WAKER_PROCESSORSLEEP BIT(1) +#define GICR_WAKER_CHILDRENASLEEP BIT(2) + +#define GIC_BASER_CACHE_NCNB 0ULL +#define GIC_BASER_CACHE_SAMEASINNER 0ULL +#define GIC_BASER_CACHE_NC 1ULL +#define GIC_BASER_CACHE_RAWT 2ULL +#define GIC_BASER_CACHE_RAWB 3ULL +#define GIC_BASER_CACHE_WAWT 4ULL +#define GIC_BASER_CACHE_WAWB 5ULL +#define GIC_BASER_CACHE_RAWAWT 6ULL +#define GIC_BASER_CACHE_RAWAWB 7ULL +#define GIC_BASER_CACHE_MASK 7ULL +#define GIC_BASER_NONSHAREABLE 0ULL +#define GIC_BASER_INNERSHAREABLE 1ULL +#define GIC_BASER_OUTERSHAREABLE 2ULL +#define GIC_BASER_SHAREABILITY_MASK 3ULL + +#define GIC_BASER_CACHEABILITY(reg, inner_outer, type) \ + (GIC_BASER_CACHE_##type << reg##_##inner_outer##_CACHEABILITY_SHIFT) + +#define GIC_BASER_SHAREABILITY(reg, type) \ + (GIC_BASER_##type << reg##_SHAREABILITY_SHIFT) + +/* encode a size field of width @w containing @n - 1 units */ +#define GIC_ENCODE_SZ(n, w) (((unsigned long)(n) - 1) &\ + GENMASK_ULL(((w) - 1), 0)) + +#define GICR_PROPBASER_SHAREABILITY_SHIFT (10) +#define GICR_PROPBASER_INNER_CACHEABILITY_SHIFT (7) +#define GICR_PROPBASER_OUTER_CACHEABILITY_SHIFT (56) +#define GICR_PROPBASER_SHAREABILITY_MASK \ + GIC_BASER_SHAREABILITY(GICR_PROPBASER, SHAREABILITY_MASK) +#define GICR_PROPBASER_INNER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK) +#define GICR_PROPBASER_OUTER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK) +#define GICR_PROPBASER_CACHEABILITY_MASK GICR_PROPBASER_INNER_CACHEABILITY_MASK + +#define GICR_PROPBASER_INNERSHAREABLE \ + GIC_BASER_SHAREABILITY(GICR_PROPBASER, INNERSHAREABLE) + +#define GICR_PROPBASER_NCNB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NCNB) +#define GICR_PROPBASER_NC \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NC) +#define GICR_PROPBASER_RAWT \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWT) +#define GICR_PROPBASER_RAWB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWB) +#define GICR_PROPBASER_WAWT \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWT) +#define GICR_PROPBASER_WAWB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWB) +#define GICR_PROPBASER_RAWAWT \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWT) +#define GICR_PROPBASER_RAWAWB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWB) + +#define GICR_PROPBASER_IDBITS_MASK (0x1f) +#define GICR_PROPBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 12)) +#define GICR_PENDBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 16)) + +#define GICR_PENDBASER_SHAREABILITY_SHIFT (10) +#define GICR_PENDBASER_INNER_CACHEABILITY_SHIFT (7) +#define GICR_PENDBASER_OUTER_CACHEABILITY_SHIFT (56) +#define GICR_PENDBASER_SHAREABILITY_MASK \ + GIC_BASER_SHAREABILITY(GICR_PENDBASER, SHAREABILITY_MASK) +#define GICR_PENDBASER_INNER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK) +#define GICR_PENDBASER_OUTER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK) +#define GICR_PENDBASER_CACHEABILITY_MASK \ + GICR_PENDBASER_INNER_CACHEABILITY_MASK + +#define GICR_PENDBASER_INNERSHAREABLE \ + GIC_BASER_SHAREABILITY(GICR_PENDBASER, INNERSHAREABLE) + +#define GICR_PENDBASER_NCNB \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, NCNB) +#define GICR_PENDBASER_NC \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, NC) +#define GICR_PENDBASER_RAWT \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWT) +#define GICR_PENDBASER_RAWB \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWB) +#define GICR_PENDBASER_WAWT \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WAWT) +#define GICR_PENDBASER_WAWB \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WAWB) +#define GICR_PENDBASER_RAWAWT \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWAWT) +#define GICR_PENDBASER_RAWAWB \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWAWB) + +#define GICR_PENDBASER_PTZ BIT_ULL(62) + +#define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ + +#define GICD_TYPER_ID_BITS(typer) ((((typer) >> 19) & 0x1f) + 1) +#define GICD_TYPER_NUM_LPIS(typer) ((((typer) >> 11) & 0x1f) + 1) +#define GICD_TYPER_IRQS(typer) ((((typer) & 0x1f) + 1) * 32) + +/* Message based interrupts support */ +#define GICD_TYPER_MBIS BIT(16) +/* LPI support */ +#define GICD_TYPER_LPIS BIT(17) +#define GICD_TYPER_RSS BIT(26) + +#define GIC_REDISTRIBUTOR_OFFSET 0x20000 + +#ifdef CONFIG_GIC_V3_ITS +int gic_lpi_tables_init(u64 base, u32 max_redist); +#else +int gic_lpi_tables_init(u64 base, u32 max_redist) +{ + return 0; +} +#endif /* CONFIG_GIC_V3_ITS */ + +#endif /* __GIC_V3_H__ */ diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 9de9a9acee..8482f5446c 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -52,6 +52,7 @@ obj-$(CONFIG_FSL_LAYERSCAPE) += ccn504.o ifneq ($(CONFIG_GICV2)$(CONFIG_GICV3),) obj-y += gic_64.o endif +obj-$(CONFIG_GIC_V3_ITS) += gic-v3-its.o obj-y += interrupts_64.o else obj-y += interrupts.o diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c new file mode 100644 index 0000000000..e19ab01621 --- /dev/null +++ b/arch/arm/lib/gic-v3-its.c @@ -0,0 +1,100 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 Broadcom. + */ +#include +#include +#include +#include + +static u32 lpi_id_bits; + +#define LPI_NRBITS lpi_id_bits +#define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) +#define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) + +/* + * Program the GIC LPI configuration tables for all + * the re-distributors and enable the LPI table + * base: Configuration table address + * num_redist: number of redistributors + */ +int gic_lpi_tables_init(u64 base, u32 num_redist) +{ + u32 gicd_typer; + u64 val; + u64 tmp; + int i; + u64 redist_lpi_base; + u64 pend_base = GICR_BASE + GICR_PENDBASER; + + gicd_typer = readl(GICD_BASE + GICD_TYPER); + + /* GIC support for Locality specific peripheral interrupts (LPI's) */ + if (!(gicd_typer & GICD_TYPER_LPIS)) { + pr_err("GIC implementation does not support LPI's\n"); + return -EINVAL; + } + + /* + * Check for LPI is disabled for all the redistributors. + * Once the LPI table is enabled, can not program the + * LPI configuration tables again, unless the GIC is reset. + */ + for (i = 0; i < num_redist; i++) { + u32 offset = i * GIC_REDISTRIBUTOR_OFFSET; + + if ((readl((uintptr_t)(GICR_BASE + offset))) & + GICR_CTLR_ENABLE_LPIS) { + pr_err("Re-Distributor %d LPI is already enabled\n", + i); + return -EINVAL; + } + } + + /* lpi_id_bits to get LPI_PENDBASE_SZ and LPi_PROPBASE_SZ */ + lpi_id_bits = min_t(u32, GICD_TYPER_ID_BITS(gicd_typer), + ITS_MAX_LPI_NRBITS); + + /* Set PropBase */ + val = (base | + GICR_PROPBASER_INNERSHAREABLE | + GICR_PROPBASER_RAWAWB | + ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); + + writeq(val, (GICR_BASE + GICR_PROPBASER)); + tmp = readl(GICR_BASE + GICR_PROPBASER); + if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { + if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { + val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | + GICR_PROPBASER_CACHEABILITY_MASK); + val |= GICR_PROPBASER_NC; + writeq(val, (GICR_BASE + GICR_PROPBASER)); + } + } + + redist_lpi_base = base + LPI_PROPBASE_SZ; + + for (i = 0; i < num_redist; i++) { + u32 offset = i * GIC_REDISTRIBUTOR_OFFSET; + + val = ((redist_lpi_base + (i * LPI_PENDBASE_SZ)) | + GICR_PENDBASER_INNERSHAREABLE | + GICR_PENDBASER_RAWAWB); + + writeq(val, (uintptr_t)(pend_base + offset)); + tmp = readq((uintptr_t)(pend_base + offset)); + if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { + val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | + GICR_PENDBASER_CACHEABILITY_MASK); + val |= GICR_PENDBASER_NC; + writeq(val, (uintptr_t)(pend_base + offset)); + } + + /* Enable LPI for the redistributor */ + writel(GICR_CTLR_ENABLE_LPIS, (uintptr_t)(GICR_BASE + offset)); + } + + return 0; +} + From 41acbc53f4bffc981ca84110ec169d3f181d84ca Mon Sep 17 00:00:00 2001 From: Rajesh Ravi Date: Fri, 22 Nov 2019 14:50:01 -0800 Subject: [PATCH 24/28] arm: cpu: armv8: add support for arm psci reset2. Current U-Boot has only support for psci reset. Adding support for arm psci reset2 allows passing of reset level and other platform sepcific parameters like strap settings to lowlevel psci implementation. Signed-off-by: Rajesh Ravi Signed-off-by: Vladimir Olovyannikov --- arch/arm/cpu/armv8/fwcall.c | 16 ++++++++++++++++ arch/arm/include/asm/psci.h | 4 ++++ arch/arm/include/asm/system.h | 1 + 3 files changed, 21 insertions(+) diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c index b0aca1b72a..cbd35b7f4a 100644 --- a/arch/arm/cpu/armv8/fwcall.c +++ b/arch/arm/cpu/armv8/fwcall.c @@ -98,6 +98,22 @@ void __noreturn psci_system_reset(void) ; } +void __noreturn psci_system_reset2(u32 reset_level, u32 cookie) +{ + struct pt_regs regs; + + regs.regs[0] = ARM_PSCI_0_2_FN64_SYSTEM_RESET2; + regs.regs[1] = PSCI_RESET2_TYPE_VENDOR | reset_level; + regs.regs[2] = cookie; + if (use_smc_for_psci) + smc_call(®s); + else + hvc_call(®s); + + while (1) + ; +} + void __noreturn psci_system_off(void) { struct pt_regs regs; diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h index 95f18e8cbc..3ddcd95a26 100644 --- a/arch/arm/include/asm/psci.h +++ b/arch/arm/include/asm/psci.h @@ -64,6 +64,7 @@ #define ARM_PSCI_0_2_FN64_AFFINITY_INFO ARM_PSCI_0_2_FN64(4) #define ARM_PSCI_0_2_FN64_MIGRATE ARM_PSCI_0_2_FN64(5) #define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN64(7) +#define ARM_PSCI_0_2_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18) /* PSCI 1.0 interface */ #define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10) @@ -90,6 +91,9 @@ #define PSCI_AFFINITY_LEVEL_OFF 1 #define PSCI_AFFINITY_LEVEL_ON_PENDING 2 +#define PSCI_RESET2_TYPE_VENDOR_SHIFT 31 +#define PSCI_RESET2_TYPE_VENDOR BIT(PSCI_RESET2_TYPE_VENDOR_SHIFT) + #ifndef __ASSEMBLY__ #include diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index a1a5e35ef6..81ccead112 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -254,6 +254,7 @@ void mmu_change_region_attr(phys_addr_t start, size_t size, u64 attrs); void smc_call(struct pt_regs *args); void __noreturn psci_system_reset(void); +void __noreturn psci_system_reset2(u32 reset_level, u32 cookie); void __noreturn psci_system_off(void); #ifdef CONFIG_ARMV8_PSCI From 27a38a6e71817243d71da8d798ec9daa31b3c49d Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Tue, 24 Dec 2019 12:21:09 +0100 Subject: [PATCH 25/28] virtio: fix typo devicd %s/devicd/device Signed-off-by: Heinrich Schuchardt Reviewed-by: Bin Meng --- drivers/virtio/virtio_mmio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/virtio/virtio_mmio.c b/drivers/virtio/virtio_mmio.c index 7b738703b8..a67b354122 100644 --- a/drivers/virtio/virtio_mmio.c +++ b/drivers/virtio/virtio_mmio.c @@ -363,7 +363,7 @@ static int virtio_mmio_probe(struct udevice *udev) return 0; } - /* Check devicd ID */ + /* Check device ID */ uc_priv->device = readl(priv->base + VIRTIO_MMIO_DEVICE_ID); if (uc_priv->device == 0) { /* From b84acf10565af1578e68c533a36e629fe8b8e84a Mon Sep 17 00:00:00 2001 From: Eugeniu Rosca Date: Tue, 24 Dec 2019 17:51:06 +0100 Subject: [PATCH 26/28] dtimg/am57xx_evm_defconfig: Rename dtimg to adtimg Rename the existing 'dtimg' command to 'adtimg', in order to: - Suggest the Android origins and scope - Be consistent with the upcoming 'abootimg' command (naming suggested by Simon [*]) The change in _not_ backward compatible, but its benefits outweigh its downsides, given that we don't expect active users of 'dtimg' today. Perform the rename in several steps: 1. Rename *.c file and Kconfig symbol. This should allow 'git log --follow' to properly track the history of 'adtimg.c' 2. 's/dtimg/adtimg/g' in the internal namespace of 'adtimg.c' ELF comparison [**] before and after shows no functional change. [*] https://patchwork.ozlabs.org/patch/1182212/#2291600 [**] diff -u <(objdump -d cmd/dtimg.o) <(objdump -d cmd/adtimg.o) Cc: Tom Rini Signed-off-by: Eugeniu Rosca Reviewed-by: Simon Glass Reviewed-by: Sam Protsenko --- cmd/Kconfig | 4 ++-- cmd/Makefile | 2 +- cmd/{dtimg.c => adtimg.c} | 0 common/Makefile | 2 +- configs/am57xx_evm_defconfig | 2 +- configs/am57xx_hs_evm_defconfig | 2 +- configs/am57xx_hs_evm_usb_defconfig | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) rename cmd/{dtimg.c => adtimg.c} (100%) diff --git a/cmd/Kconfig b/cmd/Kconfig index 26c6551ed6..298feae24d 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -364,8 +364,8 @@ config CMD_BOOTMENU help Add an ANSI terminal boot menu command. -config CMD_DTIMG - bool "dtimg" +config CMD_ADTIMG + bool "adtimg" help Android DTB/DTBO image manipulation commands. Read dtb/dtbo files from image into RAM, dump image structure information, etc. Those dtb/dtbo diff --git a/cmd/Makefile b/cmd/Makefile index 8df39f3a19..ecf687d49f 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -47,7 +47,7 @@ obj-$(CONFIG_CMD_SOUND) += sound.o ifdef CONFIG_POST obj-$(CONFIG_CMD_DIAG) += diag.o endif -obj-$(CONFIG_CMD_DTIMG) += dtimg.o +obj-$(CONFIG_CMD_ADTIMG) += adtimg.o obj-$(CONFIG_CMD_ECHO) += echo.o obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o obj-$(CONFIG_CMD_EEPROM) += eeprom.o diff --git a/cmd/dtimg.c b/cmd/adtimg.c similarity index 100% rename from cmd/dtimg.c rename to cmd/adtimg.c diff --git a/common/Makefile b/common/Makefile index 302d8beaf3..029cc0f2ce 100644 --- a/common/Makefile +++ b/common/Makefile @@ -117,7 +117,7 @@ obj-$(CONFIG_IO_TRACE) += iotrace.o obj-y += memsize.o obj-y += stdio.o -obj-$(CONFIG_CMD_DTIMG) += image-android-dt.o +obj-$(CONFIG_CMD_ADTIMG) += image-android-dt.o ifdef CONFIG_CMD_EEPROM_LAYOUT obj-y += eeprom/eeprom_field.o eeprom/eeprom_layout.o diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index ae183e9b56..0c6a2e9193 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -29,7 +29,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_YMODEM_SUPPORT=y -CONFIG_CMD_DTIMG=y +CONFIG_CMD_ADTIMG=y CONFIG_CMD_SPL=y CONFIG_CMD_BCB=y # CONFIG_CMD_FLASH is not set diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 800ec6c70b..3c57dfb031 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -32,7 +32,7 @@ CONFIG_SPL_DMA_SUPPORT=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 -CONFIG_CMD_DTIMG=y +CONFIG_CMD_ADTIMG=y CONFIG_CMD_BCB=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index f2cbf2fe2b..87f391c2b0 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -37,7 +37,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y -CONFIG_CMD_DTIMG=y +CONFIG_CMD_ADTIMG=y CONFIG_CMD_BCB=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set From 4c6edc288b4aa487824e8a276b925170f78fbe3a Mon Sep 17 00:00:00 2001 From: Eugeniu Rosca Date: Tue, 24 Dec 2019 17:51:07 +0100 Subject: [PATCH 27/28] cmd: adtimg: Rename internal symbols With 'dtimg.c' renamed to 'adtimg.c', now ensure the naming consistency in the internal implementation of 'adtimg.c'. No functional change intended. Signed-off-by: Eugeniu Rosca Reviewed-by: Sam Protsenko Reviewed-by: Simon Glass --- cmd/adtimg.c | 55 ++++++++++++++++++++++++++-------------------------- 1 file changed, 28 insertions(+), 27 deletions(-) diff --git a/cmd/adtimg.c b/cmd/adtimg.c index 6c5d53cc68..22b4f5e1a8 100644 --- a/cmd/adtimg.c +++ b/cmd/adtimg.c @@ -8,13 +8,13 @@ #include #include -enum cmd_dtimg_info { - CMD_DTIMG_START = 0, - CMD_DTIMG_SIZE, +enum cmd_adtimg_info { + CMD_ADTIMG_START = 0, + CMD_ADTIMG_SIZE, }; -static int do_dtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc, - char * const argv[]) +static int do_adtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { char *endp; ulong hdr_addr; @@ -38,7 +38,8 @@ static int do_dtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc, return CMD_RET_SUCCESS; } -static int dtimg_get_fdt(int argc, char * const argv[], enum cmd_dtimg_info cmd) +static int adtimg_get_fdt(int argc, char * const argv[], + enum cmd_adtimg_info cmd) { ulong hdr_addr; u32 index; @@ -71,14 +72,14 @@ static int dtimg_get_fdt(int argc, char * const argv[], enum cmd_dtimg_info cmd) return CMD_RET_FAILURE; switch (cmd) { - case CMD_DTIMG_START: + case CMD_ADTIMG_START: snprintf(buf, sizeof(buf), "%lx", fdt_addr); break; - case CMD_DTIMG_SIZE: + case CMD_ADTIMG_SIZE: snprintf(buf, sizeof(buf), "%x", fdt_size); break; default: - printf("Error: Unknown cmd_dtimg_info value: %d\n", cmd); + printf("Error: Unknown cmd_adtimg_info value: %d\n", cmd); return CMD_RET_FAILURE; } @@ -87,31 +88,31 @@ static int dtimg_get_fdt(int argc, char * const argv[], enum cmd_dtimg_info cmd) return CMD_RET_SUCCESS; } -static int do_dtimg_start(cmd_tbl_t *cmdtp, int flag, int argc, +static int do_adtimg_start(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + return adtimg_get_fdt(argc, argv, CMD_ADTIMG_START); +} + +static int do_adtimg_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - return dtimg_get_fdt(argc, argv, CMD_DTIMG_START); + return adtimg_get_fdt(argc, argv, CMD_ADTIMG_SIZE); } -static int do_dtimg_size(cmd_tbl_t *cmdtp, int flag, int argc, - char * const argv[]) -{ - return dtimg_get_fdt(argc, argv, CMD_DTIMG_SIZE); -} - -static cmd_tbl_t cmd_dtimg_sub[] = { - U_BOOT_CMD_MKENT(dump, 2, 0, do_dtimg_dump, "", ""), - U_BOOT_CMD_MKENT(start, 4, 0, do_dtimg_start, "", ""), - U_BOOT_CMD_MKENT(size, 4, 0, do_dtimg_size, "", ""), +static cmd_tbl_t cmd_adtimg_sub[] = { + U_BOOT_CMD_MKENT(dump, 2, 0, do_adtimg_dump, "", ""), + U_BOOT_CMD_MKENT(start, 4, 0, do_adtimg_start, "", ""), + U_BOOT_CMD_MKENT(size, 4, 0, do_adtimg_size, "", ""), }; -static int do_dtimg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +static int do_adtimg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { cmd_tbl_t *cp; - cp = find_cmd_tbl(argv[1], cmd_dtimg_sub, ARRAY_SIZE(cmd_dtimg_sub)); + cp = find_cmd_tbl(argv[1], cmd_adtimg_sub, ARRAY_SIZE(cmd_adtimg_sub)); - /* Strip off leading 'dtimg' command argument */ + /* Strip off leading 'adtimg' command argument */ argc--; argv++; @@ -124,17 +125,17 @@ static int do_dtimg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } U_BOOT_CMD( - dtimg, CONFIG_SYS_MAXARGS, 0, do_dtimg, + adtimg, CONFIG_SYS_MAXARGS, 0, do_adtimg, "manipulate dtb/dtbo Android image", "dump \n" " - parse specified image and print its structure info\n" " : image address in RAM, in hex\n" - "dtimg start \n" + "adtimg start \n" " - get address (hex) of FDT in the image, by index\n" " : image address in RAM, in hex\n" " : index of desired FDT in the image\n" " : name of variable where to store address of FDT\n" - "dtimg size \n" + "adtimg size \n" " - get size (hex, bytes) of FDT in the image, by index\n" " : image address in RAM, in hex\n" " : index of desired FDT in the image\n" From 4f731c795d75aee548f6886f4f0da0a49a99354d Mon Sep 17 00:00:00 2001 From: Eugeniu Rosca Date: Tue, 24 Dec 2019 17:51:08 +0100 Subject: [PATCH 28/28] cmd: adtimg: Refactor usage style Trying to extend 'adtimg' functionality [1], we've been severely hit by a major limitation in the command's usage scheme. Specifically, the command's user interface appears to be too centric to getting the DTB/DTBO entry [3] based on the index of the desired DT in the image, which makes it really difficult retrieving the DT entry based on alternative criteria (e.g. filtering by id/rev fields), the latter being demanded by real life customer use-cases [1]. This went to the point of receiving below feedback from Sam [2]: -- snip -- As for 'dtimg' command: after giving it some thought, I think not much people using it yet. So in this particular case I don't have some strong preference, and if you think the 'dtimg' interface is ugly, and it overcomes "don't break interfaces" rule, maybe now is a good time to rework it (before it gets widely used). -- snip -- Given the above, rework the usage pattern from [4] to [5], in order to allow an intuitive enablement of "by id|rev" DT search [6]. [1] https://patchwork.ozlabs.org/cover/1202575/ ("cmd: dtimg: Enhance with --id and --rev options (take #1)") [2] https://patchwork.ozlabs.org/patch/1182207/#2317020 [3] https://source.android.com/devices/architecture/dto/partitions [4] Old usage adtimg dump - Print image contents adtimg start - Get DT address by index adtimg size - Get DT size by index [5] New usage adtimg addr - Set image location to adtimg dump - Print out image contents adtimg get dt --index= [avar [svar]] - Get DT address and size by index [6] Soon-to-be-provided "by id|rev" add-on functionality adtimg get dt --id= --rev= [avar [svar [ivar]]] - Get DT address/size/index by id|rev fields Signed-off-by: Eugeniu Rosca Reviewed-by: Sam Protsenko --- cmd/adtimg.c | 265 +++++++++++++++++++++++++++++++++++---------------- 1 file changed, 182 insertions(+), 83 deletions(-) diff --git a/cmd/adtimg.c b/cmd/adtimg.c index 22b4f5e1a8..60bb01c349 100644 --- a/cmd/adtimg.c +++ b/cmd/adtimg.c @@ -2,18 +2,22 @@ /* * (C) Copyright 2018 Linaro Ltd. * Sam Protsenko + * Eugeniu Rosca */ #include #include #include -enum cmd_adtimg_info { - CMD_ADTIMG_START = 0, - CMD_ADTIMG_SIZE, -}; +#define OPT_INDEX "--index" -static int do_adtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc, +/* + * Current/working DTB/DTBO Android image address. + * Similar to 'working_fdt' variable in 'fdt' command. + */ +static ulong working_img; + +static int do_adtimg_addr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { char *endp; @@ -24,86 +28,185 @@ static int do_adtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc, hdr_addr = simple_strtoul(argv[1], &endp, 16); if (*endp != '\0') { - printf("Error: Wrong image address\n"); + printf("Error: Wrong image address '%s'\n", argv[1]); return CMD_RET_FAILURE; } - if (!android_dt_check_header(hdr_addr)) { - printf("Error: DT image header is incorrect\n"); + /* + * Allow users to set an address prior to copying the DTB/DTBO + * image to that same address, i.e. skip header verification. + */ + + working_img = hdr_addr; + return CMD_RET_SUCCESS; +} + +static int adtimg_check_working_img(void) +{ + if (!working_img) { + printf("Error: Please, call 'adtimg addr '. Aborting!\n"); return CMD_RET_FAILURE; } - android_dt_print_contents(hdr_addr); + if (!android_dt_check_header(working_img)) { + printf("Error: Invalid image header at 0x%lx\n", working_img); + return CMD_RET_FAILURE; + } return CMD_RET_SUCCESS; } -static int adtimg_get_fdt(int argc, char * const argv[], - enum cmd_adtimg_info cmd) -{ - ulong hdr_addr; - u32 index; - char *endp; - ulong fdt_addr; - u32 fdt_size; - char buf[65]; - - if (argc != 4) - return CMD_RET_USAGE; - - hdr_addr = simple_strtoul(argv[1], &endp, 16); - if (*endp != '\0') { - printf("Error: Wrong image address\n"); - return CMD_RET_FAILURE; - } - - if (!android_dt_check_header(hdr_addr)) { - printf("Error: DT image header is incorrect\n"); - return CMD_RET_FAILURE; - } - - index = simple_strtoul(argv[2], &endp, 0); - if (*endp != '\0') { - printf("Error: Wrong index\n"); - return CMD_RET_FAILURE; - } - - if (!android_dt_get_fdt_by_index(hdr_addr, index, &fdt_addr, &fdt_size)) - return CMD_RET_FAILURE; - - switch (cmd) { - case CMD_ADTIMG_START: - snprintf(buf, sizeof(buf), "%lx", fdt_addr); - break; - case CMD_ADTIMG_SIZE: - snprintf(buf, sizeof(buf), "%x", fdt_size); - break; - default: - printf("Error: Unknown cmd_adtimg_info value: %d\n", cmd); - return CMD_RET_FAILURE; - } - - env_set(argv[3], buf); - - return CMD_RET_SUCCESS; -} - -static int do_adtimg_start(cmd_tbl_t *cmdtp, int flag, int argc, - char * const argv[]) -{ - return adtimg_get_fdt(argc, argv, CMD_ADTIMG_START); -} - -static int do_adtimg_size(cmd_tbl_t *cmdtp, int flag, int argc, +static int do_adtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - return adtimg_get_fdt(argc, argv, CMD_ADTIMG_SIZE); + if (argc != 1) + return CMD_RET_USAGE; + + if (adtimg_check_working_img() != CMD_RET_SUCCESS) + return CMD_RET_FAILURE; + + android_dt_print_contents(working_img); + + return CMD_RET_SUCCESS; +} + +static int adtimg_getopt_u32(char * const opt, char * const name, u32 *optval) +{ + char *endp, *str; + u32 val; + + if (!opt || !name || !optval) + return CMD_RET_FAILURE; + + str = strchr(opt, '='); + if (!str) { + printf("Error: Option '%s' not followed by '='\n", name); + return CMD_RET_FAILURE; + } + + if (*++str == '\0') { + printf("Error: Option '%s=' not followed by value\n", name); + return CMD_RET_FAILURE; + } + + val = simple_strtoul(str, &endp, 0); + if (*endp != '\0') { + printf("Error: Wrong integer value '%s=%s'\n", name, str); + return CMD_RET_FAILURE; + } + + *optval = val; + return CMD_RET_SUCCESS; +} + +static int adtimg_getopt_index(int argc, char * const argv[], u32 *index, + char **avar, char **svar) +{ + int ret; + + if (!argv || !avar || !svar) + return CMD_RET_FAILURE; + + if (argc > 3) { + printf("Error: Unexpected argument '%s'\n", argv[3]); + return CMD_RET_FAILURE; + } + + ret = adtimg_getopt_u32(argv[0], OPT_INDEX, index); + if (ret != CMD_RET_SUCCESS) + return ret; + + if (argc > 1) + *avar = argv[1]; + if (argc > 2) + *svar = argv[2]; + + return CMD_RET_SUCCESS; +} + +static int adtimg_get_dt_by_index(int argc, char * const argv[]) +{ + ulong addr; + u32 index, size; + int ret; + char *avar = NULL, *svar = NULL; + + ret = adtimg_getopt_index(argc, argv, &index, &avar, &svar); + if (ret != CMD_RET_SUCCESS) + return ret; + + if (!android_dt_get_fdt_by_index(working_img, index, &addr, &size)) + return CMD_RET_FAILURE; + + if (avar && svar) { + ret = env_set_hex(avar, addr); + if (ret) { + printf("Error: Can't set '%s' to 0x%lx\n", avar, addr); + return CMD_RET_FAILURE; + } + ret = env_set_hex(svar, size); + if (ret) { + printf("Error: Can't set '%s' to 0x%x\n", svar, size); + return CMD_RET_FAILURE; + } + } else if (avar) { + ret = env_set_hex(avar, addr); + if (ret) { + printf("Error: Can't set '%s' to 0x%lx\n", avar, addr); + return CMD_RET_FAILURE; + } + printf("0x%x (%d)\n", size, size); + } else { + printf("0x%lx, 0x%x (%d)\n", addr, size, size); + } + + return CMD_RET_SUCCESS; +} + +static int adtimg_get_dt(int argc, char * const argv[]) +{ + if (argc < 2) { + printf("Error: No options passed to '%s'\n", argv[0]); + return CMD_RET_FAILURE; + } + + /* Strip off leading 'dt' command argument */ + argc--; + argv++; + + if (!strncmp(argv[0], OPT_INDEX, sizeof(OPT_INDEX) - 1)) + return adtimg_get_dt_by_index(argc, argv); + + printf("Error: Option '%s' not supported\n", argv[0]); + return CMD_RET_FAILURE; +} + +static int do_adtimg_get(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + if (argc < 2) { + printf("Error: No arguments passed to '%s'\n", argv[0]); + return CMD_RET_FAILURE; + } + + if (adtimg_check_working_img() != CMD_RET_SUCCESS) + return CMD_RET_FAILURE; + + /* Strip off leading 'get' command argument */ + argc--; + argv++; + + if (!strcmp(argv[0], "dt")) + return adtimg_get_dt(argc, argv); + + printf("Error: Wrong argument '%s'\n", argv[0]); + return CMD_RET_FAILURE; } static cmd_tbl_t cmd_adtimg_sub[] = { - U_BOOT_CMD_MKENT(dump, 2, 0, do_adtimg_dump, "", ""), - U_BOOT_CMD_MKENT(start, 4, 0, do_adtimg_start, "", ""), - U_BOOT_CMD_MKENT(size, 4, 0, do_adtimg_size, "", ""), + U_BOOT_CMD_MKENT(addr, CONFIG_SYS_MAXARGS, 1, do_adtimg_addr, "", ""), + U_BOOT_CMD_MKENT(dump, CONFIG_SYS_MAXARGS, 1, do_adtimg_dump, "", ""), + U_BOOT_CMD_MKENT(get, CONFIG_SYS_MAXARGS, 1, do_adtimg_get, "", ""), }; static int do_adtimg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) @@ -127,17 +230,13 @@ static int do_adtimg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) U_BOOT_CMD( adtimg, CONFIG_SYS_MAXARGS, 0, do_adtimg, "manipulate dtb/dtbo Android image", - "dump \n" - " - parse specified image and print its structure info\n" - " : image address in RAM, in hex\n" - "adtimg start \n" - " - get address (hex) of FDT in the image, by index\n" - " : image address in RAM, in hex\n" - " : index of desired FDT in the image\n" - " : name of variable where to store address of FDT\n" - "adtimg size \n" - " - get size (hex, bytes) of FDT in the image, by index\n" - " : image address in RAM, in hex\n" - " : index of desired FDT in the image\n" - " : name of variable where to store size of FDT" + "addr - Set image location to \n" + "adtimg dump - Print out image contents\n" + "adtimg get dt --index= [avar [svar]] - Get DT address/size by index\n" + "\n" + "Legend:\n" + " - : DTB/DTBO image address (hex) in RAM\n" + " - : index (hex/dec) of desired DT in the image\n" + " - : variable name to contain DT address (hex)\n" + " - : variable name to contain DT size (hex)" );